Data Sheet October 2005 FN611.7 Dual High Frequency Differential
|
|
|
Top Searches for this datasheet
CA3102
Data Sheet October 2005 FN611.7
Dual High Frequency Differential Amplifier Power Applications 500MHz
CA3102 consists independent differential amplifiers with associated constant current transistors common monolithic substrate. transistors which comprise amplifiers general purpose devices which exhibit noise value excess 1GHz. These features make CA3102 useful from 500MHz. Bias load resistors have been omitted provide maximum application flexibility. monolithic construction CA3102 provides close electrical thermal matching amplifiers. This feature makes this device particularly useful dual channel applications where matched performance channels required. CA3102 separate substrate connection greater design flexibility.
Features
Power Gain 23dB (Typ) 200MHz Noise Figure 4.6dB (Typ) 200MHz Differential Amplifiers Common Substrate Independently Accessible Inputs Outputs Full Military Temperature Range -55oC 125oC Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
Amplifiers Mixers Multifunction Combinations RF/Mixer/Oscillator; Converter/IF Amplifiers (Differential and/or Cascode) Product Detectors Doubly Balanced Modulators Demodulators
Ordering Information
PART NUMBER (BRAND) CA3102E (CA3102E) CA3102M (3102) CA3102MZ (CA3102MZ) (Note) TEMP. RANGE (oC) PACKAGE PDIP SOIC SOIC (Pb-free) PKG. DWG. E14.3 M14.15 M14.15
Balanced Quadrature Detectors Cascade Limiters Synchronous Detectors Balanced Mixers Synthesizers Balanced (Push-Pull) Cascode Amplifiers Sense Amplifiers
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials 100% matte plate termination finish, which RoHS compliant compatible with both SnPb Pb-free soldering operations. Intersil Pb-free products classified Pb-free peak reflow temperatures that meet exceed Pb-free requirements IPC/JEDEC STD-020.
Pinout
CA3102 (PDIP, SOIC) VIEW
SUBSTRATE
SUBSTRATE
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 1-888-468-3774 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2002, 2005. Rights Reserved other trademarks mentioned property their respective owners.
CA3102
Absolute Maximum Ratings
Collector-to-Emitter Voltage, VCEO Collector-to-Base Voltage, VCBO Collector-to-Substrate Voltage, VCIO (Note Emitter-to-Base Voltage, VEBO Collector Current, 50mA
Thermal Information
Thermal Resistance (Typical, Note
(oC/W)
Operating Conditions
Temperature Range -55oC 125oC
PDIP Package SOIC Package Maximum Power Dissipation (Any Transistor) 300mW Maximum Junction Temperature (Plastic Package) 150oC Maximum Storage Temperature Range -65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC (SOIC Lead Tips Only)
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: collector each transistor CA3102 isolated from substrate integral diode. substrate (Terminal must connected most negative point external circuit maintain isolation between transistors provide normal transistor action. measured with component mounted evaluation board free air.
Electrical Specifications
PARAMETER
25oC SYMBOL TEST CONDITIONS UNITS
CHARACTERISTICS EACH DIFFERENTIAL AMPLIFIER Input Offset Voltage (Figures Input Offset Current (Figure Input Bias Current (Figures Temperature Coefficient Magnitude Input Offset Voltage 0.25 13.5 µV/oC
CHARACTERISTICS EACH TRANSISTOR Forward Base-to-Emitter Voltage (Figure ICBO V(BR)CEO V(BR)CBO V(BR)CIO V(BR)EBO
-0.9
mV/oC
Temperature Coefficient Base-to-Emitter Voltage (Figure Collector Cutoff Current (Figure Collector-to-Emitter Breakdown Voltage Collector-to-Base Breakdown Voltage Collector-to-Substrate Breakdown Voltage Emitter-to-Base Breakdown Voltage
10V, 1mA, 10µA, 10µA, 10µA,
0.0013
DYNAMIC CHARACTERISTICS EACH DIFFERENTIAL AMPLIFIER Noise Figure (For Single Transistor) (Figure Gain Bandwidth Product (For Single Transistor) (Figure Collector-Base Capacitance (Figure 100kHz, 500, Bias Voltage Bias Voltage -4.2V, 10MHz Note Note 1.35 0.28 0.15 1.65
Collector-Substrate Capacitance (Figure Common Mode Rejection Ratio Range, Stage (Figure Voltage Gain, Single-Ended Output (Figures
CMRR
CA3102
Electrical Specifications
PARAMETER Insertion Power Gain (Figure Noise Figure (Figure Input Admittance 25oC (Continued) SYMBOL TEST CONDITIONS 12V, Cascode Configuration 2mA. Diff. Amp. Configuration (Each Collector 2mA) 200MHz Cascode Cascode Cascode (Figures Diff. Amp. (Figures Cascode Diff. Amp. Forward Transfer Admittance Cascode (Figures Diff. Amp. (Figures Output Admittance Cascode (Figures Diff. Amp. (Figures NOTES: Terminals Terminals j2.45 0.878 j1.3 j0.008 j0.013 17.9 j30.7 -10.5 -0.503 0.071 j0.62 UNITS
Reverse Transfer Admittance
Schematic Diagram
CA3102E, CA3102M
SUBSTRATE
CA3102 Test Circuits
(+6V) VOUT BIAS VOLTAGE 10µF (10) (Q4) (Q6) (Q5)
(11)
(-6V)
FIGURE CHARACTERISTICS TEST CIRCUIT CA3102
FIGURE RANGE VOLTAGE GAIN TEST CIRCUIT CA3102
CA3102 14(7) (Q6) (Q5)
0.005µF 5(12)
1(8)
SUBSTRATE (Q4) (10) 5.6pF (11) 2.7pF 0.001 0.001µF 0.001µF OUTPUT
INPUT
0.001µF
FERRITE BEADS
0.001µF 100pF
NOTES: Numbers parentheses refer other half CA3102. Approximately Turn Tinned Copper Wire, 5/8" Diameter.
100pF
100pF
470pF +12V 0.001µF
15pF Variable Capacitors (Hammarlund, MAC-15; Equivalent).
FIGURE 200MHz CASCODE POWER GAIN NOISE FIGURE TEST CIRCUIT
CA3102 Typical Performance Curves
25oC INPUT OFFSET VOLTAGE (mV) INPUT BIAS CURRENT (µA)
-40oC 25oC 85oC
EMITTER CURRENT (mA)
EMITTER CURRENT (mA)
FIGURE INPUT OFFSET VOLTAGE EMITTER CURRENT
FIGURE INPUT BIAS CURRENT EMITTER CURRENT
1000 COLLECTOR CUTOFF CURRENT (pA) BASE-TO-EMITTER VOLTAGE
85oC
25oC -40oC
COLLECTOR CURRENT (mA)
0.01 -100
TEMPERATURE
FIGURE BASE-TO-EMITTER VOLTAGE COLLECTOR CURRENT
FIGURE COLLECTOR CUTOFF CURRENT TEMPERATURE
25oC
VOLTAGE GAIN (dB)
25oC 1kHz
CAPACITANCE (pF)
TERMINALS TERMINALS BIAS VOLTAGE
BIAS VOLTAGE TERMINALS
FIGURE CAPACITANCE BIAS VOLTAGE
FIGURE VOLTAGE GAIN BIAS VOLTAGE
CA3102 Typical Performance Curves
VOLTAGE GAIN (dB) 0.01 GAIN BANDWIDTH PRODUCT (GHz) 25oC
(Continued)
COLLECTOR CURRENT (mA) 25oC
FREQUENCY (MHz)
FIGURE VOLTAGE GAIN FREQUENCY
FIGURE GAIN BANDWIDTH PRODUCT COLLECTOR CURRENT
25oC RSOURCE
10Hz NOISE FIGURE (dB)
25oC RSOURCE
10Hz 100Hz
NOISE FIGURE (dB)
100Hz
10kHz
1kHz
1kHz 10kHz 100kHz
100kHz 0.01 COLLECTOR CURRENT (mA) 0.01 COLLECTOR CURRENT (mA)
FIGURE NOISE FIGURE COLLECTOR CURRENT
FIGURE NOISE FIGURE COLLECTOR CURRENT
INPUT CONDUCTANCE (g11) (mS) CASCODE AMPLIFIER 25oC
INPUT SUSCEPTANCE (b11) (mS)
DIFFERENTIAL AMPLIFIER 25oC
SUSCEPTANCE (b11) (mS)
INPUT CONDUCTANCE (g11)
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE INPUT ADMITTANCE (Y11) FREQUENCY
FIGURE INPUT ADMITTANCE (Y11) FREQUENCY
CA3102 Typical Performance Curves
(Continued)
INPUT CONDUCTANCE SUSCEPTANCE (mS)
INPUT CONDUCTANCE SUSCEPTANCE (mS)
CASCODE AMPLIFIER 200MHz 25oC
DIFFERENTIAL AMPLIFIER 200MHz 25oC
COLLECTOR SUPPLY VOLTAGE
COLLECTOR SUPPLY VOLTAGE
FIGURE INPUT ADMITTANCE (Y11) COLLECTOR SUPPLY VOLTAGE
FIGURE INPUT ADMITTANCE (Y11) COLLECTOR SUPPLY VOLTAGE
INPUT CONDUCTANCE SUSCEPTANCE (mS) EMITTER CURRENT (mA) CASCODE AMPLIFIER 200MHz 25oC INPUT CONDUCTANCE SUSCEPTANCE (mS)
DIFFERENTIAL AMPLIFIER 200MHz 25oC
EMITTER CURRENT (mA)
FIGURE INPUT ADMITTANCE (Y11) EMITTER CURRENT
FIGURE INPUT ADMITTANCE (Y11) EMITTER CURRENT
OUTPUT CONDUCTANCE SUSCEPTANCE (mS) FREQUENCY (MHz) CASCODE AMPLIFIER 25oC
DIFFERENTIAL AMPLIFIER 25oC
OUTPUT CONDUCTANCE SUSCEPTANCE (mS)
FREQUENCY (MHz)
FIGURE OUTPUT ADMITTANCE (Y22) FREQUENCY
FIGURE OUTPUT ADMITTANCE (Y22) FREQUENCY
CA3102 Typical Performance Curves
(Continued)
OUTPUT CONDUCTANCE SUSCEPTANCE (mS)
OUTPUT CONDUCTANCE SUSCEPTANCE (mS)
CASCODE AMPLIFIER 200MHz 25oC
DIFFERENTIAL AMPLIFIER 200MHz 25oC
COLLECTOR SUPPLY VOLTAGE
COLLECTOR SUPPLY VOLTAGE
FIGURE OUTPUT ADMITTANCE (Y22) COLLECTOR SUPPLY VOLTAGE
FIGURE OUTPUT ADMITTANCE (Y22) COLLECTOR SUPPLY VOLTAGE
OUTPUT CONDUCTANCE SUSCEPTANCE (mS)
OUTPUT CONDUCTANCE SUSCEPTANCE (mS)
CASCODE AMPLIFIER 200MHz 25oC
DIFFERENTIAL AMPLIFIER 200MHz 25oC
EMITTER CURRENT (mA) EMITTER CURRENT (mA)
FIGURE OUTPUT ADMITTANCE (Y22) EMITTER CURRENT
FIGURE OUTPUT ADMITTANCE (Y22) EMITTER CURRENT
FORWARD TRANSFER CONDUCTANCE (mS)
FORWARD TRANSFER SUSCEPTANCE (mS)
CASCODE AMPLIFIER 25oC
FORWARD TRANSFER CONDUCTANCE SUSCEPTANCE (mS)
FREQUENCY (MHz) DIFFERENTIAL AMPLIFIER 25oC
FREQUENCY (MHz)
FIGURE FORWARD TRANSFER ADMITTANCE (Y21) FREQUENCY
FIGURE FORWARD TRANSFER ADMITTANCE (Y21) FREQUENCY
CA3102 Typical Performance Curves
FORWARD TRANSFER CONDUCTANCE SUSCEPTANCE (mS) CASCODE AMPLIFIER 200MHz 25oC
(Continued)
FORWARD TRANSFER CONDUCTANCE SUSCEPTANCE (mS) DIFFERENTIAL AMPLIFIER 200MHz 25oC
COLLECTOR SUPPLY VOLTAGE
COLLECTOR SUPPLY VOLTAGE
FIGURE FORWARD TRANSFER ADMITTANCE (Y21) COLLECTOR SUPPLY VOLTAGE
FIGURE FORWARD TRANSFER ADMITTANCE (Y21) COLLECTOR SUPPLY VOLTAGE
FORWARD TRANSFER CONDUCTANCE SUSCEPTANCE (mS) FORWARD TRANSFER CONDUCTANCE SUSCEPTANCE (mS) EMITTER CURRENT (mA) CASCODE AMPLIFIER 200MHz 25oC
EMITTER CURRENT (mA) DIFFERENTIAL AMPLIFIER 200MHz 25oC
FIGURE FORWARD TRANSFER ADMITTANCE (Y21) EMITTER CURRENT
FIGURE FORWARD TRANSFER ADMITTANCE (Y21) EMITTER CURRENT
CA3102 Dual-In-Line Plastic Packages (PDIP)
INDEX AREA
E14.3 (JEDEC MS-001-AA ISSUE
LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES Rev. 12/93
0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240
0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280
BASE PLANE SEATING PLANE 0.010 (0.25)
NOTES: Controlling Dimensions: INCH. case conflict between English Metric dimensions, inch dimensions control. Dimensioning tolerancing ANSI Y14.5M-1982. Symbols defined Series Symbol List" Section Publication Dimensions measured with package seated JEDEC seating plane gauge GS-3. dimensions include mold flash protrusions. Mold flash protrusions shall exceed 0.010 inch (0.25mm). measured with leads constrained perpendicular datum measured lead tips with leads unconstrained. must zero greater. maximum dimensions include dambar protrusions. Dambar protrusions shall exceed 0.010 inch (0.25mm). maximum number terminal positions. Corner leads E8.3, E16.3, E18.3, E28.3, E42.6 will have dimension 0.030 0.045 inch (0.76 1.14mm).
0.100 0.300 0.115 0.430 0.150
2.54 7.62 10.92 3.81
2.93
CA3102 Small Outline Plastic Packages (SOIC)
INDEX AREA SEATING PLANE 0.25(0.010)
M14.15 (JEDEC MS-012-AB ISSUE
LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 1.35 0.10 0.33 0.19 8.55 3.80 1.75 0.25 0.51 0.25 8.75 4.00 NOTES Rev. 12/93
0.0532 0.0040 0.013 0.0075 0.3367 0.1497
0.0688 0.0098 0.020 0.0098 0.3444 0.1574
0.10(0.004)
0.25(0.010)
0.050 0.2284 0.0099 0.016 0.2440 0.0196 0.050
1.27 5.80 0.25 0.40 6.20 0.50 1.27
NOTES: Symbols defined Series Symbol List" Section Publication Number Dimensioning tolerancing ANSI Y14.5M-1982. Dimension does include mold flash, protrusions gate burrs. Mold flash, protrusion gate burrs shall exceed 0.15mm (0.006 inch) side. Dimension does include interlead flash protrusions. Interlead flash protrusions shall exceed 0.25mm (0.010 inch) side. chamfer body optional. present, visual index feature must located within crosshatched area. length terminal soldering substrate. number terminal positions. Terminal numbers shown reference only. lead width "B", measured 0.36mm (0.014 inch) greater above seating plane, shall exceed maximum value 0.61mm (0.024 inch). Controlling dimension: MILLIMETER. Converted inch dimensions necessarily exact.
Intersil U.S. products manufactured, assembled tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications viewed www.intersil.com/design/quality
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, www.intersil.com
Other recent searches
UTC812 - UTC812 UTC812 Datasheet
TMC-1C42 - TMC-1C42 TMC-1C42 Datasheet
SIPC42S2N08 - SIPC42S2N08 SIPC42S2N08 Datasheet
MC1200X2-003W - MC1200X2-003W MC1200X2-003W Datasheet
L1799SRSRC - L1799SRSRC L1799SRSRC Datasheet
DMP57D5UFB - DMP57D5UFB DMP57D5UFB Datasheet
CY7B952 - CY7B952 CY7B952 Datasheet
BUH315D - BUH315D BUH315D Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
