Data Sheet June 2006 FN2845.11 100MHz Current Feedback Video Ampl
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HA-5020
Data Sheet June 2006 FN2845.11
100MHz Current Feedback Video Amplifier With Disable
HA-5020 wide bandwidth, high slew rate amplifier optimized video applications gains between Manufactured Intersil's Reduced Feature Complementary Bipolar process, this amplifier uses current mode feedback maintain higher bandwidth given gain than conventional voltage feedback amplifiers. Since closed loop device, HA-5020 offers better gain accuracy lower distortion than open loop buffers. HA-5020 features differential gain phase will drive double terminated coax cables video levels with distortion. Adding gain flatness performance 0.1dB makes this amplifier ideal demanding video applications. bandwidth slew rate HA-5020 relatively independent closed loop gain. 100MHz unity gain bandwidth only decreases 60MHz gain HA-5020 used place conventional will yield significant improvement speed power product. further reduce power, HA-5020 disable function which significantly reduces supply current, while forcing output true high impedance state. This allows outputs multiple amplifiers wire-OR'd into multiplexer configurations. device also includes output short circuit protection output offset voltage adjustment. multi channel versions HA-5020 HA5022 dual with disable, HA5023 dual, HA5013 triple HA5024 quad with disable data sheets.
Features
Wide Unity Gain Bandwidth 100MHz Slew Rate. 800V/µs Output Current ±30mA (Min) Drives 3.5V into Differential Gain 0.03% Differential Phase .0.03° Input Voltage Noise 4.5nV/Hz Supply Current 10mA (Max) Wide Supply Range ±15V Output Enable/Disable High Performance Replacement EL2020 Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
Unity Gain Video/Wideband Buffer Video Gain Block Video Distribution Amp/Coax Cable Driver Flash Driver Waveform Generator Output Driver Current Voltage Converter; Output Buffer Radar Systems Imaging Systems
Pinout
HA-5020 (PDIP, SOIC) VIEW
ININ+ DISABLE
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 1-888-468-3774 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2002, 2005-2006. Rights Reserved other trademarks mentioned property their respective owners.
HA-5020 Ordering Information
PART NUMBER HA3-5020-5 HA3-5020-5Z (Note) HA9P5020-5 HA9P5020-5Z (Note) HA9P5020-5X96 HA9P5020-5ZX96 (Note) PART MARKING HA3-5020-5 HA3-5020-5Z 50205 50205Z 50205 50205Z TEMP. RANGE (°C) PDIP PDIP (Pb-free) SOIC SOIC (Pb-free) SOIC Tape Reel SOIC Tape Reel (Pb-free) PACKAGE PKG. DWG. E8.3 E8.3 M8.15 M8.15 M8.15 M8.15
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials 100% matte plate termination finish, which RoHS compliant compatible with both SnPb Pb-free soldering operations. Intersil Pb-free products classified Pb-free peak reflow temperatures that meet exceed Pb-free requirements IPC/JEDEC STD-020.
FN2845.11 June 2006
HA-5020
Absolute Maximum Ratings (Note
Voltage Between Terminals Input Voltage ±VSUPPLY Differential Input Voltage Output Current Short Circuit Protected
Thermal Information
Thermal Resistance (Typical, Note (°C/W) (°C/W) PDIP Package SOIC Package Maximum Junction Temperature (Plastic Packages, Note 150°C Maximum Storage Temperature Range -65°C 150°C Maximum Lead Temperature (Soldering 10s) 300°C (SOIC Lead Tips Only)
Operating Conditions
Temperature Range HA-5020-5 75°C
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: Maximum power dissipation, including output load, must designed maintain junction temperature below 150°C plastic packages. measured with component mounted effective thermal conductivity test board free air. Tech Brief TB379 details.
Electrical Specifications
VSUPPLY ±15V, 400, 10pF, Unless Otherwise Specified TEST CONDITIONS TEMP. (°C) UNITS
PARAMETER INPUT CHARACTERISTICS Input Offset Voltage (Notes
Full
0.06
µV/°C µA/V µA/V µA/V µA/V µA/V µA/V µA/V µA/V
Average Input Offset Voltage Drift Common Mode Rejection Ratio (Note ±10V ±4.5V ±18V
Full Full
Power Supply Rejection Ratio (Note
Full
Non-Inverting Input (+IN) Current (Note
Full
Common Mode Rejection
±10V ±4.5V ±18V
Full
Power Supply Rejection
Full
Inverting Input (-IN) Current (Note
Full
Common Mode Rejection
±10V ±4.5V ±18V
Full
Power Supply Rejection
Full
TRANSFER CHARACTERISTICS Transimpedance (Notes Full Open Loop Voltage Gain (Note 400, VOUT ±10V 100, VOUT ±2.5V Full Full 3500 1000 V/mA V/mA
Open Loop Voltage Gain
FN2845.11 June 2006
HA-5020
Electrical Specifications
VSUPPLY ±15V, 400, 10pF, Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP. (°C) UNITS
PARAMETER OUTPUT CHARACTERISTICS Output Voltage Swing (Note
±27.5
±12.7 ±11.8 ±31.7
Output Current (Guaranteed Output Voltage Test)
Full
POWER SUPPLY CHARACTERISTICS Quiescent Supply Current (Note Supply Current, Disabled (Note Disable Input Current Minimum Current Disable (Note Maximum Current Enable (Note CHARACTERISTICS Slew Rate (Note Full Full Power Bandwidth (Note (Guaranteed Slew Rate Test) Rise Time (Note Fall Time (Note Propagation Delay (Notes -3dB Bandwidth (Note Settling Time Settling Time 0.25% CHARACTERISTICS +10, 383) Slew Rate (Notes Full Full Power Bandwidth (Note (Guaranteed Slew Rate Test) Rise Time (Note Fall Time (Note Propagation Delay (Notes -3dB Bandwidth Settling Time Settling Time 0.1% INTERSIL VALUE ADDED SPECIFICATIONS Input Noise Voltage (Note +Input Noise Current (Note -Input Noise Current (Note Input Common Mode Range -IBIAS Adjust Range (Note Overshoot (Note 1kHz 1kHz 1kHz Full Full nV/Hz pA/Hz pA/Hz VOUT 100mV Output Step Output Step Full 14.3 11.1 1100 17.5 V/µs V/µs VOUT 100mV Output Step Output Step Full 12.7 11.1 V/µs V/µs DISABLE DISABLE Full Full Full Full Full
FN2845.11 June 2006
HA-5020
Electrical Specifications
VSUPPLY ±15V, 400, 10pF, Unless Otherwise Specified (Continued) TEST CONDITIONS ±10V, VOUT DISABLE VOUT ±10V TEMP. (°C) Full Full DISABLE UNITS
PARAMETER Output Current, Short Circuit (Note Output Current, Disabled (Note Output Disable Time (Notes Output Enable Time (Notes Supply Voltage Range Output Capacitance, Disabled (Note VIDEO CHARACTERISTICS Differential Gain (Notes Differential Phase (Notes Gain Flatness
5MHz
0.03 0.03
Electrical Specifications
+5V, -5V, 400, 10pF, Unless Otherwise Specified. Parameters tested. limits guaranteed based characterizations, reflect lot-to-lot variation. TEST CONDITIONS TEMP. (°C) UNITS
PARAMETER INPUT CHARACTERISTICS Input Offset Voltage (Notes
Full
0.06
µV/°C µA/V µA/V µA/V µA/V µA/V µA/V µA/V µA/V
Average Input Offset Voltage Drift Common Mode Rejection Ratio (Notes ±3.5V ±6.5V
Full Full
Power Supply Rejection Ratio (Note
Full
Non-Inverting Input (+IN) Current (Note
Full
Common Mode Rejection (Note
Full
Power Supply Rejection
±3.5V ±6.5V
Full
Inverting Input (-IN) Current (Note
Full
Common Mode Rejection (Note
Full
Power Supply Rejection
±3.5V ±6.5V
Full
TRANSFER CHARACTERISTICS Transimpedance (Notes Full Open Loop Voltage Gain 400, VOUT ±2.5V Full 1000 V/mA V/mA
FN2845.11 June 2006
HA-5020
Electrical Specifications
+5V, -5V, 400, 10pF, Unless Otherwise Specified. Parameters tested. limits guaranteed based characterizations, reflect lot-to-lot variation. (Continued) TEST CONDITIONS 100, VOUT ±2.5V TEMP. (°C) Full UNITS
PARAMETER Open Loop Voltage Gain
OUTPUT CHARACTERISTICS Output Voltage Swing (Note Output Current (Guaranteed Output Voltage Test) POWER SUPPLY CHARACTERISTICS Quiescent Supply Current (Note Supply Current, Disabled (Note Disable Input Current Minimum Current Disable (Note Maximum Current Enable (Note CHARACTERISTICS Slew Rate (Note Full Power Bandwidth (Note Rise Time (Note Fall Time (Note Propagation Delay (Note Overshoot -3dB Bandwidth (Note Settling Time Settling Time 0.25% CHARACTERISTICS 681) Slew Rate (Note Full Power Bandwidth (Note Rise Time (Note Fall Time (Note Propagation Delay (Note Overshoot -3dB Bandwidth (Note Settling Time Settling Time 0.25% CHARACTERISTICS +10, 383) Slew Rate (Note Full Power Bandwidth (Note Rise Time (Note Fall Time (Note Propagation Delay (Note Overshoot V/µs VOUT 100mV Output Step Output Step V/µs VOUT 100mV Output Step Output Step V/µs DISABLE DISABLE Full Full Full Full Full Full ±2.5 ±2.5 ±16.6 ±16.6 ±3.0 ±3.0
FN2845.11 June 2006
HA-5020
Electrical Specifications
+5V, -5V, 400, 10pF, Unless Otherwise Specified. Parameters tested. limits guaranteed based characterizations, reflect lot-to-lot variation. (Continued) TEST CONDITIONS VOUT 100mV Output Step Output Step TEMP. (°C) UNITS
PARAMETER -3dB Bandwidth (Note Settling Time Settling Time 0.25% INTERSIL VALUE ADDED SPECIFICATIONS Input Noise Voltage (Note +Input Noise Current (Note -Input Noise Current (Note Input Common Mode Range Output Current, Short Circuit Output Current, Disabled (Note Output Disable Time (Notes Output Enable Time (Notes Supply Voltage Range Output Capacitance, Disabled (Note VIDEO CHARACTERISTICS Differential Gain (Notes Differential Phase (Notes Gain Flatness NOTES:
1kHz 1kHz 1kHz
Full
±2.5V
nV/Hz pA/Hz pA/Hz
±2.5V, VOUT DISABLE VOUT ±2.5V,
Full Full
DISABLE
5MHz
0.03 0.03
Suggested Adjust Circuit: inverting input current (-IBIAS) adjusted with external between pins wiper connected Since -IBIAS flows through feedback resistor (RF), result adjustment offset voltage. amount offset voltage adjustment determined value (VOS -IBIAS*RF). 100, 10V. This minimum current which must pulled Disable order disable output. output considered disabled when -10mV VOUT +10mV. This maximum current that pulled Disable with HA-5020 remaining enabled. HA-5020 considered disabled when supply current decreased least 0.5mA. VOUT switches from -10V +10V, from +10V -10V. Specification from points. Slew Rate FPBW PEAK 10V. PEAK
100, VOUT Measured from points rise/fall times; from points input output propagation delay. This parameter tested. limits guaranteed based characterization, reflect lot-to-lot variation. +10V, Disable +15V Measured from point Disable VOUT +10V, Disable +15V. Measured from point Disable VOUT 10V. Force VOUT from ±10V, 50ns. Measured with VM700A video tester using NTC-7 composite VITS. "Typical Performance Curves" more information. ±2.5V. -40°C product tested ±2.25V because short test duration does allow self heating. 100. 2.5V. This minimum current which must pulled Disable order disable output. output considered disabled when -10mV VOUT +10mV. VOUT switches from +2V, from -2V. Specification from points. Slew Rate FPBW PEAK PEAK Force VOUT from ±2.5V, 50ns. +2V, Disable Measured from point Disable VOUT +2V, Disable +5V. Measured from point Disable VOUT
FN2845.11 June 2006
HA-5020 Test Circuits Waveforms
HP4195 NETWORK ANALYZER
FIGURE TEST CIRCUIT TRANSIMPEDANCE MEASUREMENTS
VOUT
VOUT
FIGURE SMALL SIGNAL PULSE RESPONSE CIRCUIT
FIGURE LARGE SIGNAL PULSE RESPONSE CIRCUIT
VOUT
VOUT
Vertical Scale: 100mV/Div., VOUT 100mV/Div. Horizontal Scale: 20ns/Div. FIGURE SMALL SIGNAL RESPONSE
Vertical Scale: 1V/Div., VOUT 1V/Div. Horizontal Scale: 50ns/Div. FIGURE LARGE SIGNAL RESPONSE
FN2845.11 June 2006
2.5K QP11 QP14 QP18 QP16 QP10 QN12 QP12 QP13 QN13 1.4pF QP17 QN17 1.4pF QN15 QN10 QN14 QN16 QN18 QN20 QN19 QP15 QP19 QP20
Schematic Diagram
1.25K QN11
HA-5020
QN21
FN2845.11 June 2006
HA-5020 Application Information
Optimum Feedback Resistor
plots inverting non-inverting frequency response illustrate performance HA-5020 various closed loop gain configurations. Although bandwidth dependency closed loop gain isn't severe that voltage feedback amplifier, there appreciable decrease bandwidth higher gains. This decrease minimized taking advantage current feedback amplifier's unique relationship between bandwidth current feedback amplifiers require feedback resistor, even unity gain applications, conjunction with internal compensation capacitor, sets dominant pole frequency response. Thus, amplifier's bandwidth inversely proportional HA-5020 design optimized 1000 gain Decreasing unity gain application decreases stability, resulting excessive peaking overshoot. higher gains amplifier more stable, decreased trade-off stability bandwidth. table below lists recommended values various gains, expected bandwidth.
BANDWIDTH (MHz)
Driving Capacitive Loads
Capacitive loads will degrade amplifier's phase margin resulting frequency response peaking possible oscillations. most cases oscillation avoided placing isolation resistor series with output shown Figure
VOUT
FIGURE PLACEMENT OUTPUT ISOLATION RESISTOR,
selection criteria isolation resistor highly dependent load, been determined good starting value.
Enable/Disable Function
When enabled amplifier functions normal current feedback amplifier with data electrical specifications table being valid applicable. When disabled amplifier output assumes true high impedance state supply current reduced significantly. circuit shown Figure simplified schematic enable/disable function. large value resistors series with DISABLE makes appear current source driver. When driver pulls this current flows into driver. This current, which large 350µA when external circuit process variables their extremes, required insure that point achieves proper potential disable output. driver must have compliance capability sinking this current.
+VCC QP18
GAIN (ACL)
1000 1000
Board Layout
frequency response this amplifier depends greatly amount care taken designing board. inductance components such chip resistors chip capacitors strongly recommended. leaded components used leads must kept short especially power supply decoupling components those components connected inverting input. Attention must given decoupling power supplies. large value (10µF) tantalum electrolytic capacitor parallel with small value (0.1µF) chip capacitor works well most cases. ground plane strongly recommended control noise. Care must also taken minimize capacitance ground seen amplifier's inverting input (-IN). larger this capacitance, worse gain peaking, resulting pulse overshoot possible instability. recommended that ground plane removed under traces connected -IN, that connections kept short possible minimize capacitance from this node ground.
ENABLE/ DISABLE INPUT
FIGURE SIMPLIFIED SCHEMATIC ENABLE/DISABLE FUNCTION
When DISABLE driven with dedicated gate. maximum level output voltage gate, 0.4V, enough compliance insure that amplifier will always disabled even though will turn gate will sink enough current keep point proper voltage. When greater than DISABLE should driven with open collector device that breakdown rating greater than
FN2845.11 June 2006
HA-5020
Referring Figure seen that will pull-up resistor +VCC DISABLE left open. those cases where enable/disable function required circuits some circuits permanently enabled letting DISABLE float. driver used enable/disable level, sure that driver does sink more than 20µA when DISABLE high level. gates, especially CMOS versions, violate this criteria permissible control enable/disable function with TTL. such converter. first problem source impedance which tends make amplifiers oscillate causes gain errors. second problem multiplexer which supplies gain, introduces kinds distortion limits frequency response. Using amps which have enable/disable function, such HA-5020, eliminates multiplexer problems because external chip needed, HA-5020 drive impedance (large capacitance) loads series isolation resistor used. Referring Figure both inputs terminated their characteristic impedance; typical video applications. Since drivers usually terminated their characteristic impedance input gain 0.5, thus amplifiers, configured gain circuit gain equal one. Resistors determine amplifier gain, different gain desired should changed according equation R3/R2). sets frequency response amplifier should refer manufacturers data sheet before changing value. asymmetrical charge/discharge time circuit which configures break before make switch prevent both amplifiers from being active simultaneously. this design extended more channels drive logic must designed break before make. enclosed feedback loop amplifier that large open loop amplifier gain will present load with small closed loop output impedance while keeping amplifier stable values load capacitance. circuit shown Figure tested full range capacitor values with oscillations being observed; thus, problem been solved. frequency gain characteristics circuit those amplifier independent multiplexing action; thus, problem been solved. multiplexer transition time approximately 15µs with component values shown.
Typical Applications
Channel Video Multiplexer
Referring amplifier Figure terminates cable characteristic impedance back terminates cable characteristic impedance. amplifier gain configuration yield overall network gain when driving double terminated cable. value changed different network gain desired. holds disable ground thus inhibiting amplifier until switch, thrown position position switch pulls disable plus supply rail thereby enabling amplifier. Since actual signal switching takes place within amplifier, it's differential gain phase parameters, which 0.03% 0.03° respectively, determine circuit's performance. other circuit, U1B, operates similar manner. When plus supply rail disable driven dedicated gate discussed earlier. multiplexer equivalent used select channels logic must break before make. When these conditions satisfied HA-5020 often used remote video multiplexer, multiplexer extended adding more amplifier ICs.
Impedance Multiplexer
common problems surface when multiplex multiple high speed signals into impedance source
VIDEO INPUT
2000
VIDEO OUTPUT LOAD
0.1µF
10µF
VIDEO INPUT
0.1µF
10µF
2000
NOTES: HA-5020. resistors break before make. ground plane.
FIGURE CHANNEL HIGH IMPEDANCE MULTIPLEXER
FN2845.11 June 2006
HA-5020
INPUT INPUT 2000 CHANNEL SWITCH 0.047µF INHIBIT 100K 2000 0.047µF 1N4148 0.01µF
0.01µF
OUTPUT
NOTES: HA-5020. CD4011.
1N4148
FIGURE IMPEDANCE MULTIPLEXER
Typical Performance Curves
INPUT NOISE VOLTAGE (nV/Hz)
VSUPPLY ±15V, 400, 25°C, unless otherwise specified
INPUT NOISE CURRENT (pA/Hz)
-INPUT NOISE CURRENT
OFFSET VOLTAGE (mV)
VSUPPLY ±15V VSUPPLY ±4.5V
INPUT NOISE VOLTAGE
VSUPPLY ±10V
+INPUT NOISE CURRENT FREQUENCY (Hz) 100k
TEMPERATURE (°C)
FIGURE INPUT NOISE FREQUENCY (AVERAGE UNITS FROM LOTS)
FIGURE INPUT OFFSET VOLTAGE TEMPERATURE (ABSOLUTE VALUE AVERAGE UNITS FROM LOTS)
-0.5 BIAS CURRENT (µA) BIAS CURRENT (µA)
VSUPPLY ±15V VSUPPLY ±10V
-1.0
VSUPPLY ±15V VSUPPLY ±10V
-1.5 VSUPPLY ±4.5V
-2.0
VSUPPLY ±4.5V
-2.5
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE +INPUT BIAS CURRENT TEMPERATURE (AVERAGE UNITS FROM LOTS)
FIGURE -INPUT BIAS CURRENT TEMPERATURE (ABSOLUTE VALUE AVERAGE UNITS FROM LOTS)
FN2845.11 June 2006
HA-5020 Typical Performance Curves
VSUPPLY ±15V, 400, 25°C, unless otherwise specified (Continued)
125°C SUPPLY CURRENT (mA)
OPEN LOOP GAIN
VSUPPLY ±15V VSUPPLY ±10V
25°C -55°C
VSUPPLY ±4.5V
TEMPERATURE (°C) SUPPLY VOLTAGE (±V)
FIGURE TRANSIMPEDANCE TEMPERATURE (AVERAGE UNITS FROM LOTS)
FIGURE SUPPLY CURRENT SUPPLY VOLTAGE (AVERAGE UNITS FROM LOTS)
DISABLE SUPPLY CURRENT (mA) 125°C SUPPLY VOLTAGE (±V) -55°C SUPPLY CURRENT (mA)
DISABLE INPUT VOLTAGE VSUPPLY ±4.5V VSUPPLY ±10V VSUPPLY ±15V
25°C
FIGURE DISABLE SUPPLY CURRENT SUPPLY VOLTAGE (AVERAGE UNITS FROM LOTS)
FIGURE SUPPLY CURRENT DISABLE INPUT VOLTAGE
FEEDTHROUGH (dB) OUTPUT LEAKAGE CURRENT (µA) DISABLE 5VP-P
VOUT +10V
VOUT -10V -0.5
-1.0
FREQUENCY (Hz)
TEMPERATURE (°C)
FIGURE DISABLE MODE FEEDTHROUGH FREQUENCY
FIGURE DISABLED OUTPUT LEAKAGE TEMPERATURE (AVERAGE UNITS FROM LOTS)
FN2845.11 June 2006
HA-5020 Typical Performance Curves
ENABLE TIME (µs) DISABLE TIME ENABLE TIME
VSUPPLY ±15V, 400, 25°C, unless otherwise specified (Continued)
NORMALIZED GAIN (dB) DISABLE TIME (µs) 120M FREQUENCY (Hz) VOUT 0.2VP-P 10pF
OUTPUT VOLTAGE
FIGURE ENABLE/DISABLE TIME OUTPUT VOLTAGE (AVERAGE UNITS FROM LOTS)
FIGURE NON-INVERTING GAIN FREQUENCY
NORMALIZED GAIN (dB) 120M FREQUENCY (Hz) VOUT 0.2VP-P NON-INVERTING PHASE 10pF -135 -180 -225 -270 120M +180 +135 -135 -180 INVERTING PHASE GAIN PEAKING (dB)
FREQUENCY (Hz)
FIGURE INVERTING FREQUENCY RESPONSE
FIGURE PHASE FREQUENCY
10pF VOUT 0.2VP-P -3dB BANDWIDTH (MHz) -3dB BANDWIDTH
10pF -3dB BANDWIDTH (MHz) VOUT 0.2VP-P GAIN PEAKING (dB) -3dB BANDWIDTH
GAIN PEAKING
GAIN PEAKING
LOAD RESISTANCE
1000
1.1k
1.3k
1.5k
FEEDBACK RESISTOR
FIGURE BANDWIDTH GAIN PEAKING LOAD RESISTANCE
FIGURE BANDWIDTH GAIN PEAKING FEEDBACK RESISTANCE
FN2845.11 June 2006
HA-5020 Typical Performance Curves
10pF, VOUT 0.2VP-P -3dB BANDWIDTH (MHz) GAIN PEAKING (dB) -3dB BANDWIDTH (MHz)
VSUPPLY ±15V, 400, 25°C, unless otherwise specified (Continued)
1.2k 10pF, VOUT 0.2VP-P GAIN PEAKING
-3dB BANDWIDTH
GAIN PEAKING
1.0k FEEDBACK RESISTOR
1000
FEEDBACK RESISTOR
FIGURE BANDWIDTH GAIN PEAKING FEEDBACK RESISTANCE
FIGURE BANDWIDTH FEEDBACK RESISTANCE
REJECTION RATIO (dB)
REJECTION RATIO (dB)
+PSRR -PSRR CMRR
PSRR
CMRR
100k
TEMPERATURE (°C)
FREQUENCY (Hz)
FIGURE REJECTION RATIOS TEMPERATURE (AVERAGE UNITS FROM LOTS)
FIGURE REJECTION RATIOS FREQUENCY
OUTPUT SWING OVERHEAD (±V) VSUPPLY ±15V
(±VSUPPLY) (±VOUT OUTPUT VOLTAGE SWING (VP-P)
VSUPPLY ±15V VSUPPLY ±10V LOAD RESISTANCE VSUPPLY ±4.5V
VSUPPLY ±10V
VSUPPLY ±4.5V
TEMPERATURE (°C)
FIGURE OUTPUT SWING OVERHEAD TEMPERATURE (AVERAGE UNITS FROM LOTS)
FIGURE OUTPUT VOLTAGE SWING LOAD RESISTANCE
FN2845.11 June 2006
HA-5020 Typical Performance Curves
SHORT CIRCUIT CURRENT (mA) -ISC +ISC
VSUPPLY ±15V, 400, 25°C, unless otherwise specified (Continued)
PROPAGATION DELAY (ns)
RLOAD VOUT 1VP-P
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE SHORT CIRCUIT CURRENT LIMIT TEMPERATURE
FIGURE PROPAGATION DELAY TEMPERATURE (AVERAGE UNITS FROM LOTS)
11.0 10.0 SUPPLY VOLTAGE (±V) RLOAD VOUT 1VP-P 383) OVERSHOOT
VOUT 100mVP-P 10pF VSUPPLY VSUPPLY ±15V 1000 LOAD RESISTANCE
FIGURE PROPAGATION DELAY SUPPLY VOLTAGE (AVERAGE UNITS FROM LOTS)
PROPAGATION DELAY (ns)
FIGURE SMALL SIGNAL OVERSHOOT LOAD RESISTANCE
2VP-P 30pF DISTORTION (dBc) DIFFERENTIAL GAIN ORDER (GEN) ORDER (GENERATOR) (GEN) FREQUENCY (Hz)
0.07 FREQUENCY 3.58MHz 0.06
0.05 RLOAD 0.04
0.03
RLOAD
0.02
RLOAD
0.01
SUPPLY VOLTAGE (±V)
FIGURE DISTORTION FREQUENCY
FIGURE DIFFERENTIAL GAIN SUPPLY VOLTAGE (AVERAGE UNITS FROM LOTS)
FN2845.11 June 2006
HA-5020 Typical Performance Curves
0.07 0.06 DIFFERENTIAL PHASE SLEW RATE (V/µs) 0.05 0.04 0.03 0.02 RLOAD 0.01 SUPPLY VOLTAGE (±V) RLOAD RLOAD 1000
VSUPPLY ±15V, 400, 25°C, unless otherwise specified (Continued)
1200
FREQUENCY 3.58MHz
VOUT 20VP-P
+SLEW RATE -SLEW RATE
TEMPERATURE (°C)
FIGURE DIFFERENTIAL PHASE SUPPLY VOLTAGE (AVERAGE UNITS FROM LOTS)
FIGURE SLEW RATE TEMPERATURE (AVERAGE UNITS FROM LOTS)
Typical Performance Curves
NORMALIZED GAIN (dB)
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified
NORMALIZED GAIN (dB) FREQUENCY (Hz) 100M 200M
FREQUENCY (Hz)
100M
200M
FIGURE NON-INVERTING FREQUENCY RESPONSE
FIGURE INVERTING FREQUENCY RESPONSE
-3dB BANDWIDTH (MHz)
NON-INVERTING PHASE FREQUENCY (Hz) 100M 200M -135 -180 INVERTING PHASE
VOUT 0.2VP-P 10pF
GAIN PEAKING 1100 1300 1500
FEEDBACK RESISTOR
FIGURE PHASE RESPONSE FUNCTION FREQUENCY
FIGURE BANDWIDTH GAIN PEAKING FEEDBACK RESISTANCE
FN2845.11 June 2006
GAIN PEAKING (dB)
-3dB BANDWIDTH
HA-5020 Typical Performance Curves
-3dB BANDWIDTH (MHz)
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
VOUT 0.2VP-P 10pF -3dB BANDWIDTH (MHz)
-3dB BANDWIDTH GAIN PEAKING (dB)
-3dB BANDWIDTH GAIN PEAKING (dB)
GAIN PEAKING 1100
GAIN PEAKING
VOUT 0.2VP-P 10pF
LOAD RESISTOR
1000
FEEDBACK RESISTOR
FIGURE BANDWIDTH GAIN PEAKING FEEDBACK RESISTANCE
FIGURE BANDWIDTH GAIN PEAKING LOAD RESISTANCE
VOUT 0.2VP-P 10pF REJECTION RATIO (dB) FEEDBACK RESISTOR
-3dB BANDWIDTH (MHz)
CMRR
NEGATIVE PSRR POSITIVE PSRR 0.01M 0.1M FREQUENCY (Hz)
0.001M
FIGURE BANDWIDTH FEEDBACK RESISTANCE
FIGURE REJECTION RATIOS FREQUENCY
PROPAGATION DELAY (ns)
VOUT 1.0VP-P SLEW RATE (V/µs)
VOUT 2VP-P SLEW RATE SLEW RATE
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE PROPAGATION DELAY TEMPERATURE
FIGURE SLEW RATE TEMPERATURE
FN2845.11 June 2006
HA-5020 Typical Performance Curves
NORMALIZED GAIN (dB) -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 FREQUENCY (Hz) NORMALIZED GAIN (dB) VOUT 0.2VP-P 10pF
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
-0.2 -0.4 -0.6 -0.8 -1.0 -1.2 FREQUENCY (Hz) VOUT 0.2VP-P 10pF
FIGURE NON-INVERTING GAIN FLATNESS FREQUENCY
FIGURE INVERTING GAIN FLATNESS FREQUENCY
1000
CURRENT NOISE (pA/Hz) REJECTION RATIO (dB) +PSRR
VOLTAGE NOISE (nV/Hz)
-INPUT NOISE CURRENT
CMRR -PSRR
+INPUT NOISE CURRENT +INPUT NOISE VOLTAGE
0.01k
0.1k
FREQUENCY (Hz)
100k
-100
TEMPERATURE (°C)
FIGURE INPUT NOISE CHARACTERISTICS
FIGURE REJECTION RATIO TEMPERATURE
ENABLE
ENABLE DISABLE DISABLE DISABLE TIME (µs)
OUTPUT SWING
ENABLE TIME (ns) TEMPERATURE (°C)
-2.5 -2.0 -1.5 -1.0 -0.5
OUTPUT VOLTAGE
FIGURE OUTPUT SWING TEMPERATURE
FIGURE ENABLE/DISABLE TIME OUTPUT VOLTAGE
FN2845.11 June 2006
HA-5020 Typical Performance Curves
DISABLE 5VP-P
VSUPPLY ±5V, 400, 25°C, Unless Otherwise Specified (Continued)
FEEDTHROUGH (dB) 0.1M
TRANSIMPEDANCE
0.01 0.001 PHASE ANGLE
FREQUENCY (Hz)
0.001M
0.01M
0.1M FREQUENCY (Hz)
-135 100M
FIGURE DISABLE FEEDTHROUGH FREQUENCY
FIGURE TRANSIMPEDANCE FREQUENCY
TRANSIMPEDANCE
0.01 0.001 -135 0.001M 0.01M 0.1M 100M FREQUENCY (Hz) PHASE ANGLE
FIGURE TRANSIMPEDENCE FREQUENCY
FN2845.11 June 2006
HA-5020 Characteristics
DIMENSIONS: 1640µm 1520µm 483µm METALLIZATION: Type: Aluminum, Copper Thickness: SUBSTRATE POTENTIAL (Powered Up): VPASSIVATION: Type: Nitride over Silox Silox Thickness: Nitride Thickness: TRANSISTOR COUNT: PROCESS: High Frequency Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5020
DISABLE
FN2845.11 June 2006
HA-5020 Dual-In-Line Plastic Packages (PDIP)
INDEX AREA
E8.3 (JEDEC MS-001-BA ISSUE
LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 0.39 2.93 0.356 1.15 0.204 9.01 0.13 7.62 6.10 5.33 4.95 0.558 1.77 0.355 10.16 8.25 7.11 NOTES Rev. 12/93
0.015 0.115 0.014 0.045 0.008 0.355 0.005 0.300 0.240
0.210 0.195 0.022 0.070 0.014 0.400 0.325 0.280
BASE PLANE SEATING PLANE 0.010 (0.25)
NOTES: Controlling Dimensions: INCH. case conflict between English Metric dimensions, inch dimensions control. Dimensioning tolerancing ANSI Y14.5M-1982. Symbols defined Series Symbol List" Section Publication Dimensions measured with package seated JEDEC seating plane gauge GS-3. dimensions include mold flash protrusions. Mold flash protrusions shall exceed 0.010 inch (0.25mm). measured with leads constrained perpendicular datum measured lead tips with leads unconstrained. must zero greater. maximum dimensions include dambar protrusions. Dambar protrusions shall exceed 0.010 inch (0.25mm). maximum number terminal positions. Corner leads E8.3, E16.3, E18.3, E28.3, E42.6 will have dimension 0.030 0.045 inch (0.76 1.14mm).
0.100 0.300 0.115 0.430 0.150
2.54 7.62 10.92 3.81 2.93
FN2845.11 June 2006
HA-5020 Small Outline Plastic Packages (SOIC)
INDEX AREA SEATING PLANE 0.25(0.010)
M8.15 (JEDEC MS-012-AA ISSUE
LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 1.35 0.10 0.33 0.19 4.80 3.80 5.80 0.25 0.40 1.75 0.25 0.51 0.25 5.00 4.00 6.20 0.50 1.27 NOTES Rev. 6/05
0.0532 0.0040 0.013 0.0075 0.1890 0.1497 0.2284 0.0099 0.016
0.0688 0.0098 0.020 0.0098 0.1968 0.1574 0.2440 0.0196 0.050
0.10(0.004)
0.050
1.27
0.25(0.010)
NOTES: Symbols defined Series Symbol List" Section Publication Number Dimensioning tolerancing ANSI Y14.5M-1982. Dimension does include mold flash, protrusions gate burrs. Mold flash, protrusion gate burrs shall exceed 0.15mm (0.006 inch) side. Dimension does include interlead flash protrusions. Interlead flash protrusions shall exceed 0.25mm (0.010 inch) side. chamfer body optional. present, visual index feature must located within crosshatched area. length terminal soldering substrate. number terminal positions. Terminal numbers shown reference only. lead width "B", measured 0.36mm (0.014 inch) greater above seating plane, shall exceed maximum value 0.61mm (0.024 inch). Controlling dimension: MILLIMETER. Converted inch dimensions necessarily exact.
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FN2845.11 June 2006
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