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IRMCF311 Dual Channel Sensorless Motor Control Appliances (M


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Data Sheet PD60312
IRMCF311
Dual Channel Sensorless Motor Control Appliances
(Motion Control Engine) Hardware based computation engine high efficiency sinusoidal sensorless control permanent magnet motor Integrated Power Factor Correction control Supports both interior surface permanent magnet motors Built-in hardware peripheral single shunt current feedback reconstruction external current voltage sensing operational amplifier required Dual channel three/two-phase Space Vector Two-channel analog output (PWM) Embedded 8-bit high speed microcontroller (8051) flexible man-machine control JTAG programming port emulation/debugger serial communication interface (UART) I2C/SPI serial interface Watchdog timer with independent analog clock Three general purpose timers special timers: periodic timer, capture timer External EEPROM internal facilitate debugging code development compatible with IRMCK311, OTP-ROM version 1.8V/3.3V CMOS
Product Summary
Maximum crystal frequency Maximum internal clock (SYSCLK) frequency Sensorless control computation time
signed bytes bits/ SYSCLK bits SYSCLK bits 57.6K QFP64
computation data range
Program loaded from external EEPROM bytes Data GateKill latency (digital filtered) carrier frequency counter input channels converter resolution converter conversion speed 8051 instruction execution speed Analog output (PWM) resolution UART baud rate (typ) Number (max) Package (lead-free)
Description
IRMCF311 high performance based motion control designed primarily appliance applications. IRMCF311 designed achieve cost high performance control solutions advanced inverterized appliance motor control. IRMCF311 contains computation engines. Motion Control Engine (MCETM) sensorless control permanent magnet motors; other 8-bit high-speed microcontroller (8051). Both computation engines integrated into monolithic chip. MCEcontains collection control elements such Proportional plus Integral, Vector rotator, Angle estimator, Multiply/Divide, loss SVPWM, Single Shunt IFB. user program motion control algorithm connecting these control elements using graphic compiler. components sensorless control algorithms, such Angle Estimator, provided complete pre-defined control blocks implemented hardware. unique analog/digital circuit algorithm fully support single shunt current reconstruction also provided. 8051 microcontroller performs 2-cycle instruction execution (60MIPS 120MHz). 8051 microcontroller connected dual port process signal monitoring command input. advanced graphic compiler MCEis seamlessly integrated into MATLAB/Simulink environment, while third party JTAG based emulator tools supported 8051 developments. IRMCF311 comes with small QFP64 lead-free package.
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IRMCF311 TABLE CONTENTS
Overview. IRMCF311 Block Diagram Main Functions Pinout. Input/Output IRMCF311. 8051 Peripheral Interface Group. Motion Peripheral Interface Group Analog Interface Group Power Interface Group Test Interface Group Application Connections Characteristics Absolute Maximum Ratings System Clock Frequency Power Consumption. Digital Characteristics. Oscillator Characteristics. Analog Characteristics Analog Characteristics Under Voltage Lockout Characteristics CMEXT AREF Characteristics. Characteristics Characteristics Analog Digital Converter Characteristics Characteristics. Characteristics SYNC SVPWM Conversion Timing. GATEKILL SVPWM Timing. Interrupt Timing Timing Timing. 7.9.1 Write timing 7.9.2 Read Timing. 7.10 UART Timing 7.11 CAPTURE Input Timing 7.12 JTAG Timing List. Package Dimensions. Part Marking Information.
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IRMCF311
TABLE FIGURES
Figure Figure Figure Figure Figure Figure Typical Application Block Diagram Using IRMCF311. IRMCF311 Internal Block Diagram IRMCF311 Configuration Input/Output IRMCF311 Application Connection IRMCF311 Clock Frequency Power Consumption.
TABLE TABLES
Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Absolute Maximum Ratings. System Clock Frequency. Digital Characteristics Characteristics Analog Characteristics Analog Characteristics UVcc Characteristics CMEXT AREF Characteristics. Characteristics Converter Characteristics. Current Sensing Characteristics. Voltage sensing Characteristics. SYNC Characteristics. GATEKILL SVPWM Timing Interrupt Timing. Timing Write Timing. Read Timing. UART Timing. CAPTURE Timing JTAG Timing. List
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IRMCF311 Overview
IRMCF311 International Rectifier integrated circuit device primarily designed onechip solution complete inverter controlled conditioner motor control applications. Unlike traditional microcontroller DSP, IRMCF311 provides built-in closed loop sensorless control algorithm using unique Motion Control Engine (MCETM) permanent magnet motors. MCEconsists collection control elements, motion peripherals, dedicated motion control sequencer dual port internal signal nodes. IRMCF311 also employs unique single shunt current reconstruction circuit eliminate additional analog/digital circuitry enables direct shunt resistor interface Motion control programming achieved using dedicated graphical compiler integrated into MATLAB/Simulinkdevelopment environment. Sequencing, user interface, host communication, upper layer control tasks implemented 8051 high-speed 8-bit microcontroller. 8051 microcontroller equipped with JTAG port facilitate emulation debugging tools. Figure shows typical application schematics using IRMCF311. IRMCF311 intended development purpose contains bytes RAM, which loaded from external EEPROM 8051 program execution. high volume production, IRMCK311 contains place program reduce cost. Both IRMCF311 IRMCK311 come same 64-pin package with identical configuration facilitate board layout transition mass production
RS232C Serial Comm
Field Communication Service indoor unit
IGBT inverter
Galvanic Isolation
Galvanic Isolation
Motor PFC+GF
Compressor Motor
input Passive (100EMI 230V) Filter IRMCF311
Fault
IRS2630D
User Parameter Storage User Program Storage Analog input
EEPROM EEPROM
3.3V 1.8V Multple Power supply Fault Temp sense Motor
60-100W Motor
Temperature feedback Analog actuators Relay, Valves, Switches
Analog output Digital
IRS2631D
FREDFET inveter
Figure Typical Application Block Diagram Using IRMCF311
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IRMCF311 IRMCF311 Block Diagram Main Functions
IRMCF311 block diagram shown Figure
8bit Address/Data
Figure IRMCF311 Internal Block Diagram
IRMCF311 contains following functions sensorless motor control applications: Motion Control Engine (MCETM) Proportional plus Integral block pass filter Differentiator (high pass filter) Ramp Limit Angle estimate (sensorless control) Inverse Clark transformation Vector rotator latch
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Motion Control
IRMCF311
Peak detect Transition Multiply-divide (signed unsigned) Divide (signed unsigned) Adder Subtractor Comparator Counter Accumulator Switch Shift ATAN (arc tangent) Function block (any curve fitting, nonlinear function) 16-bit wide Logic operations (AND, XOR, NOT, NEGATE) MCEprogram data memory byte). Note MCEcontrol sequencer
8051 microcontroller Three 16-bit timer 16-bit periodic timer 16-bit analog watchdog timer 16-bit capture timer discrete I/Os Six-channel 12-bit Four buffered channels 1.2V input) unbuffered channels 1.2V input) JTAG port pins) channels analog output (8-bit PWM) UART I2C/SPI port byte program loaded from external EEPROM byte data RAM. Note Note Total size byte including program, data, 8051 data. Different sizes allocated depending applications.
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IRMCF311 Pinout
P5.0/PFCGKILL
P3.6/RXD1
SCL/SO-SI
P3.7/TXD1
P3.2/INT0
P5.2/TDO
P5.1/TMS
XTAL0 XTAL1 P1.1/RXD P1.2/TXD P1.3/SYNC/SCK P1.4/CAP VDD2 VDD1 FGATEKILL FPWMWL FPWMWH FPWMVL FPWMVH FPWMUL FPWMUH P3.0/INT2/CS1 CPWMUH CPWMUL CPWMVH CPWMVL CPWMWH CPWMWL CGATEKILL VDD1 IPFCIPFC+ IPFCO VACO VACVAC+
(Top View)
AIN0
P2.7/AOPWM1
P2.6/AOPWM0
VDD2
IFBFO
AVDD
IFBF-
AIN1
IFBC-
PFCPWM IFBC+
SDA/CS0
TSTMOD
PLLVDD
PLLVSS
RESET
P5.3/TDI
Figure IRMCF311 Configuration
CMEXT
IFBCO
IFBF+
AREF
AVSS
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IRMCF311 Input/Output IRMCF311
signals IRMCF311 shown Figure pins 3.3V logic interface except interface pins.
Figure Input/Output IRMCF311
8051 Peripheral Interface Group
Input, Receive data IRMCF311 Output, Transmit data from IRMCF311 Input, channel Receive data IRMCF311 Output, channel Transmit data from IRMCF311
UART Interface P1.1/RXD P1.2/TXD P3.6/RXD1 P3.7/TXD1
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IRMCF311
Discrete Interface P1.3/SYNC/SCK Input/output port 1.3, configured SYNC output clock, needs pulled VDD1 order boot from EEPROM P1.4/CAP Input/output port 1.4, configured Capture Timer input P3.0/INT2/CS1 Input/output port 3.0, configured external interrupt chip select P3.2/INT0 Input/output port 3.2, configured external interrupt
Analog output Interface P2.6/AOPWM0 Output, output 8-bit resolution, configurable carrier frequency P2.7/AOPWM1 Output, output 8-bit resolution, configurable carrier frequency
Crystal Interface XTAL0 XTAL1
Input, connected crystal Output, connected crystal
Reset Interface RESET
Inout, system reset, needs pulled VDD1 doesn't require external time constant
I2C/SPI Interface SCL/SO-SI SDA/CS0 P3.0/INT2/CS1 P1.3/SYNC/SCK
Output, clock output data Input/output, data line chip select Input/output, INT2 chip select Input/output, SYNC output clock, needs pulled VDD1 order boot from EEPROM
Motion Peripheral Interface Group
Output, motor phase high side gate signal Output, motor phase side gate signal Output, motor phase high side gate signal Output, motor phase side gate signal Output, motor phase high side gate signal Output, motor phase side gate signal Output, motor phase high side gate signal Output, motor phase side gate signal Output, motor phase high side gate signal
CPWMUH CPWMUL CPWMVH CPWMVL CPWMWH CPWMWL FPWMUH FPWMUL FPWMVH
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IRMCF311
FPWMVL FPWMWH FPWMWL PFCPWM Fault CGATEKILL Output, motor phase side gate signal Output, motor phase high side gate signal Output, motor phase side gate signal Output,
Input, upon assertion, this negates signals motor programmable logic sense P5.0/PFCGKILL Input, upon assertion, this negates PFCPWM signal, programmable logic sense, configured discrete which case CGATEKILL negates PFCPWM FGATEKILL Input, upon assertion, this negates signals motor programmable logic sense
Analog Interface Group
Analog power (1.8V) Analog power return Buffered 0.6V output Unbuffered 0.6V, input AREF buffer, capacitor needs connected. Input, Operational amplifier positive input shunt resistor current sensing motor Input, Operational amplifier negative input shunt resistor current sensing motor Output, Operational amplifier output shunt resistor current sensing motor Input, Operational amplifier positive input shunt resistor current sensing motor Input, Operational amplifier negative input shunt resistor current sensing motor Output, Operational amplifier output shunt resistor current sensing motor Input, Operational amplifier positive input current sensing Input, Operational amplifier negative input current sensing Output, Operational amplifier output current sensing Input, Operational amplifier positive input voltage sensing Input, Operational amplifier negative input voltage sensing Output, Operational amplifier output voltage sensing Input, Analog input channel 1.2V), typically configured voltage input Input, Analog input channel 1.2V), needs pulled down AVSS unused
AVDD AVSS AREF CMEXT IFBC+ IFBCIFBCO IFBF+ IFBFIFBFO IPFC+ IPFCIPFO VAC+ VACVACO AIN0 AIN1
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IRMCF311
Power Interface Group
Digital power (3.3V) Digital power core logic (1.8V) Digital common power (1.8V) ground return
VDD1 VDD2 PLLVDD PLLVSS
Test Interface Group
Must tied VSS, used only factory testing. Input, JTAG test data input, programmable discrete Input, JTAG test mode select, programmable discrete Input, JTAG test clock Output, JTAG test data output, programmable discrete
TSTMOD P5.3/TDI P5.1/TMS P5.2/TDO
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IRMCF311 Application Connections
Typical application connection shown Figure components necessary implement complete sensorless drive control algorithm shown connected IRMCF311.
System Clock
Crystal
XTAL0 XTAL1 PLLVDD(1.8V) PLLVSS
Logic
System clock
indoor unit Microcontroller (UART) other Host (UART) Other communication (I2C)
P1.2/TXD P1.1/RXD P3.7/TXD1 P3.6/RXD1 SDA/CS0 SCL/SO-SI
UART0 UART1
Motion Control Modules Dual Port Memory (512B) Memory (5.5KB)
Loss Space Vector Loss Space Vector
CPWMUH CPWMUL CPWMVH CPWMVL CPWMWH CPWMWL CGATEKILL FPWMUH FPWMUL FPWMVH FPWMVL FPWMWH FPWMWL FGATEKILL
P1.3/SYNC/SCK P1.4/CAP
Digital Control
P3.0/INT2/CS1
PORT1
Motion Control Sequencer
PFCPWM PFCGKILL 0.6V IFBC+ IFBCIFBCO IFBF+ 0.6V motor shunt resistor 0.6V shunt resistor
Compressor shunt resistor
PORT3
Timer
RESET
IFBFIFBFO IPFC+
RESET
System Reset
Test Mode
TSTMOD
Test Mode Circuit
Watchdog Timer Local (2KB)
IPFCIPFCO
VAC+
P2.6/AOPWM0
PWM0
12bit
VACVACO voltage
line voltage
AIN0
Analog Output
P2.7/AOPWM1
PWM1
Program (48KB)
AIN1 AREF CMEXT
Other analog input (0-1.2V) Optional External Voltage Reference (0.6V)
JTAG Control
P5.3/TDI P5.1/TMS P5.2/TDO
JTAG Interface
8051
AVDD(1.8V) AVSS
VDD1(3.3V) VDD2(1.8V)
Figure Application Connection IRMCF311
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IRMCF311 Characteristics
Absolute Maximum Ratings
Parameter Supply Voltage -0.3 Supply Voltage -0.3 1.98 Analog Input Voltage -0.3 1.98 Digital Input Voltage -0.3 3.65 Ambient Temperature Storage Temperature Table Absolute Maximum Ratings Condition Respect Respect Respect AVSS Respect
Symbol VDD1 VDD2
Caution: Stresses beyond those listed "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only function device these other conditions beyond those indicated operational sections specifications implied.
System Clock Frequency Power Consumption
Parameter System Clock Table System Clock Frequency Unit
Symbol SYSCLK
Power (mW) VDD2 (1.8V) Clock Frequency (MHz) VDD1 (3.3V) Total
Figure Clock Frequency Power Consumption
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IRMCF311
VDD1 VDD2 IOL1(2) IOH1 IOL2
Digital Characteristics
Parameter Supply Voltage Supply Voltage 1.62 1.98 Input Voltage -0.3 Input High Voltage Input capacitance Input leakage current level output 13.2 15.2 current High level output 12.4 24.8 current level output 17.9 26.3 33.4 current High level output 24.6 49.5 current Table Digital Characteristics Condition Recommended Recommended Recommended Recommended
Symbol
IOH2(3)
Note: Data guaranteed design. Applied SCL/SO-SI, SDA/CS0 pins. Applied P1.1/RXD, P1.2/TXD, P1.3/SYNC/SCK, P1.4/CAP, P2.6/AOPWM0, P2.7/AOPWM1, P3.0/INT2/CS1, P3.2/INT0, P3.6/RXD1, P3.7/TXD1, P5.0/PFCGKILL, P5.1/TMS, P5.2/TDO, P5.3/TDI, CGATEKILL, FGATEKILL, CPWMUL, CPWMUH, CPWMVL, CPWMVH, CPWMWL, CPWMWH, FPWMUL, FPWMUH, FPWMVL, FPWMVH, FPWMWL, FPWMWH, PFCPWM pins.
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IRMCF311
Oscillator Characteristics
Parameter Supply Voltage Oscillator Input Voltage Oscillator Input High Voltage Table 1.62 VPLLVSS 0.8* 1.92 0.2* VPLLVDD VPLLVDD Condition Recommended VPLLVDD
Symbol VPLLVDD
VPLLVDD
VPLLVDD Characteristics
Note: Data guaranteed design.
Analog Characteristics
amps current sensing (IFBC+, IFBC-, IFBCO, IFBF+, IFBF-, IFBFO, IPFC+, IPFC-, IPFCO) CAREF 1nF, CMEXT= 100nF. Unless specified, 25°C. Symbol Parameter VAVDD Supply Voltage 1.71 VOFFSET Input Offset Voltage Input Voltage Range VOUTSW output operating range Input capacitance RFDBK feedback resistor GAINCL CMRR ISRC ISNK
1.89
Condition Recommended VAVDD Recommended VAVDD
Operating Close loop Gain Common Mode Rejection Ratio output source current output sink current Table Analog Characteristics
Requested between output negative input
VOUT
VOUT
Note: Data guaranteed design.
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IRMCF311
Analog Characteristics
voltage sensing (VAC+,VAC-,VACO) CAREF 1nF, CMEXT= 100nF. Unless specified, 25°C. Symbol Parameter VAVDD Supply Voltage 1.71 1.89 VOFFSET Input Offset Voltage Input Voltage Range VOUTSW output operating range Input capacitance GAINCL Operating Close loop Gain CMRR Common Mode Rejection Ratio ISRC output source current ISNK output sink current Table Analog Characteristics Note: Data guaranteed design.
Condition VAVDD VAVDD
VOUT
VOUT
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IRMCF311
Under Voltage Lockout Characteristics
Based AVDD (1.8V) Unless specified, 25°C. Symbol Parameter UVCC+ UVcc positive going 1.53 1.66 1.71 Threshold UVCCUVcc negative going 1.52 1.62 1.71 Threshold UVCCH UVcc Hysteresys Table UVcc Characteristics
Condition VDD1 VDD1
CMEXT AREF Characteristics
CAREF 1nF, CMEXT= 100nF. Unless specified, 25°C. Condition Symbol Parameter CMEXT voltage VAVDD VAREF Buffer Output Voltage VAVDD Load regulation (VDCVo 0.6) PSRR Power Supply Rejection Ratio Table CMEXT AREF Characteristics Note: Data guaranteed design.
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IRMCF311 Characteristics
FCLKIN FPLL FLWPW TLOCK
Characteristics
Parameter Condition Crystal input frequency (see figure below) Internal clock frequency Sleep mode output FCLKIN frequency Short time jitter psec Duty cycle lock time Table Characteristics
Symbol
Note: Data guaranteed design.
R1=1M
R2=10
Xtal
C1=30PF C2=30PF
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IRMCF311
Analog Digital Converter Characteristics
2.05 Condition
Unless specified, 25°C. Symbol Parameter TCONV Conversion time THOLD Sample/Hold maximum hold time
Voltage droop (see figure below)
Table Converter Characteristics Note: Data guaranteed design.
Input Voltage Voltage droop Voltage
tSAMPLE THOLD
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IRMCF311
Characteristics
amps current sensing (IFBC+, IFBC-, IFBCO, IFBF+, IFBF-, IFBFO, IPFC+, IPFC-, IPFCO) Unless specified, 25°C. Symbol Parameter OPSR slew rate OPIMP TSET input impedance Settling time
V/sec
Condition VAVDD
VAVDD Table Current Sensing Characteristics
Note: Data guaranteed design.
Characteristics
voltage sensing (VAC+,VAC-,VACO) Unless specified, 25°C. Symbol Parameter OPSR slew rate OPIMP TSET input impedance Settling time
V/sec
Condition VAVDD
VAVDD Table Voltage sensing Characteristics
Note: Data guaranteed design.
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IRMCF311
SYNC SVPWM Conversion Timing
twSYNC
SYNC
tdSYNC1
IU,IV,IW
tdSYNC2
AINx
tdSYNC3
PWMUx,PWMVx,PWMWx
Unless specified, 25°C. Symbol Parameter twSYNC SYNC pulse width tdSYNC1 SYNC current feedback conversion time tdSYNC2 SYNC AIN0-6 analog input conversion time tdSYNC3 SYNC output delay time Table SYNC Characteristics Note: AIN1 through AIN6 channels converted once every SYNC events
Unit SYSCLK SYSCLK SYSCLK
SYSCLK
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IRMCF311
GATEKILL SVPWM Timing
Unless specified, 25°C. Symbol Parameter twGK GATEKILL pulse width tdGK GATEKILL output delay Table GATEKILL SVPWM Timing
Unit SYSCLK SYSCLK
Interrupt Timing
Unless specified, 25°C. Symbol Parameter twINT INT0, INT1 Interrupt Assertion Time tdINT INT0, INT1 latency Table Interrupt Timing
Unit SYSCLK SYSCLK
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IRMCF311
Timing
TI2CLK TI2CLK
tI2WSETUP tI2WHOLD tI2RSETUP tI2RHOLD tI2EN2
tI2ST1 tI2ST2
tI2EN1
Unless specified, 25°C. Symbol Parameter TI2CLK clock period tI2ST1 start time tI2ST2 start time tI2WSETUP write setup time tI2WHOLD write hold time tI2RSETUP read setup time tI2RHOLD read hold time
0.25 0.25 0.25 0.25 filter time Table Timing
8192
Unit SYSCLK TI2CLK TI2CLK TI2CLK TI2CLK SYSCLK SYSCLK
Note: read setup time determined programmable filter time applied communication.
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IRMCF311
Timing
7.9.1 Write timing
Unless specified, 25°C. Symbol Parameter TSPICLK clock period tSPICLKHT clock high time tSPICLKLT clock time tCSDELAY data delay time tWRDELAY falling edge data delay time tCSHIGH high time between consecutive byte transfer tCSHOLD hold time Table Write Timing
Unit SYSCLK TSPICLK TSPICLK nsec nsec TSPICLK TSPICLK
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IRMCF311
7.9.2 Read Timing
Unless specified, 25°C. Symbol Parameter TSPICLK clock period tSPICLKHT clock high time tSPICLKLT clock time tCSRD data delay time tRDSU read data setup time tRDHOLD read data hold time tCSHIGH high time between consecutive byte transfer tCSHOLD hold time Table Read Timing
Unit SYSCLK TSPICLK TSPICLK nsec nsec nsec TSPICLK TSPICLK
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IRMCF311
7.10 UART Timing
TBAUD
Start
Data Parity
Stop
TUARTFIL
Unless specified, 25°C. Symbol Parameter TBAUD Baud Rate Period 57600 1/16 TUARTFIL UART sampling filter period Table UART Timing
Unit bit/sec TBAUD
Note: Each including start stop sampled three times center interval 1/16 TBAUD. three sampled values agree, then UART noise error generated.
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IRMCF311
7.11 CAPTURE Input Timing
Unless specified, 25°C. Symbol Parameter TCAPCLK CAPTURE input period tCAPHIGH CAPTURE input high time tCAPLOW CAPTURE input time tCRDELAY CAPTURE falling edge capture register latch time tCLDELAY CAPTURE rising edge capture register latch time tINTDELAY CAPTURE input interrupt latency time Table CAPTURE Timing
Unit SYSCLK SYSCLK SYSCLK SYSCLK SYSCLK SYSCLK
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IRMCF311
7.12 JTAG Timing
TJCLK
tJHIGH
tJLOW
tJSETUP tJHOLD
TDI/TMS
Unless specified, 25°C. Symbol Parameter TJCLK Period tJHIGH High Period tJLOW Period propagation delay time tJSETUP TDI/TMS setup time tJHOLD TDI/TMS hold time Table JTAG Timing
Unit nsec nsec nsec nsec nsec
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IRMCF311 List
Number Name XTAL0 XTAL1 P1.1/RXD P1.2/TXD P1.3/SYNC/ P1.4/CAP VDD2 VDD1 FGATEKILL FPWMWL FPWMWH FPWMVL FPWMVH FPWMUL FPWMUH P2.6/ AOPWM0 P2.7/ AOPWM1 VDD2 IFBFIFBF+ IFBFO AIN0 AVDD Pull Pull Pull Pull Pull Pull Internal Pull-up /Pull-down Type Description Crystal input Crystal output Discrete programmable UART receive input Discrete programmable UART transmit output Discrete programmable SYNC output clock, needs pulled VDD1 order boot from EEPROM Discrete programmable Capture Timer input 1.8V digital power Digital common 3.3V digital power shutdown input, 2-sec digital filter, configurable either high true. gate drive phase side, configurable either high true gate drive phase high side, configurable either high true gate drive phase side, configurable either high true gate drive phase high side, configurable either high true gate drive phase side, configurable either high true gate drive phase high side, configurable either high true Discrete programmable analog output (PWM) Discrete programmable analog output (PWM) 1.8V digital power Digital common single shunt current sensing input single shunt current sensing input single shunt current sensing output Analog input channel 0-1.2V range, needs pulled down AVSS unused 1.8V analog power
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IRMCF311
Number Name AVSS AIN1 AREF CMEXT IFBCIFBC+ IFBCO VACVAC+ VACO IPFCO IPFC+ IPFCVSS VDD1 CGATEKILL CPWMWL CPWMWH CPWMVL CPWMVH CPWMUL CPWMUH P3.0/INT2 P5.0/ PFCGKILL PFCPWM P3.2/INT0 Pull Pull Pull Pull Pull Pull Pull Internal Pull-up /Pull-down Type Description Analog common Analog input channel 0-1.2V range, needs pulled down AVSS unused Analog reference voltage output (0.6V) Unbuffered analog reference voltage output (0.6V) Compressor single shunt current sensing input Compressor single shunt current sensing input Compressor single shunt current sensing output input voltage sensing input input voltage sensing input input voltage sensing output shunt current sensing output shunt current sensing input shunt current sensing input Digital common 3.3V digital power Compressor shutdown input, 2-sec digital filter, configurable either high true. Compressor gate drive phase side, configurable either high true Compressor gate drive phase high side, configurable either high true Compressor gate drive phase side, configurable either high true Compressor gate drive phase high side, configurable either high true Compressor gate drive phase side, configurable either high true Compressor gate drive phase high side, configurable either high true Discrete programmable INT2 digital input Discrete programmable shutdown input, 2-sec digital filter, configurable either high true. gate drive, configurable either high true Discrete programmable INT0 input
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IRMCF311
Number Name P3.6/RXD1 P3.7/TXD1 SCL/SO-SI SDA/CS0 P5.1/TMS P5.2/TDO P5.3/TDI TSTMOD RESET PLLVDD PLLVSS Internal Pull-up /Pull-down Type Description Discrete programmable UART receive input Discrete programmable UART transmit output Digital common clock output data data chip select Discrete programmable JTAG test mode select Discrete programmable JTAG port test data output Discrete programmable JTAG test data input JTAG test clock Test mode. Must tied VSS. Factory only
pull down
Reset true, Schmitt trigger input power ground Table List
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IRMCF311 Package Dimensions
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IRMCF311 Part Marking Information
Part Number
IRMCF311 YWWP XXXXXX
Logo
Date Code
Production
Indentifier
LQFP-64 MSL3 qualified This product been designed qualified industrial level Qualification standards found www.irf.com <http://www.irf.com> WORLD HEADQUARTERS: Kansas St., Segundo, California 90245, Tel: (310) 252-7105
Data specifications subject change without notice. 12/05/2006 www.irf.com
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