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High Endurance EEPROM General Description AS1506 linear, 256
Top Searches for this datasheetAS1506 High Endurance EEPROM General Description AS1506 linear, 256-tap digital potentiometer specifically designed replace discrete/mechanical potentiometers ideal applications requiring low-temperature-coefficient variable resistor, such low-drift, programmable gain, amplifier circuit configurations. device controlled 3-wire SPI-compatible interface features internal EEPROM storing wiper positions. Several device variants available differentiated end-to-end resistance shown Table (see also Ordering Information page 16). Table Standard Products Model AS1506-10 AS1506-50 AS1506-100 End-to-End Resistance Features High Endurance: EEPROM cycles High Reliability: EEPROM years data retension 85°C Wiper Position Retained EEPROM loaded Power-Up Positions ±0.5LSB Voltage Divider Mode ±0.5LSB Voltage Divider Mode End-to-End Resistance: 10/50/100k End-to-End Resistance Temperature Coefficient: Low-Power Standby Mode: 100nA 5MHz SPI-Compatible Serial Interface Single-Supply Operation: +2.7 +5.5V 8-pin TDFN 3x3mm Package 3-wire SPI-compatible serial interface allows communication data rates 5MHz.The internal EEPROM stores last wiper position initialization during power-up low-power standby mode. Applications devices available 8-pin TDFN 3x3mm package. device ideal mechanical potentiometer replacement, low-drift programmable gain amplifiers, audio volume control, contrast control, low-drift programmable filters. Figure Block Diagram 8-Bit Shift Register 8-Bit Latch HIGH 256-Position Decoder SCLK SDIO Interface PowerOn Reset 8-Bit EEPROM WIPER AS1506 www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Pinout Assignments Figure Assignments (Top View) HIGH SCLK WIPER AS1506 SDIO Descriptions Table Descriptions Number Description 5.5V Supply Voltage. Bypass with 0.1µF capacitor GND. Serial Clock Input Serial Data Input/Output Active-Low Chip Select Ground Terminal. voltage this greater than less than voltage HIGH. Current flow into this pin. Wiper Terminal WIPER High Terminal. voltage this greater than less than voltage HIGH LOW. Current flow into this pin. Exposed exposed internally connected. Leave floating. Name SCLK SDIO www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Absolute Maximum Ratings Stresses beyond those listed Table cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated Electrical Characteristics page implied. Exposure absolute maximum rating conditions extended periods affect device reliability. Table Absolute Maximum Ratings Parameter Other Pins AS1506-10 Maximum Continuous Current into Pins HIGH, WIPER, Electrostatic Discharge Latch-Up -0.3 -0.3 +7.0 Units Comments +0.55 +0.55 +0.55 -100 +150 +150 reflow peak soldering temperature (body temperature) specified accordance with IPC/JEDEC J-STD-020C "Moisture/Reflow Sensitivity Classification Non-Hermetic Solid State Surface Mount Devices". lead finish Pb-free leaded packages matte (100% Sn). MIL-Std. 883E 3015.7 methods JEDEC AS1506-50 AS1506-100 Thermal Resistance Operating Temperature Range Storage Temperature Range Junction Temperature Package Body Temperature +260 maximum rating voltage must exceeded during Latch-up test device. www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Electrical Characteristics +2.7 +5.5V, HIGH VDD, GND, TAMB values +5.0V, TAMB (unless otherwise specified). Table Electrical Characteristics Symbol Power Supply Parameter Condition 2.70 Unit Standby Current Digital Inputs GND, TAMB Operating Current Includes Non-Volatile Write Memory (CMOS write) Performance (Voltage Divider Mode) Resolution AS1506-10 Integral Linearity AS1506-50 -100 Differential Non-Linearity End-to-End Resistance Temperature Coefficient Full Scale Error ±0.5 ±0.25 ±0.5 ±0.25 ±0.6 ±0.5 ±0.5 ±0.5 ±1.5 ±0.5 ±0.5 Taps AS1506-10 AS1506-50 -100 TAMB AS1506-10 AS1506-50 AS1506-100 AS1506-10 AS1506-50 AS1506-100 AS1506-10 AS1506-50 -100 AS1506-50 -100 AS1506-10 AS1506-50 -100 AS1506-10 AS1506-50 AS1506-100 37.5 Zero Scale Error Performance (Variable Resistor Mode) Integral Linearity Differential Non-Linearity Performance (Resistor Characteristics) Wiper Resistance 12.5 62.5 Wiper Capacitance End-to-End Resistance Inputs Outputs WIPER Voltage Range HIGH Voltage Range Voltage Range ILEAK ICONT Digital Input High Voltage Digital Input Voltage GND0.3 VDD+ Digital Input Leakage Current Digital Input Capacitance Continuous current www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Table Electrical Characteristics (Continued) Symbol Parameter Condition AS1506-10 AS1506-50 AS1506-100 AS1506-10 AS1506-50 AS1506-100 TAMB TAMB TAMB 1200 1100 1600 2200 Unit Dynamic Characteristics Wiper -3dB Bandwidth Wiper Settling Time Non-Volatile Memory Reliability Data Retention Endurance tBUSY Years Write Cycles Write Non-Volatile Register Busy Time programming current operates only during power-up non-volatile memory writes. measured with potentiometer configured voltage-divider with HIGH GND. wiper terminal unloaded measured with high-input-impedance voltmeter. measured with potentiometer configured variable resistor. HIGH unconnected GND. condition, wiper terminal driven with source current 400µA 10k, 80µA 50k, 40µA 100k. conditions, wiper terminal driven with source current 200µA 10k, 40µA 50k, 20µA 100k. wiper resistance measured using source currents given Note number worst case resistance over positions. device draws higher supply current when digital inputs driven with voltages between (VDD 0.5V) (GND 0.5V). Wiper midscale with 10pF load measurement) GND. source peak peak sinus signal) applied HIGH WIPER output measured. bandwidth occurs when WIPER/HIGH value lower than WIPER/HIGH value. Wiper-settling time worst-case rise-time measured between successive wiper positions. HIGH VDD, GND; WIPER unloaded measured with 10pF load. This parameter tested ensured characterization. Timing Characteristics +2.7 +5.5V, HIGH VDD, GND, TAMB values +5.0V, TAMB (unless otherwise specified). Figure page Digital timing data guaranteed design characterization, production tested. Table Timing Characteristics Symbol fSCLK tCL80 tCSS tCSH tCS0 tCS1 tCSW tBUSY Parameter SCLK Frequency SCLK Clock Period SCLK Pulse-Width High SCLK Pulse-Width CSN-Fall SCLK Rise Setup SCLK-Rise CSN-Rise Hold SDIO SCLK Setup SDIO Hold after SCLK SCLK-Rise CSN-Fall Delay CSN-Rise SCLK-Rise Hold Pulse-Width High Write Non-Volatile Register Busy Time Condition Unit www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Typical Operating Characteristics (unless otherwise specified). Figure Position 10k, Divider Mode Figure Position 10k, Divider Mode (LSB) (LSB) -0.2 -0.4 -0.6 -0.8 -0.2 -0.4 -0.6 -0.8 Position Position Figure Position 50k, Divider Mode Figure Position 50k, Divider Mode (LSB) -0.1 -0.2 -0.3 -0.4 -0.5 (LSB) -0.1 -0.2 -0.3 -0.4 -0.5 Position Position Figure Position 100k, Divider Mode Figure Position 100k, Divider Mode (LSB) -0.1 -0.2 -0.3 -0.4 -0.5 (LSB) -0.1 -0.2 -0.3 -0.4 -0.5 Position Position www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Figure Position 10k, Varistor Mode Figure Position 10k, Varistor Mode (LSB) -0.2 -0.4 -0.6 -0.8 (LSB) -0.4 -0.8 -1.2 -1.6 Position Position Figure Position 50k, Varistor Mode Figure Position 50k, Varistor Mode (LSB) -0.2 -0.4 -0.6 -0.8 (LSB) -0.2 -0.4 -0.6 -0.8 Position Position Figure Position 100k, Varistor Mode Mode Figure Position 100k, Varistor (LSB) (LSB) -0.2 -0.4 -0.6 -0.8 -0.2 -0.4 -0.6 -0.8 Position Position www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Figure Wiper Resistance TAP; Figure Wiper Resistance TAP; Resistance Resistance Position Position Figure Resistor Temperature Figure Gain Bandwidth 100k Resistance Gain (dB) 1000 10000 Temperature (°C) Frequency (kHz) Figure EEPROM Data Retention Temperature 10000 Data Retension (years) 1000 Temperature (°C) www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Detailed Description AS1506 contains resistor array with resistive elements (tap points), total end-to-end resistance 100k (see Ordering Information page 16). device provides high, low, wiper terminals standard voltage-divider configuration. Pins HIGH, LOW, WIPER connected configuration long their voltages fall between VDD. 3-wire, SPI-compatible serial interface controls movement wiper among points. EEPROM stores wiper position recalls stored wiper position upon power-up. EEPROM typically holds wiper data years wiper store cycles. Analog Circuit points accessible wiper along resistor string between pins HIGH (similar terminals mechanical potentiometer). wiper point selected programming data bits control byte 3-wire serial interface (see Programming Device page 10). Note: Integrated power-on reset circuitry loads wiper position from EEPROM power-up. Digital Interface AS1506 uses SPI-compatible 3-wire interface command settings device consisting input signals (chip-select CSN, data clock SCLK) bi-directional data (SDIO). Driving enables serial interface command/data passed into device synchronously each SCLK rising edge. There 16-bit commands write data into wiper register non-volatile memory, 8-bit commands transferring data between wiper register non-volatile memory read data stored wiper register non-volatile memory. 8-bit commands implemented 16-bit command structure alternatively. this case first bits shifted through interface significant. data byte passed writing commands represents position wiper. After loading 16-bit command while low, loaded command executed next rising edge CSN, simultaneously serial interface disabled. signal must during whole serial input stream through SPI, otherwise data interface corrupted. Note: data-in stream does exactly contain digits, command executed rising edge CSN. Figure Serial Data Timing tCS0 tCSS SCLK tCSW tCS1 tCSH SDIO Standby Mode Low-power standby mode enable high. After read access standby mode entered cycles SCLK after issuing last data wiper non-volatile register. digital inputs stable there only leakage power dissipation device. This power dissipation defined with 0.1uA (typ) www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet EEPROM (Non-Volatile Register) There internal EEPROM register implemented retain wiper position after power down. During ongoing write cycle non-volatile register (tBUSY time) system must powered down. Data retention defines ability EEPROM retain data over time. qualification been done according JEDEC Retention Lifetime Specification (A117). EEPROM cycled specified endurance limit before data retention test done. Based activation energy 0.6eV data retention time derates over temperature shown Figure page non-volatile register endurance cycles data retention years typical non-volatile register factory trimmed mid-scale. Power-Up AS1506 contains integrated power-up circuit. power data transferred from non-volatile memory wiper register. wiper register moves stored position. This data transfer takes after supply reached trigger level. Programming Device Write commands (see Table require clock cycles (see Figure page clock command data. Copy Read commands (see Table clock cycles clock command (see Figure page clock cycles. clock cycle commands data bits (D7:D0) insignificant. Table Command/Data Word Format Command Write Wiper Register Write Non-Volatile Register Copy Wiper Register NonVolatile Register Copy Non-Volatile Register Wiper Register Read Non-Volatile Register Read Wiper Register Commands Write Wiper Register This 16-bit command (see Figure page 12). first byte represents command word starting with command, second byte represents data written wiper register (starting with MSB). Data 0000 0000 wiper moves closest position LOW, with data 1111 1111 wiper moves closest position HIGH. Note: power-up wiper position stored non-volatile memory automatically loaded into wiper register, wiper moves related position. Write Non-Volatile Register This 16-bit command (see Figure page 12). first byte represents command word starting with command, second byte represents data written non-volatile memory. wiper position changed this command, since wiper register affected. There write non-volatile register time defined timing specification, which required storing data non-volatile register. During this time device must powered down, otherwise data stored non-volatile register corrupted. www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Copy Wiper Register Non-Volatile Register This command implemented 16-bit command. data stored wiper register transferred non-volatile memory, keep data during power-down. There automatic trigger this command during power-down device. This command must triggered before powering down device. There write non-volatile register time defined timing specification, which required storing data non-volatile register. During this time device must powered down, otherwise data stored non-volatile register corrupted. Copy Non-Volatile Register Wiper Register This command implemented 16-bit command. data stored non-volatile register transferred wiper register, wiper register moves stored position. This command automatically executed during power system. Read Non-Volatile Register AS1506 features capability read data from non-volatile register interface (see Figure page 12). This command implemented 16-bit command. SDIO bi-directional pin. During phase sequence SDIO used input command byte. After rising edge SDIO output pin, data stored non-volatile register read serially, first. data propagation starts second rising edge SCLK after rising edge CSN. must high during read operation. With next falling edge SDIO input again. Read Wiper Register AS1506 features capability read data from wiper register interface (see Figure page 12). This command implemented 16-bit command. SDIO bi-directional pin. During phase sequence, SDIO used input command byte. After rising edge SDIO output pin, data stored wiper register read serially, first. wiper position unchanged. data propagation starts second rising edge SCLK after rising edge CSN. must high during read operation. With next falling edge SDIO input again. Figure 8-Bit Command Word SCLK SDIO www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Figure 16-Bit Command/Data Word SCLK SDIO Figure 16-Bit Read Command Word SCLK SDIO www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Application Information AS1506 intended circuits requiring digitally controlled adjustable resistance, such contrast control (where voltage biasing adjusts display contrast), programmable filters with adjustable gain and/or cutoff frequency. Programmable Filter Figure shows configuration 1st-order programmable filter. gain filter adjusted calculated (R1/R2) cutoff frequency (fC) adjusted calculated 1/(2 Figure Programmable Filter Circuit HIGH VOUT WIPER AS1506 HIGH AS1506 WIPER Offset Voltage Gain Adjustment Connect AS1506 nullify offset voltage over operating temperature range. Install another AS1506 potentiometer feedback path adjust gain (Figure 25). Figure Offset Voltage Adjustment Circuit AS1506 www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Positive Bias Control device used applications where voltage-divider variable resistor used make adjustable, positive LCD-bias voltage, such AS1120 Driver. provides buffering gain resistordivider network made potentiometer (Figure fixed resistor variable resistor (Figure 27). Figure Positive Bias Control using Voltage Divider HIGH VOUT AS1506 WIPER Figure Positive Bias Control using Variable Resistor VOUT HIGH AS1506 WIPER Adjustable Voltage Reference Figure shows device used feedback resistor adjustable voltage-reference application. Output voltages external voltage references, supervisory reset thresholds, brightness control independently adjusted changing wiper position AS1506. Figure Adjustable Voltage Reference Circuit VOUT 1.23V(50k/R2(k) HIGH VOUTREF WIPER AS1506 www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Package Drawings Markings device available 8-pin TDFN 3x3mm package. Figure 8-pin TDFN 3x3mm Package E2/2 INDEX AREA (D/2 xE/2) INDEX AREA (D/2 xE/2) VIEW BVIEW Term inal atum RMINA SIDE Symbol 0.70 0.00 0.75 0.02 0.20 0.80 0.05 0.15 0.13 0.15 0.10 0.10 0.05 0.08 0.10 Notes Symbol 3.00 3.00 D2/2 SEATING PLANE 0.08 1.60 1.35 0.30 0.20 0.25 0.40 2.50 1.75 0.50 0.35 0.30 0.65 Notes Notes: Dimensioning tolerancing conform ASME Y14.5M-1994. dimensions millimeters, angle degrees. total number terminals. Terminal identifier terminal numbering convention shall conform JESD 95-1 SPP-012. Details terminal identifier optional, must located within area indicated. terminal identifier either mold, embedded metal mark feature. Dimension applies metallized terminal measured between 0.15 0.30mm from terminal tip. refers maximum number terminals side. Unilateral coplanarity zone applies exposed heat sink slug well terminals. www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Ordering Information device available standard products shown Table Table Ordering Information Model AS1506-BTDT-10 AS1506-BTDT-50 AS1506-BTDT-100 Marking ASMO ASMN ASMM Description 256-Tap, Non-Volatile, Digital Potentiometer 256-Tap, Non-Volatile, Digital Potentiometer 256-Tap, Non-Volatile, Digital Potentiometer End-to-End Resistance 100k Delivery Form Tape Reel Tape Reel Tape Reel Package 8-pin TDFN 3x3mm 8-pin TDFN 3x3mm 8-pin TDFN 3x3mm www.austriamicrosystems.com Revision 1.01 AS1506 Data Sheet Copyrights Copyright 1997-2007, austriamicrosystems Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. 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