INTRODUCTION/SUMMARY extra impedance introduced from outside sili

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INTRODUCTION/SUMMARY extra impedance introduced from outside sili

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Impedance Compensation High Density LIU's Fully Internal Impedance Mode
INTRODUCTION/SUMMARY
extra impedance introduced from outside silicon chip (bonding, packaging, trace geometry, transformer resistance, etc) alter overall input/output impedance therefore impact parameters such return loss pulse shape. This note provides compensate extra impedance fine-tuning `reference resistor' resistor connected between ground) when High Density configured fully internal impedance matching mode.
82P2828/2821/2816/ 2521/2808 Application Note AN-524
transmitted pulse shape when port configured E1/T1/J1 operations. Partially Internal Impedance Matching External Impedance Matching schemes (Options extra impedance introduced board-level designs components (described above) compensated fine-tuning external resistor being used.
IMPACT UNWANTED IMPEDANCE
High Density products (IDT82P2828/2821/2816/2521/ 2808) have three built-in options termination schemes users select receive transmit impedance matching. They are: Option Fully Internal Impedance Matching with integrated termination resistor. Option Partially Internal Impedance Matching with common external resistor. Option External Impedance Matching with different external resistors. Once chip designed into system, other factors, such trace geometry, backplane geometry, transformer resistance connectors, will introduce some extra impedance between High Density analog interface cable. introduced extra impedance will have unpredictable impact port's return loss
IMPEDANCE COMPENSATION FULLY INTERNAL IMPEDANCE MODE
Fully Internal Impedance Matching (Option termination resistor internal programmable resistor (IM) which already trimmed nominal value silicon level. Since there external termination resistor users tune, turn another externally connected resistor impedance compensation. recommended datasheet, reference resistor connected between chip's ground. This reference resistor used provide standard reference current internal circuits. overall impedance matching compensated achieve optimal receive transmit return loss pulse shape choosing right value this `reference resistor'. Changing resistence value this reference resistor will affect High Density LIU's input impedance, output impedance output pulse amplitude. receive transmit return loss optimized finetuning value reference resistor. Once right value determined, scale factor register SCAL[5:0] still take effect output pulse amplitude with optimized impedance.
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2005 Integrated Device Technology, Inc.
October 2006
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Impedance Compensation High Density LIU's Fully Internal Impedance Mode
Application Note AN-524
FINE-TUNING IMPEDANCE WITH DIFFERENT REFERENCE RESISTOR VALUES
Table gives example actual impedance values their corresponding `reference resistor' values when High Density configured Fully Internal Impedance Matching mode. Table Reference Resistor Value Output Impedance
Reference Resistor Mode Operation coax twisted pair twisted pair coax twisted pair twisted pair coax twisted pair twisted pair Output Impedance from TTIP/TRING Comment Measured when SCAL[5:0] 0x21. (Note: setting impact impedance.) Measured when SCAL[5:0] 0x20. (Note: setting impact impedance.) Measured when SCAL[5:0] 0x2F. (Note: setting impact impedance.)
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INTRODUCTION/SUMMARY extra impedance introduced from outside sili

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