AN-HK-33 In-Circuit Programming FLASH Memory MC68HC908JL3 Fr

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AN-HK-33 In-Circuit Programming FLASH Memory MC68HC908JL3 Fr

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AN-HK-33
In-Circuit Programming FLASH Memory MC68HC908JL3
Freescale Semiconductor, Inc.
Roger Applications Engineering Microcontroller Division Hong Kong This application note describes In-Circuit Programming (ICP) FLASH memory Freescale MC68HC908JL3 (JL3) microcontroller variants: MC68HRC908JL3, MC68HC908JK3, MC68HRC908JK3, MC68HC908JK1, MC68HRC908JK1. text divided into parts: PART covers general overview techniques that applied PART covers low-cost implementation
detailed specification MC68HC908JL3, please refer datasheet: Freescale order number MC68HC908JL3/H.
Freescale Semiconductor, Inc., 2004. rights reserved.
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Freescale Semiconductor, Inc.
This FLASH memory programmed erased using software routines running either User mode Monitor mode, writing FLASH Control register address $FE08. User Mode User mode, running user code, that been programmed FLASH memory. This mode which will running during most time. Monitor mode, running code that been permanently programmed into area memory during fabrication. monitor code used communicating external host, connected serial link. Programming initially blank FLASH memory executed monitor mode. mode which enters latched after power-on-reset (POR), depends logic level following pins: IRQ1, RST, PTB0, PTB1, PTB2, PTB3. (For details, please refer Monitor section datasheet.)
Monitor Mode
Freescale Semiconductor, Inc.
Initial FLASH Programming
In-Circuit Programming User Mode
user mode implemented maintain target system operation while reprogramming FLASH memory JL3. Reprogramming FLASH memory involves stages. first stage erase operation erase existing data FLASH memory cell. minimum erase size 64-bytes, known page. MASS FLASH Control register provides option erasing entire FLASH array operation, known MASS erase. should noted that erased byte FLASH memory reads $FF. second stage programming process, which programs
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Freescale Semiconductor, Inc.
code sets communication link with outside host system port pins, then transfers control host system. host issues commands erase JL3's FLASH memory downloads data program FLASH memory. this case, code acting command interpreter. Alternatively, code carry erase process downloads data from external source programming. source intelligent host EPROM containing user code. both above methods, code must loaded into area memory, routine executed area. Program erase operations allowed while program running FLASH area. possible code execute FLASH area, there danger erasing code itself. Block Protected FLASH Memory There situation where FLASH memory cannot erased: when block protected. FLASH Block Protect register address $FE09 used protect (prevent from erase program) block entire FLASH memory. default, entire FLASH memory block protected, since reset state $FE09 FLASH memory must unprotected setting FLASH Block Protect register $FF, prior program erase operations.
Freescale Semiconductor, Inc.
In-Circuit Programming Monitor Mode
Monitor mode, running monitor code that been permanently programmed into area memory ($FC00 $FDFF $FF10 $FFCF) during fabrication. First time programming JL3's FLASH memory only executed
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Freescale Semiconductor, Inc.
Blank Vector Entry Monitor Mode With FLASH memory implementation, there need reduce number wire connections target system program when required. other method entry monitor mode blank reset vector. only time when reset vector blank when entire JL3's FLASH memory blank reset vector only erased mass erase operation. This monitor mode entry method does need high voltage IRQ1 pin; clock OSC1 must 9.8304MHz, produce 9600 baud communication speed PTB0. Implementing monitor mode advantage that code needs written user code. addition, MCUscribe program, free Freescale utility, available host system that talks PTB0 serial link.
Freescale Semiconductor, Inc.
Other Considerations
Signal Conditioning
Normal system activities will usually halted during operation, allow uninterrupted programming process. Therefore, start process, should configured such that contention runaway signal will occur during process. Also note that when system first switched-on with having blank FLASH memory, port pins default their reset states. pins used connecting external host shared with target system, make sure they isolated proper logic level when connection made.
Isolation
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Freescale Semiconductor, Inc. PART Introduction
following method low-cost; with minimal system user code changes. involves steps: Erasing FLASH memory User mode. Programming FLASH memory Monitor mode (blank vector entry) using Motorola's SPGMR08 Serial Programmer. Frequency Constraint This method uses frequency 2.4576MHz programming FLASH (see Programming FLASH Memory Monitor Mode). blank vector entry method, this frequency generated using external crystal oscillator circuit direct clock input 9.8304MHz times frequency). 2.4576MHz used derive 9600 baudrate communication between Host.
Freescale Semiconductor, Inc.
Mass Erasing FLASH Memory User Mode
program listing back this application note contains routine mass erasing MCU. Since this program demonstration purposes, only MASS_ERASE subroutine required inclusion user program. Other parts program involves setting clock polling pins PTB0 PTD3 request. What program does this:
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Freescale Semiconductor, Inc.
erase routine, delay timing based frequency 2.4576MHz, mass erase operation repeated until user vectors security bytes erased. time required mass erase operation less than seconds.
PTB0 Pins target system
Freescale Semiconductor, Inc.
PTD3
Figure Mass Erase Port Configuration flowchart figure shows sequence events mass erase operation.
Power-On Reset
PTB0=1 PTD3=0
Perform mass erase routine
Continue with user main program
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Freescale Semiconductor, Inc.
Procedure mass erase Using sample program, this step-by-step procedure erases FLASH user mode: Switch power target system. Isolate port pins PTB0 PTD3 from target system logic. PTB0 high pull-up resistor VDD. PTD3 ground directly VSS. Switch power target system. Wait seconds.
Freescale Semiconductor, Inc.
Switch power target system. FLASH memory erased. next section describes procedure programming FLASH memory using blank vector entry monitor mode.
Programming FLASH Memory Monitor Mode
Programming JL3's blank FLASH memory achieved running monitor mode; with host connected using serial link. Monitor mode entered ways after power-on-reset: high voltage (1.5 VDD) applied IRQ1 pin, FLASH memory erased blank.
latter method entering monitor mode programming FLASH memory will described here. With this method, enters monitor mode after power-on reset when detects that reset
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Freescale Semiconductor, Inc.
SPGMR08 Adapter board connector
(9.8304MHz)
OPTIONAL 9.8304MHz VDD_MCU OSC1 OSC2
VTST
IRQ1 PTB0 VDD_MCU VDD_MCU
Freescale Semiconductor, Inc.
PTB0
VDD_S
Pins target system
VDD_MCU power-on reset 100k
PTB3 PTB1 PTB2
NOTES: 0.1µF normal operation: SW1: don't care SW2: position blank reset vector monitor mode entry:
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Freescale Semiconductor, Inc. Further Information
above method limitations. They are: erase program operations entire 4k-bytes FLASH memory erase operation erases FLASH locations; program operation programs FLASH locations. There must power outage during erase program operations; otherwise, high voltage must applied IRQ1 that enter Monitor mode. alternative extract target system reprogrammed using external programmer.
Freescale Semiconductor, Inc.
Further cost-savings achieved using circuit figure replace SPGMR08 serial programmer.
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Freescale Semiconductor, Inc.
8.5V
VTST
1N914 2N3906
2N3906
(for high voltage entry monitor mode)
VDD_S
Serial programming Schematic
74HC125
2N3904
VDD_S
PTB0
74HC125 74HC125 74HC125
9.8304 OSCILLATOR
Freescale Semiconductor, Inc.
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signal optional.
9.8304
(optional)
VTST signal only required high voltage entry Monitor Mode.
Freescale Semiconductor, Inc. Program Listing
Assembler Directives $base 68HC908JL3 User Mode FLASH Mass Erase Author Roger File Name jl3icp.asm Description: This program allows mass erase itself user mode. detect condition mass erase PTB0=1 PTD3=0. successful code execution, user should frequency 2.4576MHz. This derived from 9.8304MHz xtal HC908 part. program uses subroutine, erase_cmd, located $FC06 monitor ROM, mass erase operation. Jumper setting during power-up reset: Jumper user mode mass erase mode PTB0 pull-up(10k) pull-up pull-up PTD3 pull-up (10k) short ground Version Date Description 20/2/2000 (JL3) Assignment ;-PTA Port Port Port DDRA Port direction register DDRB Port direction register DDRD Port direction register s_data Serial data used monitor mode Ps_data Port location serial data DDRs_data DDRB Port direction location serial data FLASH Control Register ;-FLCR HVEN MASS ERASE $fe08 FLASH Control Register
Freescale Semiconductor, Inc.
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Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc.
Main Program ;-org MAIN START: DDRB check user mode mass erase condition DDRD PTB0=5V PTD3=GND user mode condition brclr 0,PTB,USERCODE check PTB0=5V brset 3,PTD,USERCODE check PTD3=GND CONFIG2 #$31,CONFIG1 disable clrx NEXTRAM: MASS_ERASE,x Load mass erase code from FLASH RAM,x incx cbeqx #{ENDRAM-MASS_ERASE},RUNRAM NEXTRAM RUNRAM: Execute mass erase USERCODE: Start user application code Mass Erase ;-MASS_ERASE: #$ff unprotect FLASH area FLBPR #%01000000,ctrlbyt setup mass erase #10,cpuspd ldhx #$ffff erase_cmd mass erase routine #$0A Mem_check $FFF6,x #$FF M_erase decx Mem_check ICPMODE: Waiting power-off device, then enter mode using SPGMR MCUscribe M_erase ENDRAM: RSTVECTOR START RESET
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AN-HK-33 In-Circuit Programming FLASH Memory MC68HC908JL3 Fr

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