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SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74S04 INVERTERS
Dependable Texas Instruments Quality
description/ordering information
These devices contain independent inverters.
SN5404 PACKAGE SN54LS04, SN54S04 PACKAGE SN7404, SN74S04 PACKAGE SN74LS04 PACKAGE (TOP VIEW)
SN5404 PACKAGE (TOP VIEW)
SN54LS04, SN54S04 PACKAGE (TOP VIEW)
internal connection Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. products compliant 38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters.
Copyright 2004, Texas Instruments Incorporated
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SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74S04 INVERTERS
ORDERING INFORMATION
PACKAGE Tube PDIP Tube Tube Tube Tape reel Tube 70°C SOIC Tape reel Tube Tape reel Tape reel SSOP Tape reel Tape reel Tape reel Tube Tube Tube CDIP Tube Tube 125°C -55°C Tube Tube Tube Tube Tube LCCC Tube ORDERABLE PART NUMBER SN7404N SN74LS04N SN74S04N SN7404D SN7404DR SN74LS04D SN74LS04DR SN74S04D SN74S04DR SN7404NSR SN74LS04NSR SN74S04NSR SN74LS04DBR SN5404J SNJ5404J SN54LS04J SN54S04J SNJ54LS04J SNJ54S04J SNJ5404W SNJ54LS04W SNJ54S04W SNJ54LS04FK SNJ54S04FK SN7404 74LS04 74S04 LS04 SN5404J SNJ5404J SN54LS04J SN54S04J SNJ54LS04J SNJ54S04J SNJ5404W SNJ54LS04W SNJ54S04W SNJ54LS04FK SNJ54S04FK LS04 7404 TOP-SIDE MARKING SN7404N SN74LS04N SN74S04N
Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. FUNCTION TABLE (each inverter) INPUT OUTPUT
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SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74S04 INVERTERS
logic diagram (positive logic)
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SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74S04 INVERTERS
schematics (each gate)
Input Output
'LS04
'S04
Input
Output
Input
Output
Resistor values shown nominal.
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SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74S04 INVERTERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, (see Note Input voltage, '04, 'S04 'LS04 Package thermal impedance, (see Note package 86°C/W package 96°C/W package 80°C/W package 76°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. This stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: Voltage values with respect network ground terminal. package thermal impedance calculated accordance with JESD 51-7.
recommended operating conditions (see Note
SN5404 Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Operating free-air temperature -0.4 4.75 -0.4 SN7404 5.25 UNIT
NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER ICCH ICCL MIN, MIN, MIN, MAX, MAX, MAX, MAX, MAX, TEST CONDITIONS SN5404 -1.6 -1.5 -0.4 -1.6 SN7404 -1.5 UNIT
conditions shown MAX, appropriate value specified under recommended operating conditions. typical values 25°C. more than output should shorted time.
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SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74S04 INVERTERS
switching characteristics, 25°C (see Figure
PARAMETER tPLH tPHL FROM (INPUT) (OUTPUT) TEST CONDITIONS SN5404 SN7404 UNIT
recommended operating conditions (see Note
SN54LS04 Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Operating free-air temperature -0.4 SN74LS04 4.75 -0.4 5.25 UNIT
NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER ICCH ICCL MIN, MIN, MIN, MAX, MAX, MAX, MAX, MAX, TEST CONDITIONS MAX, SN54LS04 -1.5 -0.4 -0.4 -100 0.25 0.25 -0.4 -100 SN74LS04 -1.5 UNIT
conditions shown MAX, appropriate value specified under recommended operating conditions. typical values 25°C. more than output should shorted time, duration short-circuit should exceed second.
switching characteristics, 25°C (see Figure
PARAMETER tPLH tPHL FROM (INPUT) (OUTPUT) TEST CONDITIONS SN54LS04 SN74LS04 UNIT
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SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74S04 INVERTERS
recommended operating conditions (see Note
SN54S04 Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Operating free-air temperature 4.75 SN74S04 5.25 UNIT
NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER ICCH ICCL MIN, MIN, MIN, MAX, MAX, MAX, MAX, MAX, TEST CONDITIONS SN54S04 -1.2 -100 -100 SN74S04 -1.2 UNIT
conditions shown MAX, appropriate value specified under recommended operating conditions. typical values 25°C. more than output should shorted time, duration short-circuit should exceed second.
switching characteristics, 25°C (see Figure
PARAMETER tPLH tPHL tPLH tPHL FROM (INPUT) (OUTPUT) TEST CONDITIONS SN54S04 SN74S04 UNIT
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SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74S04 INVERTERS
PARAMETER MEASUREMENT INFORMATION SERIES 54/74 54S/74S DEVICES
Test Point From Output Under Test (see Note (see Note From Output Under Test (see Note Test Point Test Point (see Note
From Output Under Test (see Note
LOAD CIRCUIT 2-STATE TOTEM-POLE OUTPUTS High-Level Pulse
LOAD CIRCUIT OPEN-COLLECTOR OUTPUTS Timing Input Data Input
LOAD CIRCUIT 3-STATE OUTPUTS VOLTAGE WAVEFORMS SETUP HOLD TIMES
Low-Level Pulse
VOLTAGE WAVEFORMS PULSE DURATIONS Output Control (low-level enabling) tPZL Waveform (see Notes tPZH VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES Waveform (see Notes
tPLZ tPHZ
Input tPLH In-Phase Output (see Note tPHL Out-of-Phase Output (see Note tPHL tPLH
VOLTAGE WAVEFORMS ENABLE DISABLE TIMES, 3-STATE OUTPUTS
NOTES: includes probe capacitance. diodes 1N3064 equivalent. Waveform output with internal conditions such that output low, except when disabled output control. Waveform output with internal conditions such that output high, except when disabled output control. closed tPLH, tPHL, tPHZ, tPLZ; open closed tPZH; closed open tPZL. input pulses supplied generators having following characteristics: MHz, Series 54/74 devices Series 54S/74S devices. outputs measured time, with input transition measurement.
Figure Load Circuits Voltage Waveforms
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SN5404, SN54LS04, SN54S04, SN7404, SN74LS04, SN74S04 INVERTERS
PARAMETER MEASUREMENT INFORMATION SERIES 54LS/74LS DEVICES
Test Point From Output Under Test (see Note (see Note From Output Under Test (see Note Test Point Test Point (see Note
From Output Under Test (see Note
LOAD CIRCUIT 2-STATE TOTEM-POLE OUTPUTS High-Level Pulse
LOAD CIRCUIT OPEN-COLLECTOR OUTPUTS Timing Input Data Input
LOAD CIRCUIT 3-STATE OUTPUTS VOLTAGE WAVEFORMS SETUP HOLD TIMES
Low-Level Pulse
VOLTAGE WAVEFORMS PULSE DURATIONS Output Control (low-level enabling) tPZL Waveform (see Notes tPZH VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES Waveform (see Notes
tPLZ tPHZ
Input tPLH In-Phase Output (see Note tPHL Out-of-Phase Output (see Note tPHL tPLH
VOLTAGE WAVEFORMS ENABLE DISABLE TIMES, 3-STATE OUTPUTS
NOTES: includes probe capacitance. diodes 1N3064 equivalent. Waveform output with internal conditions such that output low, except when disabled output control. Waveform output with internal conditions such that output high, except when disabled output control. closed tPLH, tPHL, tPHZ, tPLZ; open closed tPZH; closed open tPZL. Phase relationships between inputs outputs have been chosen arbitrarily these examples. input pulses supplied generators having following characteristics: MHz, outputs measured time, with input transition measurement.
Figure Load Circuits Voltage Waveforms
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PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2005
PACKAGING INFORMATION
Orderable Device JM38510/00105BCA JM38510/00105BDA JM38510/07003BCA JM38510/30003B2A JM38510/30003BCA JM38510/30003BDA JM38510/30003SCA JM38510/30003SDA SN5404J SN54LS04J SN54S04J SN7404D SN7404DR SN7404N SN7404N3 SN7404NSR SN74LS04D SN74LS04DR SN74LS04J SN74LS04N SN74LS04N3 SN74LS04NSR SN74S04D SN74S04DR SN74S04N SN74S04N3 SN74S04NSR SNJ5404J SNJ5404W SNJ54LS04FK SNJ54LS04J SNJ54LS04W SNJ54S04FK SNJ54S04J Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type CDIP CDIP LCCC CDIP CDIP CDIP CDIP CDIP SOIC SOIC PDIP PDIP SOIC SOIC CDIP PDIP PDIP SOIC SOIC PDIP PDIP CDIP LCCC CDIP LCCC CDIP Package Drawing Pins Package Plan 2000 2000 2500 2000 2500 2500 None None None None None None None None None None None Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) None Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) None Pb-Free (RoHS) None Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) None Pb-Free (RoHS) None None None None None None None Lead/Ball Finish Call Call Call Call Call Call Call Call Call Call Call NIPDAU NIPDAU NIPDAU Call NIPDAU NIPDAU NIPDAU Call NIPDAU Call NIPDAU NIPDAU NIPDAU NIPDAU Call NIPDAU Call Call Call Call Call Call Call Peak Temp Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-NC-NC-NC Call Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Call Level-NC-NC-NC Call Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-NC-NC-NC Call Level-2-260C-1 YEAR/ Level-1-235C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC
Addendum-Page
PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2005
Orderable Device SNJ54S04W
Status ACTIVE
Package Type
Package Drawing
Pins Package Plan None
Lead/Ball Finish Call
Peak Temp Level-NC-NC-NC
marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device.
Plan currently available please check latest availability information additional product content details. None: available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Green (RoHS Sb/Br): defines "Green" mean "Pb-Free" addition, uses package materials that contain halogens, including bromine (Br) antimony (Sb) above 0.1% total product weight.
MSL, Peak Temp. Moisture Sensitivity Level rating according JEDECindustry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis.
Addendum-Page
MECHANICAL DATA
MLCC006B OCTOBER 1996
(S-CQCC-N**)
TERMINAL SHOWN
LEADLESS CERAMIC CHIP CARRIER
TERMINALS
0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6)
0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0)
0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25)
0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
0.045 (1,14) 0.035 (0,89)
4040140 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with metal lid. terminals gold plated. Falls within JEDEC MS-004
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