HIGH-PERFORMANCE MIPS CONTROL PROCESSOR FEATURES MIPS64CPU Q

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HIGH-PERFORMANCE MIPS CONTROL PROCESSOR FEATURES MIPS64CPU Q

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BCM1122
HIGH-PERFORMANCE MIPS CONTROL PROCESSOR
FEATURES MIPS64CPU
Quad-issue order pipeline; dual execute, dual memory pipes Enhanced skew pipeline enables zero load-to-use penalty 32-KB instruction cache, 32-KB data cache Advanced branch predictors Fast, on-chip memory-coherent (ZBbus) Connects CPU, cache, memory controller bridges Runs half core clock; bits wide On-chip cache 128KB, shared bridges Four-way associative, protected Ways removed provide fast on-chip memory controller channel with 64-bit data plus Runs clock rate, Mbps data rate Support SDRAM, SGRAM, FCRAM High-speed packet interfaces 10/100/1000 Ethernet MAC, 10/100 Ethernet 802.3 compliant with option configure into packet FIFO interface 32-bit, 33/66 Host bridge target device Integrated system Generic direct connect boot ROM, FLASH, fast peripherals/ASICs SMBus serial configuration interface PCMCIA control interface serial interfaces Extensive, on-chip debug features
SUMMARY BENEFITS Industry-leading performance Dhrystone MIPS/MHz 51-Gbps on-chip bandwidth, 13-Gbps memory bandwidth power dissipation
High functional integration Programming ease flexibility based MIPS64 Scalable system architecture Broad tools system software support Software-compatible with BCM1250 BCM1125H
APPLICATIONS BCM1122's world-class performance, power efficiency
integration makes these processors ideal broad variety systems including: Networking: routers, switches Control plane processing Line cards Broadband access: DSLAM, CMTS, BRAS Wireless base stations Storage: RAID controllers, controllers, HBAs Web/networking/caching appliances Imaging: printers, copiers
Software-compatible with BCM1250 BCM1125H Support leading operating systems including VxWorks®,
FLASH 10/100 Ethernet Port Debug
BCM5461
GenBus
Linux NetBSD, Evaluation board platform available with tools, firmware software drivers
Data Plane ASIC
BCM1122
GMII
SDRAM
Host
Example: Card TCP/IP Acceleration
OVERVIEW
JTAG
Debug/ Trace
Data Mover
SB-1 Core Bits ZBbus
128K Cache
Memory Controller
Serial Interface
Gbps
GPIO/ Interrupt/ PCMCIA Dual SMBus Gbps Generic Flash
Gbps
200MHz clock; Gbps bandwidth
Serial Interface
Gbps
10/100/ 1000
10/100/
8-Bit FIFO
32-Bit
Gbps
Broadcom's BCM1122 state-of-the-art processor solution targeted fast-growing networking, wireless communications, storage, server/networking appliance imaging markets. BCM1122 offers industry-leading performance, high functional integration, power levels small package required next-generation networking applications. BCM1122 software-compatible with BCM1125H dual-processor BCM1250 share development modeling tools, firmware, operating systems. BCM1122 intelligent system-on-a-chip consisting Broadcom SB-1 high performance MIPS64 CPU, shared 128-KB cache, memory controller, integrated I/O. major blocks processor connected together ZBbus, high-speed, low-latency, split-transaction, memory-coherent bus. implements standard MESI protocol ensure coherency between CPU, cache, agents, memory. Gigabit Ethernet (10/100/1000) Fast Ethernet (10/100) enable easy interfacing LANs well connecting data plane components over Ethernet packet FIFO interface. cases where Ethernet protocol processing required, Gigabit Ethernet configured 8-bit packet FIFO. High-speed provided using 66-MHz (rev 2.2) local bus. serial ports provided connections T3/OC-1 rates Mbps). enable low-chip-count systems, BCM1122 processors also include configurable generic that allows glueless connection boot FLASH memory simple peripherals. On-chip debugging, tracing, performance monitoring functions assist both hardware software designers debugging tuning system. system either big- little-endian mode. BCM1122 manufactured TSMC's 0.13-µ process, packaged pin-compatible 31-mm package that pin-compatible with BCM1125H. Implementation MIPS64 SB-1 core high-performance implementation standard MIPS64 Instruction Architecture (ISA), incorporates MIPS-3D MIPS-MDMX Application Specific Extensions (ASEs). core supports four-issue enhanced skew pipeline dispatch memory (Integer, Floating Point, MDMX MIPS-3D) instructions cycle.
Broadcom®, pulse logo, Connecting everything® trademarks Broadcom Corporation and/ subsidiaries United States certain other countries. other trademarks mentioned property their respective owners.
BROADCOM CORPORATION 16215 Alton Parkway, P.O. 57013 Irvine, California 92619-7013
2004 BROADCOM CORPORATION. rights reserved. 1122-PB00-R 05/19/04
Phone: 949-450-8700 Fax: 949-450-8710 E-mail: info@broadcom.com Web: www.broadcom.com

HIGH-PERFORMANCE MIPS CONTROL PROCESSOR FEATURES MIPS64CPU Q

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