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49A, 55V, 0.024 Ohm, N-Channel UltraFET Power MOSFETs These N-Cha
Top Searches for this datasheetHUF75329G3, HUF75329P3, HUF75329S3S 49A, 55V, 0.024 Ohm, N-Channel UltraFET Power MOSFETs These N-Channel power MOSFETs manufactured using innovative UltraFETprocess. This advanced process technology achieves lowest possible on-resistance silicon area, resulting outstanding performance. This device capable withstanding high energy avalanche mode diode exhibits very reverse recovery time stored charge. designed applications where power efficiency important, such switching regulators, switching converters, motor drivers, relay drivers, lowvoltage switches, power management portable battery-operated products. Formerly developmental type TA75329. Features 49A, Ultra On-Resistance, rDS(ON) 0.024 Temperature Compensating PSPICE® SABER© Models Available www.Intersil.com Thermal Impedance PSPICE SABER Models Peak Current Pulse Width Curve Rating Curve Related Literature TB334, "Guidelines Soldering Surface Mount Components Boards" Symbol Ordering Information PART NUMBER HUF75329G3 HUF75329P3 HUF75329S3S PACKAGE TO-247 TO-220AB TO-263AB BRAND 75329G 75329P 75329S NOTE: When ordering, entire part number. suffix obtain TO-263AB variant tape reel, e.g., HUF75329S3ST. Packaging JEDEC STYLE TO-247 SOURCE DRAIN GATE DRAIN (FLANGE) JEDEC TO-220AB SOURCE DRAIN GATE DRAIN (TAB) JEDEC TO-263AB DRAIN (FLANGE) GATE SOURCE CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. UltraFETis trademark Intersil Corporation. PSPICE® registered trademark MicroSim Corporation. SABER Copyright Analogy, Inc. 1-888-INTERSIL 321-724-7143 Copyright Intersil Corporation 2000. HUF75329G3, HUF75329P3, HUF75329S3S Absolute Maximum Ratings 25oC, Unless Otherwise Specified Figure Figures 0.86 UNITS Drain Source Voltage (Note VDSS Drain Gate Voltage (RGS 20k) (Note VDGR Gate Source Voltage Drain Current Continuous (Figure Pulsed Drain Current .IDM Pulsed Avalanche Rating Power Dissipation Derate Above 25oC Operating Storage Temperature TSTG Maximum Temperature Soldering Leads 0.063in (1.6mm) from Case 10s. Package Body 10s, Techbrief Tpkg W/oC CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied. NOTE: 25oC 150oC. Electrical Specifications PARAMETER STATE SPECIFICATIONS 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS UNITS Drain Source Breakdown Voltage Zero Gate Voltage Drain Current BVDSS IDSS 250µA, (Figure 50V, 45V, 150oC ±100 Gate Source Leakage Current STATE SPECIFICATIONS Gate Source Threshold Voltage Drain Source Resistance THERMAL SPECIFICATIONS Thermal Resistance Junction Case Thermal Resistance Junction Ambient IGSS ±20V VGS(TH) rDS(ON) VDS, 250µA (Figure 49A, (Figure 0.020 0.024 (Figure TO-247 TO-220, TO-263 1.17 oC/W oC/W oC/W SWITCHING SPECIFICATIONS (VGS 10V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge Threshold Gate Charge Gate Source Gate Charge Gate Drain "Miller" Charge Qg(TOT) Qg(10) Qg(TH) 30V, 49A, 0.61 Ig(REF) 1.0mA (Figure td(ON) td(OFF) tOFF 30V, 49A, 0.61, 10V, HUF75329G3, HUF75329P3, HUF75329S3S Electrical Specifications PARAMETER CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance CISS COSS CRSS 25V, 1MHz (Figure 1060 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS UNITS Source Drain Diode Specifications PARAMETER Source Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge SYMBOL 49A, dISD/dt 100A/µs 49A, dISD/dt 100A/µs TEST CONDITIONS 1.25 UNITS Typical Performance Curves POWER DISSIPATION MULTIPLIER CASE TEMPERATURE (oC) CASE TEMPERATURE (oC) FIGURE NORMALIZED POWER DISSIPATION CASE TEMPERATURE THERMAL IMPEDANCE ZJC, NORMALIZED DUTY CYCLE DESCENDING ORDER 0.05 0.02 0.01 NOTES: DUTY FACTOR: t1/t2 PEAK 10-3 10-2 10-1 SINGLE PULSE 0.01 10-4 RECTANGULAR PULSE DURATION FIGURE NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE DRAIN CURRENT FIGURE MAXIMUM CONTINUOUS DRAIN CURRENT CASE TEMPERATURE HUF75329G3, HUF75329P3, HUF75329S3S Typical Performance Curves 1000 (Continued) 25oC IDM, PEAK CURRENT TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT FOLLOWS: TRANSCONDUCTANCE LIMIT CURRENT THIS REGION 10-5 10-4 10-3 10-2 PULSE WIDTH 10-1 FIGURE PEAK CURRENT CAPABILITY 100µs IAS, AVALANCHE CURRENT RATED 25oC (L)(IAS)/(1.3*RATED BVDSS VDD) (L/R)ln[(IAS*R)/(1.3*RATED BVDSS VDD) DRAIN CURRENT STARTING 25oC OPERATION THIS AREA LIMITED rDS(ON) VDSS(MAX) 10ms STARTING 150oC 0.001 0.01 tAV, TIME AVALANCHE (ms) VDS, DRAIN SOURCE VOLTAGE NOTE: Refer Intersil Application Notes AN9321 AN9322. FIGURE FORWARD BIAS SAFE OPERATING AREA FIGURE UNCLAMPED INDUCTIVE SWITCHING CAPABILITY DRAIN CURRENT DRAIN CURRENT PULSE TEST PULSE DURATION 80µs DUTY CYCLE 0.5% -55oC 175oC PULSE DURATION 80µs 25oC 25oC VDS, DRAIN SOURCE VOLTAGE VGS, GATE SOURCE VOLTAGE FIGURE SATURATION CHARACTERISTICS FIGURE TRANSFER CHARACTERISTICS HUF75329G3, HUF75329P3, HUF75329S3S Typical Performance Curves NORMALIZED DRAIN SOURCE RESISTANCE 80µs PULSE TEST 10V, NORMALIZED GATE THRESHOLD VOLTAGE (Continued) VDS, 250µA JUNCTION TEMPERATURE (oC) JUNCTION TEMPERATURE (oC) FIGURE NORMALIZED DRAIN SOURCE RESISTANCE JUNCTION TEMPERATURE FIGURE NORMALIZED GATE THRESHOLD VOLTAGE JUNCTION TEMPERATURE NORMALIZED DRAIN SOURCE BREAKDOWN VOLTAGE 250µA 1800 1500 CAPACITANCE (pF) 1MHz CISS CRSS COSS CISS 1200 COSS CRSS DRAIN SOURCE VOLTAGE JUNCTION TEMPERATURE (oC) FIGURE NORMALIZED DRAIN SOURCE BREAKDOWN VOLTAGE JUNCTION TEMPERATURE GATE SOURCE VOLTAGE FIGURE CAPACITANCE DRAIN SOURCE VOLTAGE WAVEFORMS DESCENDING ORDER: 36.75A 24.5A 12.25A GATE CHARGE (nC) NOTE: Refer Intersil Application Notes AN7254 AN7260. FIGURE GATE CHARGE WAVEFORMS CONSTANT GATE CURRENT HUF75329G3, HUF75329P3, HUF75329S3S Test Circuits Waveforms BVDSS VARY OBTAIN REQUIRED PEAK 0.01 FIGURE UNCLAMPED ENERGY TEST CIRCUIT FIGURE UNCLAMPED ENERGY WAVEFORMS Qg(TOT) Qg(10) Qg(TH) Ig(REF) IG(REF) FIGURE GATE CHARGE TEST CIRCUIT FIGURE GATE CHARGE WAVEFORM td(ON) tOFF td(OFF) PULSE WIDTH FIGURE SWITCHING TIME TEST CIRCUIT FIGURE RESISTIVE SWITCHING WAVEFORMS HUF75329G3, HUF75329P3, HUF75329S3S PSPICE Electrical Model .SUBCKT HUF75329P 1.72e-9 1.52e-9 9.61e-10 LDRAIN 6/19/97 DBODY DBODYMOD DBREAK DBREAKMOD DPLCAP DPLCAPMOD EBREAK 58.13 EVTHRES EVTEMP LDRAIN 1e-9 LGATE 2.86e-9 LSOURCE 2.69e-9 MMED MMEDMOD MSTRO MSTROMOD MWEAK MWEAKMOD RBREAK RBREAKMOD RDRAIN RDRAINMOD 1e-3 RGATE 1.52 RLDRAIN RLGATE 26.9 RLSOURCE 28.6 RSLC1 RSLCMOD 1e-6 RSLC2 RSOURCE RSOURCEMOD 13.85e-3 RVTHRES RVTHRESMOD RVTEMP RVTEMPMOD S1AMOD S1BMOD S2AMOD S2BMOD GATE RLGATE DPLCAP RLDRAIN DBREAK EBREAK DRAIN RSLC1 ESLC RSLC2 LGATE EVTEMP RGATE EVTHRES MSTRO LSOURCE RSOURCE RLSOURCE RBREAK RVTEMP SOURCE VBAT ESLC .MODEL DBODYMOD 7.50e-13 5.05e-3 TRS1 2.21e-3 TRS2 1.02e-6 1.51e-9 4.05e-8 0.5) .MODEL DBREAKMOD 2.14e-1 TRS1 9.62e-4 TRS2 1.23e-6) .MODEL DPLCAPMOD (CJO 13.5e-10 1e-30 0.85) .MODEL MMEDMOD NMOS (VTO 3.25 2.50 1e-30 1.52) .MODEL MSTROMOD NMOS (VTO 3.80 70.0 1e-30 .MODEL MWEAKMOD NMOS (VTO 2.91 0.06 1e-30 15.2 0.1) .MODEL RBREAKMOD (TC1 1.05e-3 1.94e-7) .MODEL RDRAINMOD (TC1 8.04e-2 1.37e-4) .MODEL RSLCMOD (TC1 4.83e-3 1.16e-6) .MODEL RSOURCEMOD (TC1 .MODEL RVTHRESMOD -3.43e-3 -1.63e-5) .MODEL RVTEMPMOD (TC1 -1.35e-3 1.16e-6) .MODEL S1AMOD VSWITCH (RON 1e-5 .MODEL S1BMOD VSWITCH (RON 1e-5 .MODEL S2AMOD VSWITCH (RON 1e-5 .MODEL S2BMOD VSWITCH (RON 1e-5 .ENDS ROFF ROFF ROFF ROFF -7.90 VOFF= -4.90) -4.90 VOFF= -7.90) -0.50 VOFF= 2.50) 2.50 VOFF= -0.50) NOTE: further discussion PSPICE model, consult PSPICE Sub-Circuit Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written William Hepp Frank Wheatley. RDRAIN DBODY MWEAK MMED VBAT RVTHRES HUF75329G3, HUF75329P3, HUF75329S3S SABER Electrical Model June 1997 template huf75329p electrical iscl d.model dbodymod 7.50e-13, 1.51e-9, 4.05e-8, 0.5) d.model dbreakmod d.model dplcapmod (cjo 13.5e-10, 1e-30, 0.85) m.model mmedmod (type=_n, 3.25, 2.50, 1e-30, m.model mstrongmod (type=_n, 3.80, 1e-30, m.model mweakmod (type=_n, 2.91, 0.06, 1e-30, sw_vcsp.model s1amod (ron 1e-5, roff 0.1, -7.90, voff -4.90) sw_vcsp.model s1bmod (ron 1e-5, roff 0.1, -4.90, voff -7.90) sw_vcsp.model s2amod (ron 1e-5, roff 0.1, -0.50, voff 2.50) sw_vcsp.model s2bmod (ron 1e-5, roff 0.1, 2.50, voff -0.50) c.ca 1.72e-9 c.cb 1.52e-9 c.cin 9.61e-10 LDRAIN DPLCAP RSLC1 RSLC2 ISCL RLDRAIN RDBREAK DBREAK MWEAK MMED MSTRO EBREAK RDBODY DRAIN LGATE GATE RLGATE EVTEMP RGATE EVTHRES RDRAIN d.dbody model=dbodymod d.dbreak model=dbreakmod d.dplcap model=dplcapmod i.it DBODY l.ldrain 1e-9 l.lgate 2.86e-9 l.lsource 2.69e-9 k.k1 i(l.lgate) i(l.lsource) l(l.lgate), l(l.lsource), 0.0085 LSOURCE RLSOURCE SOURCE RSOURCE RBREAK RVTEMP m.mmed model=mmedmod, m.mstrong model=mstrongmod, m.mweak model=mweakmod, res.rbreak 1.05e-3, 1.94e-7 res.rdbody 5.05e-3, 2.21e-3, 1.02e-6 res.rdbreak 2.14e-1, 9.62e-4, 1.23e-6 res.rdrain 1e-3, 8.04e-2, 1.37e-4 res.rgate 1.52 res.rldrain res.rlgate 26.9 res.rlsource 28.6 res.rslc1 1e-6, 4.83e-3, 1.16e-6 res.rslc2 res.rsource 13.85e-3, res.rvtemp -1.35e-3, 1.16e-6 res.rvthres -3.43e-3, -1.63e-5 spe.ebreak 58.13 spe.eds spe.egs spe.esg spe.evtemp spe.evthres sw_vcsp.s1a model=s1amod sw_vcsp.s1b model=s1bmod sw_vcsp.s2a model=s2amod sw_vcsp.s2b model=s2bmod v.vbat VBAT RVTHRES equations (n51->n50) iscl iscl: v(n51,n50) 3.5)) HUF75329G3, HUF75329P3, HUF75329S3S SPICE Thermal Model February 1999 HUF75329P CTHERM1 2.80e-3 CTHERM2 1.00e-2 CTHERM3 6.80e-3 CTHERM4 7.00e-3 CTHERM5 2.2e-2 CTHERM6 5.1e-2 RTHERM1 7.94e-3 RTHERM2 1.98e-2 RTHERM3 5.57e-2 RTHERM4 3.13e-1 RTHERM5 4.61e-1 RTHERM6 7.26e-2 RTHERM1 CTHERM1 JUNCTION RTHERM2 CTHERM2 RTHERM3 CTHERM3 SABER Thermal Model SABER thermal model HUF75329P template thermal_model thermal_c ctherm.ctherm1 2.80e-3 ctherm.ctherm2 1.00e-2 ctherm.ctherm3 6.80e-3 ctherm.ctherm4 7.00e-3 ctherm.ctherm5 2.2e-2 ctherm.ctherm6 5.1e-2 rtherm.rtherm1 7.94e-3 rtherm.rtherm2 1.98e-2 rtherm.rtherm3 5.57e-2 rtherm.rtherm4 3.13e-1 rtherm.rtherm5 4.61e-1 rtherm.rtherm6 7.26e-2 RTHERM4 CTHERM4 RTHERM5 CTHERM5 RTHERM6 CTHERM6 CASE Intersil semiconductor products manufactured, assembled tested under ISO9000 quality systems certification. Intersil semiconductor products sold description only. Intersil Corporation reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. 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