With main clock operated When sub-clock operated MN101D06F MN101D06G Q

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With main clock operated When sub-clock operated MN101D06F MN101D06G Q

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MN101D06F MN101D06G MN101D06H
With main clock operated When sub-clock operated MN101D06F MN101D06G QFP100-P-1818B free
Servo
MN101D06H
0.1397 14.32 MHz) 71.5 fixed 14.32 internal frequency division) 32.768 kHz)
RESET Runaway External 4/key input (p50 Timer Timer Timer Timer Timer Timer Capstan Control Cylinder Servo VSYNC Synchronous output Serial Serial Serial (common with reference frequency) OSDVSYNC Timer counter 16-bit (timer function, clock function [max. max. cascade-connecting with timer Clock source 1/2, 1/4, 1/8, 1/16 system clock frequency; overflow timer counter 1/512 oscillation clock oscillation clock frequency Interrupt source overflow timer counter Timer counter 16-bit (timer function, linear timer counter function) Clock source 1/2, 1/4, 1/8, 1/16 system clock frequency; signal Interrupt source overflow timer counter Timer counter 16-bit (timer function, input capture (DCTL specified edge), duty judgment DCTL signal) Clock source 1/2, 1/4, 1/8, 1/12, 1/16, 1/24 system clock frequency Interrupt source overflow timer counter input DCTL specified edge; underflow timer shift register 4-bit counter; coincidence timer shift register with timer shift register compare register Timer counter 16-bit (timer function, detection serial indexing, generation remote control output carrier frequency) Clock source 1/2, 1/4, 1/8, 1/16 system clock frequency; oscillation clock Interrupt source overflow timer counter Timer counter 16-bit (timer function, event count [P15 input], generation serial transmission clock) Clock source 1/8, 1/16 system clock frequency; external clock input Interrupt source overflow timer counter coincidence timer counter with OCR4 Timer counter 17-bit (watchdog, stable oscillation waiting function) Clock source system clock Watchdog interrupt source 1/219 timer counter frequency Clear stable oscillation after counts timer counter (218 counts oscillation clock) Timer counter 16-bit (clock function [max. Clock source 1/512 oscillation clock frequency; oscillation clock; 1/4, 1/8, 1/64, 1/128 system clock frequency Interrupt source 1/214, 1/215 overflow timer counter Timer counter 8-bit (timer function, event count [P53 input]) Clock source 1/4, 1/8, 1/16, 1/32 system clock frequency; external clock input Interrupt source overflow timer counter
Timer Counter
Serial Interface
Serial 8-bit (synchronous type/start-stop synchronous type) (transfer direction MSB/LSB selectable) Synchronous type clock source 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 system clock frequency; 2-division timer output; SBT0 input Clock UART 8-division above clock; 2-division timer output; SBT0 input
MN101D06F MN101D06G MN101D06H
Serial Interface (Continue)
Serial 8-bit (synchronous type/remote control transmission/simple remote control receive) (transfer direction MSB/LSB selectable, start condition function) Clock source 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 system clock frequency; 2-division timer output; SBT1 input Remote control clock 2-division timer output Serial 8-Bit (I2C) (master transmission/reception, slave transmission/reception) Clock source 1/144 1/252 system clock, input
mode: Accommodation with menu super impose display Applicable broadcasting system NTSC, PAL, PAL-M, PAL-N Screen configuration characters rows Character type max. character types (variable) Character size dots (Vertical direction: setting.) Enlarged characters each settings horizontal vertical Character interpolation none Line background color 8-hue settable (settable unit menu display) Line background intensity gradations settable unit Screen background color 8-hue settable output composite video signal) Character color white Character intensity gradations settable unit Frame function 1-dot frame directions Frame intensity gradations settable unit shade function settable character unit output composite video signal with more characters (character types)) Blinking none (covered software) Inverted character settable character unit Halftone settable unit intensity gradations output external synchronous composite video signal) mode:Supports Closed Caption U.S.A. Screen configuration characters rows Character type max. character types (variable) Character size dots (Vertical direction: including dots underlined area) Enlarged characters none Character interpolation none Line background color 8-hue settable Line background intensity gradations settable screen unit output composite video signal) Screen background color 8-hue settable output composite video signal) Character color colors output) White output composite video signal) Character intensity gradations settable screen unit Frame function none shade function none Inverted character none Halftone settable unit intensity gradations output external synchronous composite video signal) Others Underline, italic, blinking function scroll Input composite video signal input (output level: V[p-p] V[p-p]) Clamp method sync chip clamp, clamp level levels Output composite video output digital output pins) Measure against image fluctuation built-in circuit clock oscillation clock (automatic phase adjustment)
next page electrical characteristics, assignment support tool.
Correction Pins Inputs Special Ports Input
Built-in U.S. closed caption data slicer (optional line data extracted.) Correcting address designation: addresses possible Correction method: correction program being saved internal Common use: ports bit) Common use:
8-bit 13-ch. (without S/H) 13-bit 2-ch. repetition cycle 14.32 MHz), 10-bit 2-ch. repetition cycle 71.5 14.32 MHz), 8-bit 1-ch. repetition cycle 35.7 14.32 MHz) 18-bit 6-ch. 16-bit 7-ch. 8-bit 1-ch. Buzzer output; 3-state output (PTO) pin; synchronous output: 3-state synchronous output: remote control receive; amp; built-in amp; output oscillation clock V[p-p]); output oscillation clock V[p-p]) VISS/VASS detection function
Notes Electrical Characteristics
Supply current
Limit Parameter Symbol IDD1 IDD2 Operating supply current Stop 14.32 oscillation, IDD3 oscillation operation without load Supply current STOP IDSP IDHT0 Supply current HALT IDHT1 oscillation operation without load Stop oscillation without load 14.32 oscillation without load, Stop 14.32 oscillation, Condition 14.32 operation without load, 1/1024 14.32 operation without load, Unit
25°C±2°C
Converter Performance
Limit Parameter Conversion relative error Conversion Time Analog Input Voltage Symbol NLAD fosc 14.32 Condition Unit
25°C±2°C
MN101D06F MN101D06G MN101D06H
Assignment
RCTLN RCTLP AVDD CTLA AVSS YPG(P91) YFG(PFG) PGMM(P92) VOW1(PA0) VOW2(PA1) VOW3(PA2) VOW4(PA3) VOB1(PA4) VOB2(PA5) SECAM(PA7) FSCLPF(PB0) FSCI(PB1) AFCLPF(PB2) AFCC(PB3) VDD2
Support Tool
In-circuit Emulator Flash Memory Built-in Type
PX-ICE101C PX-PRB101D06-QFP100-P-1818-M Type 8-bit) 8-bit) Minimum instruction execution time MN101DF06K 0.1397 14.32 MHz) 71.5 fixed 14.32 internal division) Package QFP100-P-1818B free
IRQ0(P64) IRQ1(P63) IRQ2(P62) IRQ3(P61) IRQ4(P60) KEYIRQ4(P54) KEYIRQ3(P53) KEYIRQ2(P52) KEYIRQ1(P51) KEYIRQ0(P50) NSBT1(P07) NSBI1(P06) NSBO1(P05) NSBT0(P02) NSBI0(P01) NSBO0(P00) SDA(P27) SCK(P26) HBUFD6/BUZZER(P46) HBUFD4(P44) HBUFD2/DAOUT(P42) HBUFD0(P40) NRST(P04)
TPZ(P90/AD12) AD11(PC3) AD10(PC2) AD9(PC1) AD8(PC0) AD7(P87) AD6(P86) AD5(P85) AD4(P84) AD3(P83) AD2(P82) AD1(P81) AD0(P80) ROTA(P67) HAMP(P66) DENV(P65)
MN101D06F MN101D06G MN101D06H
CVIN2(PB4) CVIN(PB5) VSS2 CVOUT(PB6) HSYNC(PB7) VSYN(P20) OSCO2(P21) OSCI2(P22) XO(P23) XI(P24) OSCI OSCO SBUFD0(P25/PWM4) PWM0 PWM1 SBUFD1(P11/PWM2) SBUFD2(P12/PWM3) SBUFD3(P13/FF15) SBUFD4(P14/TC3O) SBUFD5(P15/TC4I) SBUFD6(OSDH/P16/XDSCK) SBUFD7(OSDV/P17/OSCDIV/XDSDAT)
QFP100-P-1818B free
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2001

With main clock operated When sub-clock operated MN101D06F MN101D06G Q

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