With main clock operated When sub-clock operated MN101D02D MN101D02F Q

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With main clock operated When sub-clock operated MN101D02D MN101D02F Q

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MN101D02D MN101D02F MN101D02G MN101D02H
With main clock operated When sub-clock operated MN101D02D MN101D02F QFP100-P-1818B free MN101D02G
Servo
MN101D02H
0.1397 14.32 MHz) 71.5 fixed 14.32 internal frequency division) 32.768 kHz)
RESET Runaway External 4/key input (p50 Timer Timer Timer Timer Timer Timer Capstan Control Cylinder Servo VSYNC Synchronous output Serial Serial Serial (common with reference frequency) OSDVSYNC Timer counter 16-bit (timer function, clock function [max. max. cascade-connecting with timer Clock source 1/2, 1/4, 1/8, 1/16 system clock frequency; overflow timer counter 1/512 oscillation clock oscillation clock frequency Interrupt source overflow timer counter Timer counter 16-bit (timer function, linear timer counter function) Clock source 1/2, 1/4, 1/8, 1/16 system clock frequency; signal Interrupt source overflow timer counter Timer counter 16-bit (timer function, input capture (DCTL specified edge), duty judgment DCTL signal) Clock source 1/2, 1/4, 1/8, 1/12, 1/16, 1/24 system clock frequency Interrupt source overflow timer counter input DCTL specified edge; underflow timer shift register 4-bit counter; coincidence timer shift register with timer shift register compare register Timer counter 16-bit (timer function, detection serial indexing, generation remote control output carrier frequency) Clock source 1/2, 1/4, 1/8, 1/16 system clock frequency Interrupt source overflow timer counter Timer counter 16-bit (timer function, event count [P15 input], generation serial transmission clock) Clock source 1/8, 1/16 system clock frequency; external clock input Interrupt source overflow timer counter coincidence timer counter with OCR4 Timer counter 17-bit (watchdog, stable oscillation waiting function) Clock source system clock Watchdog interrupt source 1/219 timer counter frequency Clear stable oscillation after counts timer counter (218 counts oscillation clock) Timer counter 16-bit (clock function [max. Clock source 1/512 oscillation clock frequency; oscillation clock; 1/4, 1/8, 1/64, 1/128 system clock frequency Interrupt source 1/214, 1/215 overflow timer counter
Timer Counter
Serial Interface
Serial 8-bit (synchronous type/start-stop synchronous type) (transfer direction MSB/LSB selectable) Synchronous type clock source 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 system clock frequency; 2-division timer output; SBT0 input Clock UART 8-division above clock; 2-division timer output; SBT0 input Serial 8-bit (synchronous type/remote control transmission/simple remote control receive) (transfer direction MSB/LSB selectable, start condition function) Clock source 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 system clock frequency; 2-division timer output; SBT1 input Remote control clock 2-division timer output
MN101D02D MN101D02F MN101D02G MN101D02H
Serial Interface (Continue)
Serial 8-Bit (I2C) (master transmission/reception, slave transmission/reception) Clock source 1/72, 1/80, 1/84, 1/96, 1/102, 1/112, 1/128, 1/144, 1/160, 1/168, 1/192, 1/224, 1/256, 1/320 system clock, input Accommodation with menu super impose display Applicable broadcasting system NTSC, PAL, PAL-M, PAL-N Screen configuration characters rows Character type max. character types (variable) Character size dots Enlarged characters each settings horizontal vertical Character interpolation none Background color 8-hue settable (settable unit menu display) Background intensity gradations settable unit Character color white Character intensity gradations settable unit Frame function 1-dot frame directions Frame intensity gradations settable unit shade function settable character unit (only composite output with character types more) Blinking none (covered software) Inverted character settable character unit Halftone settable unit intensity gradations (setting unit) Input composite video signal input (output level: V[p-p] V[p-p]) Clamp method sync chip clamp, clamp level levels Output composite video output digital output pins) character background colors each settable digital output. Measure against image fluctuation built-in circuit Sync signal detection function detection functions horizontal vertical sync signals (integral system) with horizontal sync signal interpolation function Built-in U.S. closed caption data slicer (optional line data extracted.) Correcting address designation: addresses possible Correction method: correction program being saved internal
Correction Pins Inputs Special Ports Input
Common use: ports bit) Common use:
8-bit 12-ch. (without S/H) 13-bit 2-ch. repetition cycle 14.32 MHz), 10-bit 2-ch. repetition cycle 71.5 14.32 MHz), 14-bit 1-ch. repetition cycle 1144 14.32 MHz) 18-bit 6-ch. 16-bit 7-ch. 8-bit 1-ch. Buzzer output; 3-state output (PTO) pin; synchronous output: 3-state synchronous output: remote control receive; amp; built-in amp; output oscillation clock V[p-p]); output oscillation clock V[p-p]) VISS/VASS detection function
Notes
next page electrical characteristics, assignment support tool.
Electrical Characteristics
Supply current
Limit Parameter Symbol IDD1 Operating supply current IDD2 IDD3 oscillation operation without load Supply current STOP IDSP IDHT0 Supply current HALT IDHT1 oscillation operation without load Stop oscillation without load 14.32 oscillation without load, Stop 14.32 oscillation, Condition 14.32 operation without load, 1/1024 14.32 operation without load, Stop 14.32 oscillation, Unit
25°C±2°C
Converter Performance
Limit Parameter Conversion relative error Conversion Time Analog Input Voltage Symbol NLAD fosc 14.32 Condition Unit
25°C±2°C
MN101D02D MN101D02F MN101D02G MN101D02H
Assignment
LCOSI(PA6) VOW1(PA0) VOW2(PA1) VOW3(PA2) VOW4(PA3) PGMM(P92) VOB1(PA4) VOB2(PA5) FSCLPF(PB0) LCOSO(PA7) AFCLPF(PB2)
YPG(P91)
RCTLN
RCTLP
AVDD
YFG(PFG)
FSCI(PB1)
AFCC(PB3)
CTLA
AVSS
VDD2
TPZ(P90) AD11(PC3) AD10(PC2) AD9(PC1) AD8(PC0) AD7(P87) AD6(P86) AD5(P85) AD4(P84) AD3(P83) AD2(P82) AD1(P81) AD0(P80) LED7(P77) LED6(P76) LED5(P75) LED4(P74) LED3(P73) LED2(P72) LED1(P71) LED0(P70) ROTA(P67) HAMP(P66) DENV(P65)
CVIN2(PB4) CVIN(PB5) VSS2 CVOUT(PB6) HSYNC(PB7) VSYN(P20) OSCO2(P21) OSCI2(P22) XO(P23) XI(P24) OSCI OSCO PWM14(P25) PWM0 PWM1 SBUFD1(P11/PWM2) SBUFD2(P12/PWM3) SBUFD3(P13/FF15) SBUFD4(P14/TC3O) SBUFD5(P15/TC4I) SBUFD6(OSDH/P16/XDSCK) SBUFD7(OSDV/P17/OSCDIV/XDSDAT)
MN101D02D MN101D02F MN101D02G MN101D02H
SDA(P27)
NSBI0(P01)
SCK(P26)
NSBI1(P06)
NSBT0(P02)
NSBO0(P00)
HBUFD4(P44)
KEYIRQ4(P54)
KEYIRQ3(P53)
KEYIRQ2(P52)
KEYIRQ1(P51)
KEYIRQ0(P50)
QFP100-P-1818B free
Support Tool
In-circuit Emulator EPROM Built-in Type
PX-ICE101C PX-PRB101D02-QFP100-P-1818B Type OTP: MN101DP02JAF (Engineering Sample) available] ATP: MN101DP02JAC (Engineering Sample) available] 8-bit) 8-bit) Minimum instruction execution time 0.1397 14.32 MHz) 71.5 fixed 14.32 internal division) Package OTP: QFP100-P-1818B free ATP: with ceramic window
HBUFD6/BUZZER(P46)
HBUFD2/DAOUT(P42)
HBUFD0(P40)
NSBT1(P07)
NSBO1(P05)
NRST(P04)
IRQ1(P63)
IRQ2(P62)
IRQ3(P61)
IRQ4(P60)
IRQ0(P64)
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export permit needs obtained from competent authorities Japanese Government products technologies described this material controlled under "Foreign Exchange Foreign Trade Law" exported taken Japan. technical information described this material limited showing representative characteristics applied circuit examples products. does constitute warranting industrial property, granting relative rights, granting license. products described this material intended used standard applications general electronic equipment (such office equipment, communications equipment, measuring instruments household appliances). Consult sales staff advance information following applications: Special applications (such airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems safety devices) which exceptional quality reliability required, failure malfunction products directly jeopardize life harm human body. applications other than standard applications intended. products product specifications described this material subject change without notice reasons modification and/or improvement. final stage your design, purchasing, products, therefore, most up-to-date Product Standards advance make sure that latest specifications satisfy your requirements. When designing your equipment, comply with guaranteed values, particular those maximum rating, range operating power supply voltage heat radiation characteristics. Otherwise, will liable defect which arise later your equipment. Even when products used within guaranteed values, redundant design recommended, that such equipment violate relevant laws regulations because function products. When using products which packing required, observe conditions (including shelf life after-unpacking standby time) agreed upon when specification sheets individually exchanged. part this material reprinted reproduced means without written permission from company.
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2001

With main clock operated When sub-clock operated MN101D02D MN101D02F Q

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