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M68EML08KX EMULATOR MODULE USER'S MANUAL MOTOROLA Inc., 1999; Rig


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M68EML08KXUM/D November 1999
M68EML08KX EMULATOR MODULE USER'S MANUAL
MOTOROLA Inc., 1999; Rights Reserved
Motorola reserves right make changes without further notice products herein improve reliability, function, design. Motorola does assume liability arising application product circuit described herein; neither does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola Motorola logo registered trademarks Motorola Inc. Motorola Inc. Equal Opportunity/Affirmative Action Employer.
CONTENTS CHAPTER INTRODUCTION
DEVELOPMENT SYSTEMS 1.1.1 Motorola Modular Development System (MMDS) LAYOUT Customer support
CHAPTER CONFIGURATION OPERATION
SYSTEM LIMITATIONS JUMPER HEADER CONFIGURATION 2.2.1 Function Select Header (J8, J13) 2.2.2 Clock Source Selection Header (J19) 2.2.3 VMCU Voltage Range Selection Header (J25) 2.2.4 VMCU Control Source Selection Header(J29) 2.2.5 Reserved Headers Adjusting VMCU (J27, R10) REMAINING System INSTALLATION
CHAPTER CONNECTOR INFORMATION
Target ConnectorS (J9) logic analyzer Connectors (J1, J12) Target Cable Assemblies
CHAPTER SCHEMATICS INDEX
FIGURES
M68EML08KX Emulator Module .1-3 TARGET Connector Assignments.3-1 Logic Analyzer Connectors Assignments.3-3 Target Cable Assembly.3-5
TABLES
M68EML08KX Specifications.1-4 Jumper Headers.2-2 TARGET Connector Signal Descriptions .3-2 Logic Analyzer Connector Signal Descriptions .3-4 Logic Analyzer Connector Signal Descriptions .3-4
INTRODUCTION
CHAPTER INTRODUCTION
This user's manual explains connection, configuration, operation information specific M68EML08KX Emulator Module (KXEM). KXEM makes possible emulation debugging target systems based MC68HC08KX8 microcontroller units (MCUs). KXEM low-voltage emulator, operating range Vdc. KXEM part development systems. This chapter describes those systems explains layout KXEM.
DEVELOPMENT SYSTEMS
Your KXEM part Motorola development systems: HC0508 Motorola Modular Development System (MMDS) M68MMEVS Evaluation System (MMEVS). 1.1.1 Motorola Modular Development System (MMDS) MMDS emulator system that provides state analyzer real-time memory windows. unit's integrated design environment includes editor, assembler, user interface, source-level debug. complete MMDS consists station module metal MMDS enclosure, containing control board internal power supply. emulator module (EM) such KXEM: separately purchased printed circuit board that enables system functionality specific MCUs. logic clip cable assemblies twisted-pair cables that connect station module your target system, test fixture, clock, oscillator, other circuitry useful evaluation analysis. each cable assembly molded connector, which fits into station-module Leads other each cable terminate female probe tips. Ball clips come with cable assemblies. 9-lead RS-232 serial cable cable that connects station module host computer RS-232 port.
M68EML08KXUM/D
INTRODUCTION
25-pin adapter molded assembly that lets connect 9pin cable 25-pin serial port. system software software, 3-1/2 inch diskettes. MMDS documentation MMDS user's manual, system software manual, appropriate user's manual.
select MMDS baud rate: 2400, 4800, 9600, 19200, 38400, 57600. mentioned, your KXEM gives MMDS ability emulate target systems based MC68HC08KX8 MCUs. substituting different enable your MMDS emulate target systems based different MCU. (Your Motorola representative explain available.) 1.1.2 M68MMEVS Evaluation System (MMEVS) MMEVS economical, two-board tool designing, debugging, evaluating target systems based MC68HC0508 MCU. complete MMEVS consists platform board (PFB) bottom board, which supports emulator module. platform board connectors power terminal host computer. emulator module (EM) such KXEM: separately purchased printed circuit board that enables system functionality specific MCUs. fits onto PFB. RS-232 serial cable separately purchased cable that connects host computer RS-232 port. system software software, 3-1/2 inch diskettes. MMEVS documentation MMEVS operations manual (MMEVSOM/D) appropriate user's manual.
MMEVS features automatic selection communication baud rate: 2400, 4800, 9600, 19200, 38400, 57600. With KXEM, your MMEVS emulates target systems based MC68HC08KX8 MCUs. substituting different enable your MMEVS emulate target systems based different MCU. (Your Motorola representative explain available.) Chapter explains configure your KXEM part MMDS MMEVS system.
M68EML08KXUM/D
INTRODUCTION
LAYOUT
Figure shows layout KXEM purpose identifying connectors jumper headers. These connectors jumpers described more detail section Setting Jumper Headers.
Figure 1-1. M68EML08KX Emulator Module
KXEM requires following user-supplied cables connection other components development system: 40-lead target cable Target Head Adapter, connect target system connectors 100-KOhm logic analyzer termination adapters part number HP01650-63203), connect connectors J12.
M68EML08KXUM/D
INTRODUCTION
Table lists KXEM specifications. Table 1-1. M68EML08KX Specifications
Characteristic extension ports Operating temperature Storage temperature Relative humidity Power requirements Dimensions Weight Specifications HCMOS compatible -40° +85° (non-condensing) volts provided from MMDS control board MMEVS platform board 8.15 inches (207 ounces (201
M68EML08KXUM/D
INTRODUCTION
CUSTOMER SUPPORT
information about Motorola distributor sales office near call:
AUSTRALIA, Melbourne (61-3)887-0711 Sydney 61(2)906-3855 BRAZIL, Paulo 55(11)815-4200 CANADA, Vancouver (604)606-8502 ONTARIO, Toronto (416)497-8181 ONTARIO, Ottawa (613)226-3491 QUEBEC, Montreal (514)333-3300 CHINA, Beijing 86-10-68437222 DENMARK (45)43488393 FINLAND, Helsinki 358-9-6824-400 FRANCE, Paris 33134 635900 GERMANY, Langenhagen/Hannover 49(511)786880 Munich 92103-0 Nuremberg 96-3190 Sindelfingen 7031 Wiesbaden 973050 HONG KONG, Kwai Fong 852-6106888 852-6668333 INDIA, Bangalore (91-80)5598615 ISRAEL, Herzlia 972-9-590222 ITALY, Milan 39(2)82201 JAPAN, Fukuoka 81-92-725-7583 Gotanda 81-3-5487-8311 Nagoya 81-52-232-3500 Osaka 81-6-305-1802 Sendai 81-22-268-4333 Takamatsu 81-878-37-9972 Tokyo 81-3-3440-3311 KOREA, Pusan 82(51)4635-035 Seoul 82(2)554-5118 MALAYSIA, Penang 60(4)2282514 MEXICO, Mexico City 52(5)282-0230 Guadalajara 52(36)21-8977 PUERTO RICO, Juan (809)282-2300 SINGAPORE (65)4818188 SPAIN, Madrid 34(1)457-8204 SWEDEN, Solna 46(8)734-8800 SWITZERLAND, Geneva 41(22)799 Zurich 41(1)730-4074 TAIWAN, Taipei 886(2)717-7089 THAILAND, Bangkok 66(2)254-4910 UNITED KINGDOM, Aylesbury 441(296)395-252 UNITED STATES, Phoenix, 1-800-441-2447
list Motorola sales offices distributors:
M68EML08KXUM/D
INTRODUCTION
M68EML08KXUM/D
CONFIGURATION OPERATION
CHAPTER CONFIGURATION OPERATION
configuration operation KXEM when installed MMDS MMEVS. other parts system installation configuration, MMDS MMEVS hardware user's manual. Note that reconfigure KXEM already installed MMDS station module. switch station-module power, then follow guidelines this chapter. Similarly, configure KXEM already installed MMEVS platform board, provided that disconnect platform-board power. CAUTION sure switch disconnect power reconfigure installed Reconfiguring jumper headers with power left damage system circuits.
ELECTROSTATIC DISCHARGE PRECAUTION Ordinary amounts static electricity from your clothing work environment damage degrade electronic devices equipment. example, electronic components installed your printed circuit board extremely sensitive electrostatic discharge (ESD). should wear grounding wrist strap whenever handle printed circuit board. This strap provides conductive path safely discharging static electricity ground.
SYSTEM LIMITATIONS
KXEM board uses MC68HC908GP32 emulate KX8. This configuration causes limitations your system. five registers module control register (TBCR) rebuilt externally. register addresses same addresses register MC68HC908GP32. register addresses TBCR address must moved order correctly emulate these functions. (See Table 2-1.)
M68EML08KXUM/D
CONFIGURATION OPERATION
Table 2-1. Register Address Configuration
Register Name ICGCR ICGMR ICGTR ICDVR ICGDSR TBCR Original Register Address (KX8) $0036 $0037 $0038 $0039 $003A $001C Register Address (KXEM) $0040 $0041 $0042 $0043 $0044 $0045
This takes total bytes user addresses. must start your code instead emulating purpose. CONFIG2 register ($1E) write-able according general release specification, host software will return error. register actually being written reconstruction simultaneously, side causes error message. Error message should ignored unless subsequent processes continue fail. that situation, data written CONFIG2 register must verified written again after reset. Register Initial Conditions After Reset Because registers rebuilt externally, register values displayed will always mirror specification stated conditions after reset. Typically, values displayed host software memory values memory addresses, emulated registers. values these addresses `float' until written explicitly user, after which registers corresponding address values identical.
JUMPER HEADER CONFIGURATION
KXEM number jumper headers that configure your specific requirements. Table summary settings these jumper headers. While paragraphs 2.2.1 through 2.2.5 give more detailed information about each jumper header.
M68EML08KXUM/D
CONFIGURATION OPERATION
Table 2-1. Jumper Headers
Header VREFH Bonding option, Position Effect Jumper between pins jumper header jumper between pins jumper header (factory default); emulates with configured PTA4/KBD4 Jumper between pins jumper header jumper between pins jumper header J13; emulates with configured VREFH Jumper between pins selects MMDS control board MMEVS platform board signal source. Jumper between pins (factory default); selects 8.000 oscillator location signal source. Jumper between pins selects user-supplied crystal signal source. (Requires user installation crystal resistors R52, capacitors C14.) Jumper between pins selects XTAL circuit user target system signal source. Jumper between pins selects connector (J28) signal source. VMCU Range select, Jumper between pins (factory default); selects range -3.25 jumper; selects range 5.25 Voltage Reference Select, Jumper between pins (factory default); selects voltage controlled R10. Jumper between pins selects voltage track user's target system.
Clock Source Select,
M68EML08KXUM/D
CONFIGURATION OPERATION
2.2.1
Function Select Header (J8, J13) Jumper headers select options usage target MCU. This configured either standard port (PTA4/KBD4*) reference voltage converters (VREFH). emulate standard port function (PTA4/KBD4*), install jumpers between pins jumper header between pins jumper header (factory default) shown below. emulate reference input, install jumpers between pins jumper header between pins jumper header J13.
NOTE jumpers other configuration.
M68EML08KXUM/D
CONFIGURATION OPERATION
2.2.2
Clock Source Selection Header (J19) Jumper header selects source clock signal. diagram below shows factory configuration: fabricated jumper between pins selecting 8.000 canned oscillator location
MMDS XTAL TARGET
Alternatively, select other sources clock: select clock signal from MMDS control board MMEVS platform board, install fabricated jumper between pins Then your system software select frequency. select user-supplied crystal, install fabricated jumper between pins (Additionally, must supply crystal location resistors locations R52, capacitors locations C14. specifications connections, consult Chapter Schematics.) select target system oscillator circuit, install fabricated jumper between pins select connector (J28), install fabricated jumper between pins NOTE Only jumper should inserted header time. Inserting multiple jumpers might cause damage KXEM.
M68EML08KXUM/D
CONFIGURATION OPERATION
2.2.3
VMCU Voltage Range Selection Header (J25) Jumper header selects ranges voltage controlled R10. diagram below shows factory configuration: fabricated jumper between pins selecting range 3.25
Fabricated Jumper
Alternately, select range 5.25 removing fabricated jumper from J25. 2.2.4 VMCU Control Source Selection Header(J29) Jumper header selects source reference voltage that controls voltage. diagram below shows factory configuration: fabricated jumper between pins selecting variable resistor location reference source. paragraph adjusting reference voltage.
Fabricated Jumper
Alternately, elect user's target system reference voltage. select user target system source, reposition fabricated jumper between pins 2.2.5 Reserved Headers following headers factory personnel programming, testing, development purposes, should left open: J11, J17, J20, J21, J24, J33, J34.
M68EML08KXUM/D
CONFIGURATION OPERATION
ADJUSTING VMCU (J27, R10)
Test point variable resistor adjust VMCU voltage within range VMCU Voltage range jumper header (J25). diagram below shows jumper header.
adjust VMCU: Make sure that target cable connected connectors Connect voltmeter across pins (VMCU) (GND). J27.) Turn resistor adjustment screw until voltmeter reads appropriate level. Disconnect voltmeter. CAUTION Make sure that target system's operating voltage matches VMCU level before connect target cable connector
M68EML08KXUM/D
CONFIGURATION OPERATION
REMAINING SYSTEM INSTALLATION
When have configured jumper headers adjusted voltages, ready complete KXEM installation: install KXEM MMDS station module, remove entire half station-module enclosure. together connectors bottom board) control-board connectors Snap corners onto plastic standoffs. install KXEM MMEVS platform board, together connectors bottom board) platform-board connectors Snap corners onto plastic standoffs. Copy personality files from provided diskette directory that contains your debugging software.
this point, ready make system cable connections restore power. instructions, consult MMDS MMEVS operations manual.
M68EML08KXUM/D
CONNECTOR INFORMATION
CHAPTER CONNECTOR INFORMATION
This chapter consists assignments signal descriptions KXEM Target logic analyzer connectors.
TARGET CONNECTORS (J9)
Your KXEM Target connector: 2-by-20-pin connector. Figure Table give assignments signal descriptions this connectors.
EVDD PTA0/KBD0* PTA1/KBD1* PTA2/KBD2* PTA3/KBD3* PTA4/KBD4*/VREFH EVDD PTB7/(OSC2) PTB6/(OSC1) PTB5/TxD PTB4/RxD PTB3/AD3 PTB2/AD2 PTB1/AD1 PTB0/AD0 IRQ1*
Figure 3-1. TARGET Connector Assignments
M68EML08KXUM/D
CONNECTOR INFORMATION
Table 3-1. TARGET Connector Signal Descriptions
15,17,19,21,23 Mnemonic EVDD PTA0 PTA4 Signal EVDD Operating voltage user target board. PORT (bits 0-4) General-purpose lines controlled software data direction data registers. Each these pins also have alternate function, please chip spec further details. PORT (bits 0-7) General-purpose lines controlled software data direction data registers. Each these pins also have alternate function, please chip spec further details. INTERRUPT REQUEST Active-low input line requesting asynchronous non-maskable interrupt. GROUND Ground signal board.
PTB0 PTB7
IRQ1*
M68EML08KXUM/D
CONNECTOR INFORMATION
LOGIC ANALYZER CONNECTORS (J1, J12)
Your KXEM logic-analyzer connectors: J12, each 20-pin connector. Figure shows assignments these connectors. Tables give signal descriptions
T12CLK COPRSTn PLDDIAG1 LIRn LBOX PLDDIAG2
Figure 3-2. Logic Analyzer Connector J19, Assignments
M68EML08KXUM/D
CONNECTOR INFORMATION
Table 3-2. Logic Analyzer Connector Signal Descriptions
Mnemonic T12CLK LBOX COPRSTn LIRn connection CLOCK Clock signal from internal clock. LAST CYCLE Signal that indicates last cycle current instruction. RESET Active-low signal asserted during resets. connection READ/WRITE Signal indicating whether reading writing. LOAD INSTRUCTION REGISTER Active-low signal indicating that opcode fetch progress. DATA (bits data signal. GROUND Signal
Table 3-3. Logic Analyzer Connector Signal Descriptions
Mnemonic connection ADDRESS (bits 150) latched address. GROUND Signal
M68EML08KXUM/D
CONNECTOR INFORMATION
TARGET CABLE ASSEMBLIES
connect your KXEM target system, need separately purchased target cable assembly, plus appropriate target head target-head/adapter package. Figure shows flex cable plugs into KXEM module, also shows target head connects into target system.
Figure 3-3. Target Cable Assembly
install KXEM MMDS station module, flex cable through slit station-module enclosure.
M68EML08KXUM/D
CONNECTOR INFORMATION
M68EML08KXUM/D
SCHEMATICS
CHAPTER SCHEMATICS
This chapter consists schematics KXEM. schematic pages begin next page this manual.
M68EML08KXUM/D
TABLE CONTENTS
REVISIONS
ORIGINAL RELEA DUCTION RELEASE 4/16
DESCRIPTION
2/24/
COVE REVISED
LEVEL HIER
ARCHY
PORT
LOGIC (PLD)
VOLTAGE REGULATORS
CLOCK GENERATION
BYPASS/DECOUPLING CAPACITORS
SCHEMATICS
GENERAL NOTE
INTERPRET DIAGRAM ACCORDANCE WITH ERICAN NATIONAL STANDARDS INSTITUT SPECIFICATIONS, CURRENT REVISION, WITH EXCEPTIONS LOGIC BLOCK YMBOLOGY. RIES
DEVICE TYPE NUMBER REFERENCE ONLY. NUMBER WITH ANUFACTURER.
SPECIAL SYMBOL USAGE:
THIS DOCUMENT CONTAINS INFORMATION PROPRIETARY MOTOROLA SHALL USED ENGINEERING DESIGN, PROCUREMENT MANUFACTURE WHOLE PART WITHOUT CONSENT MOTOROLA.
DENOTES ACTIVE SIGNAL DENOTES OFFPAG CONNECTOR
MOTOROLA
SEMICOND
DRAWN: DATE:
UCTOR PRODUCTS SECTOR
6501 WILLIAM CANNON DRIVE WEST TIN, 78735
UNLESS OTHERWISE SPECI FIED: RESISTORS OHMS, CAPACITORS +/-20%, VOLTAGES WATT
John Keenan
CHECKED:
4/16/99
Title:
DATE:
POLARIZED CAPACIT
TANTALUM
M68EM908KX6
Size
APPROVED: DATE:
SCHEMATIC
Dwg. Rev:
Last Modified:
63CSE213
Tuesday, 1999
Sheet
M68EML08KXUM/D
LOGIC
LA[15:0] LA[15:0]
PA[4:0] A[7:0] MCUAD[7:0]
PA[4:0] A[7:0] MCUAD[7:0] PA[4:0] A[7:0] MCUAD[7:0]
AB[3:0] AB[3:0]
LA14 LA13 LA12 LA11 LA10 LA15
SCLK_6 SCLK_6 MMDSIRQ* MMDSIRQ*
CHRGPMP SCLK_30 SCLK_30 PTA[4:0] OSC2_LV T_OSC1_LV COP_RST CPU.SCH
PTB45_ON* PTB6_ON* PTB7_ON* SCI_ON* OSC1_ON OSC2_ON 08_IRQ CLRFLGEN T12CLKD BREAK_PLD* KEYBOARD* OSC1 08_RST SCLK_30* LOCKOUT SCLK_6* ECOS PLD_OPT3 T12CLK_LV RW/LAST_LV CLRFLGEN/LIR_LV T_IRQ_LV PTB45_ON* PTB6_ON* PTB7_ON* SCI_ON* OSC1_ON* OSC2_ON* 08_IRQ CLRFLGEN T12CLKD BREAK_PLD* KEYBOARD* OSC1 08_RESET SCLK_30* LOCKOUT SCLK_6* ECOS PLD_OPT3 2VMCU EVDD_LV T_OSC2
VMCU EVDD_DETECT PFD_OUT EMB_OSC ICGS ICLK_H ICLK_L ICGMR[6:0] ICGMR[6:0] ICGMR[6:0] PFD_OUT EMB_OSC ICGS ICLK_H ICLK_L
2VMCU EVDD_LV
OSC2
M68EML08KXUM/D
TKBD4 TKBD3 TKBD2 TKBD1 TKBD0 A1<1> A1<2> A1<3> A1<4> A1<5> A1<6> A1<7> A1<8> B1<1> B1<2> B1<3> B1<4> B1<5> B1<6> B1<7> B1<8> PTA[4:0] DIR1 DIR2 AD[7:0] PTA[4:0] LIR* SCLK SCLK* LIR* SCLK SCLK* VCCA1 VCCA2 VCCB1 VCCB2 A2<1> A2<2> A2<3> A2<4> A2<5> A2<6> A2<7> A2<8> B2<1> B2<2> B2<3> B2<4> B2<5> B2<6> B2<7> B2<8>
MMDSOSC
DIN96
AD[7:0]
INTERNAL* INTERNAL* SWITCH FCT164245TP BREAK* CLRFLGEN/LIR RW/LAST T12CLK PLD_OPT1 PLD_OPT2 T_IRQ* BREAK* SWITCH
GND5 GND6 GND7 GND8 GND1 GND2 GND3 GND4
DIN96
LOCKOUT* LOCKOUT* TKBD[4:0] OSC2_EXT RESET* COP_RESET* RESET* COP_RST* VREGS TKBD[4:0]
T_OSC1
DIN96
BASE_FREQ ICG_CLK FREQ_SEL SOUT_DP COUT_DP RST_DP* DATA_DP CLK_DP
BASE_FREQ ICG_CLK FREQ_SEL SOUT_DP COUT_DP RST_DP* DATA_DP CLK_DP
CHRGPMP MMDSOSC
CHRGPMP MMDSOSC
FROM MMDS
VREGS
LOGIC
CAPS
CAPS.SCH DIN96
Titl
M68EM908KX6 SCHEM
Size Date:
ATIC EML08KX6
Document Number
DIN96
DIN96
63CSE21348W
Friday, June 1999
Sheet
SCHEMATICS
SCHEMATICS
AB[3:0] IDT74FST3125SO PTA[4:0]
IDT74FST3125SO
DIR1
MCUAD[7:0]
MCUAD[7:0]
DIR2
VCCINT1 VCCINT2 VCCINT3 VCCINT4 VCCINT5 VCCINT6 VCCINT7 VCCINT8
VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8 VCCIO9 VCCIO10 VCCIO11 VCCIO12
IDT74FST3125SO
MCUAD0 MCUAD1 MCUAD2 MCUAD3 MCUAD4 MCUAD5 MCUAD6 MCUAD7 LA_MCU0 LA_MCU1 LA_MCU2 LA_MCU3 LA_MCU4 LA_MCU5
A2<1> A2<2> A2<3> A2<4> A2<5> A2<6> A2<7> A2<8>
B2<1> B2<2> B2<3> B2<4> B2<5> B2<6> B2<7> B2<8>
IAD0 IAD1 IAD2 IAD3 IAD4 IAD5 IAD6 IAD7
U10A VCC3 VCC4 VCC1 VCC2
VCCA1 VCCA2
VCCB1 VCCB2
BREAK_PLD* CLK_DP ICG_CLK CLRFLGEN DATA_DP
FCT164245T
FCT162373CTPV
DIS_PA0 DIS_PA1 DIS_PA2 DIS_PA3 DIS_PA4 FREQ_AEL ICGMR[6:0] FREQ_SEL ICGMR[6:0]
U10B
LA[15:0]
LA[15:0]
TKBD0 TKBD1 TKBD2 TKBD3 TKBD4 TKBD0 TKBD1 TKBD2 TKBD3 TKBD4 TKBD[4:0]
ICGMR0 ICGMR1 ICGMR2 ICGMR3 ICGMR4 ICGMR5 ICGMR6
ICGMR0 ICGMR1 ICGMR2 ICGMR3 ICGMR4 ICGMR5 ICGMR6
INTERNAL* KEYBOARD* LIR*
BREAK* CLRFLGEN/LIR EMB_OSC ICGS ICLK_H ICLK_L BREAK CLRFLGEN/LIR EMB_OSC ICGS ICLK_H ICLK_L INTERNAL KEYBOARD LA_LE LBOX LOCKOUT LIR* LOCKOUT PLD_DIAG1 PLD_DIAG2 LIR* PLD_DIAG1 PLD_DIAG2 OSC1_ON OSC1 OSC2_ON OSC2 COP_RST* COP_RST* T12CLK_LA OSC2_EXT PLD_OPT1 PLD_OPT2 LOCKOUT* MMDSIRQ* RESET* RW/LAST SCLK_30 T_IRQ* LOCKOUT MMDSIRQ RESET RW/LAST SCLK_30 T_IRQ
OSC1_ON OSC1 OSC2_ON
IDT74FST3125SO
TESTPOIN SCLK_6 PFD_OUT COUT_DP SOUT_DP
OSC2_ PLD_OPT1 PLD_OPT2
PLD_DIAG1 PLD_DIAG2 PTB6_ON PTB7_ON PTB45_ON
PTB6_ON* PTB7_ON* PTB45_ON*
LA10 LA11 LA12 LA13 LA14 LA15
IDT74FST3125SO
IDT74FST3125SO
TESTPOINT
SCLK_6 PFD_OUT COUT_DP SOUT_DP
IAD0
PU_PA0 PU_PA1 PU_PA2 PU_PA3 PU_PA4
IAD1
SPARE_SW_IN SPARE_SW_OE PLD_OPT3 ECOS
IAD0 IAD1 IAD2 IAD3 IAD4 IAD5 IAD6 IAD7
R22X8 SWITCH T12CLKD 08_IRQ 08_RST
RST_DP SCI_ON SCLK SCLK SCLK_6 SCLK_30
RST_DP* SCI_ON* SCLK* SCLK SCLK_6* SCLK_30*
IDT74FST3125SO
IDT74FST3125SO
IAD2
SWITCH T12CLKD T12CLK_LA 08_IRQ 08_RST
IAD3
PLD_OPT3 ECOS
IDT74FST3125SO
IAD4
CR10
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28 GND29
PA[4:0]
PA[4:0]
AB[3:0]
A[7:0]
A[7:0]
D1<1> D1<2> D1<3> D1<4> D1<5> D1<6> D1<7> D1<8> Q1<1> Q1<2> Q1<3> Q1<4> Q1<5> Q1<6> Q1<7> Q1<8>
A1<1> A1<2> A1<3> A1<4> A1<5> A1<6> A1<7> A1<8>
B1<1> B1<2> B1<3> B1<4> B1<5> B1<6> B1<7> B1<8>
LA15 LA14 LA13 LA12 LA11 LA10
PTA[4:0]
D2<1> D2<2> D2<3> D2<4> D2<5> D2<6> D2<7> D2<8> Q2<1> Q2<2> Q2<3> Q2<4> Q2<5> Q2<6> Q2<7> Q2<8>
BREAK_PLD CLK_DP ICG_CLK CLRFLGEN DATA_DP MCU_DATA DATA_OE
IDT74FST3125SO
GND5 GND6 GND7 GND8 GND1 GND2 GND3 GND4
GND5 GND6 GND7 GND8
GND1 GND2 GND3 GND4
IDT74FST3125SO
IAD[7:0]
LA10 LA11 LA12 LA13 LA14 LA15 LA10 LA11 LA12 LA13 LA14 LA15
R33KX8 VMCU
R10KX8
IAD5
CR12 HEADER5X2
CR11
IAD6
SPARE1 SPARE2 SPARE3 SPARE4 SPARE5
R10KX8
CR14
CR13
IAD7
PROGRAM
MING
CR16 T12CLK BASE_FREQ AD[7:0]
CR15
OPT1 OPT2 OPT3 OPT4
T12CLK BASE_FREQ
AD[7:0]
EPM9480RC208
Titl
M68EM908KX6 SCHEM
Size Date:
ATIC EML08KX6
Document Number
63CSE21348W
Friday, June 1999
Sheet
M68EML08KXUM/D
VMCU 0.1uF U10D
0.1uF 0.1uF SCI_ON* IDT74FST3125SO
CR17
COP_RST
LLSD103A 1uf/16V U10C
T_PT
T_PTB[7:4]
T_PTB4
TARGET HEAD CONNECTOR
08_RESET
08_RESET
ZVNL110G
2VMCU
2VMCU
MCU_IRQ* IDT74FST3125SO
CGMFXC PTE1/RXD PTE0/TXD
T_PTB5 U11C U11D
VDDA/PLL
08_IRQ OSC1_LV A[7:0] A[7:0]
OSC2_LV MCU_RST* RST* PTD0/SS* PTD1/MISO PTD2/MOSI PTD3/SPSCK
IRQ*/VPP OSC2 OSC1
VDDAD/VREFH
IDT74FST3125SO
IDT74FST3125SO
IDT74FST3125SO
IDT74FST3125SO
VSS/PLL VSSAD/REFL
DIR1 DIR2
KBD_LV* ADCIRQ_LV SCLK_6_LV BREAK_LV T12CLK_LV RW/LAST_LV CLRFLGEN/LIR_LV MCUAD[7:0] PTC6 PTC5 PTC4 PTC3 PTC2 PTC1 PTC0 PTA/KBD7 PTA/KBD6 PTA/KBD5 PTA/KBD4 PTA/KBD3 PTA/KBD2 PTA/KBD1 PTA/KBD0 68HC908GP20 MCUAD7 MCUAD6 MCUAD5 MCUAD4 MCUAD3 MCUAD2 MCUAD1 MCUAD0
T12CLKD_LV SCLK_6_LV BREAK_LV T_OSC2_L
PTB1 PTB2 PTB3
HEADER3X2
HEADER20X2
DEFAULT:
M68EML08KXUM/D
ZVNL110G PTD5/T1CH1 PTD4/T1CH0 PTD7/T2CH1 PTD6/T2CH0
08_IRQ
J101
VOLTAGE TRANSLATOR
AB2_LV AB3_LV CS1_LV CLRFLGEN_LV LOCKOUT_LV LRW_LV KBD_LV PTB[3:0] B1<1> B1<2> B1<3> B1<4> B1<5> B1<6> B1<7> B1<8> A1<1> A1<2> A1<3> A1<4> A1<5> A1<6> A1<7> A1<8> PTB/AD7 PTB/AD6 PTB/AD5 PTB/AD4 PTB/AD3 PTB/AD2 PTB/AD1 PTB/AD0
CLRFLGEN LOCKOUT OSC1 KEYBOARD*
PTB7_ON* PTB6_ON* PTB45_ON*
PORT REPLACEMENT
T12CLKD SCLK_6* BREAK_PLD* T_OSC2 PLD_OPT3 SCLK_30* SCLK_30_LV AB0_LV AB1_LV
B2<1> B2<2> B2<3> B2<4> B2<5> B2<6> B2<7> B2<8> A2<1> A2<2> A2<3> A2<4> A2<5> A2<6> A2<7> A2<8>
VCCB1 VCCB2 GND1 GND2 GND3 GND4 VMCU MCUAD[7:0] FCT164245TP GND5 GND6 GND7 GND8 VCCA1 VCCA2
AB0_LV AB1_LV AB2_LV AB3_LV AB4_LV PA0/ATD0 PA1/ATD1 PA2/ATD2 PA3/ATD3 PA4/ATD4 PA5/ATD5 PA6/ATD6 PA7/ATD7
VMCU
VMCU
PA[4:0] PA[4:0]
CLRFLGEN/LIR_LV
MCUAD0 MCUAD1 MCUAD2 MCUAD3 MCUAD4 MCUAD5 MCUAD6 MCUAD7
RW/LAST_LV T12CLK_LV LRW_LV U11A T_PTB6 IDT74FST3125SO LOCKOUT_LV OSC1_LV T12CLKD_LV SCLK_30_LV
PB0/ATD8 PB1/ATD9 PB2/ATD10 PB3/ATD11 PB4/ATD12 PB5/ATD13 PB6/ATD14 PB7/ATD15 XCLK T12_DELAY TEST
OSC1_ON*
T_OSC1_LV
ADCIRQ_LV
CS1_LV
U11B VMCU T_PTB7 IDT74FST3125SO
CLRFLGN IIREQCPU IIREQDMA
PC0/ATD16 PC1/ATD17 PC2/ATD18 PC3/ATD19 PC4/ATD20 PC5/ATD21 PC6/ATD22 PC7/ATD23
PTC0 PTC1 PTC2 PTC3 PTC4 PTC5 PTC6 PTC7
R4K7X8 STOP WAIT ADSIGI
OSC2_ON*
T_OSC2_LV
T_VREF HEADER3X2 FERRITE_BEAD FERRITE_BEAD
PD0/ATD24 PD1/ATD25 PD2/ATD26 VMCU ECOS DEFS ECOS
R4K7X8
BONDING OPTI
DEFAULT:
EVDD_LV
1uf/16V
0.1uF VREFH VDDA VREFH 1uf/16V
PTA[4:0]
PTA[4:0]
VMCU
PTB7 PTB6 PTB5 PTB4
0.1uF
VREFL VSSA
NC10 NC11 NC12 EXTCOB 68HC08AD10PRUFN68 VSSA
T_IRQ_LV T_IRQ_LV
J100 PTC0 PTC2 PTC4 PTC6 FERRITE_BEAD PTC1 PTC3 PTC5 PTC7 VMCU
T_VREF
HDRSH8X2
BONDING OPTI
CONNE CTOR
Titl
M68EM908KX6 SCHEM
Size Date:
ATIC EML08KX6
Document Number
63CSE21348W
Friday, June 1999
Sheet
SCHEMATICS
SCHEMATICS
100K 0.1uF 22K1_1%
DEFAULT:
U19B 15K_1%
POT1K_1
JUMP3
VMCU TRACKING
DEFAULT:
10uf/16V
0.1uF
562_1% HDR1
CHRGPMP
EVDD_LV
0.1uF
0.1uF 47UF/16V
U19A
1K_1%
ALD1502 100PF BASE_FREQ 220PF_1%
MMDSOSC
GND1
OUT1
CILLATOR SELEC
DEFAULT:
EMB_OSC VCO_OUT DEM_OUT COMP_IN
GND2 HEADER5X2 U16A 74AC14 U16B
OUT2
OSC-8MHz
CLOCK SOURCE
SIG_IN VCO_IN
ICLK_L
U12A 3K32_1%
U12C
T_OSC1
74HCU04
74HCU04
ICGS
T_OSC2 CON_BNC
U12B 74AC14 74HC7046
U12D
74HCU04 ICGMR[6:0] 0.1uF
74HCU04
ICGMR[6:0]
510K
ICGMR0 ICGMR1 ICGMR2
32.768KHZ
ICGMR0 ICGMR1 ICGMR2 ICGMR3 ICGMR4 ICGMR5 ICGMR6 ICGMR3 ICGMR4 ICGMR5 ICGMR6
R10KX8
22PF
22PF
M68EML08KXUM/D
ICG_CLK 74HC4059
MAX478CSA
DS1267-10
1K5_1% MAX478CSA
VOLTAGE
CHRGPMP
REGULATORS
REG1117 VOUT SOUT SOUT_DP COUT_DP
0.1uF 10uf/16V RST_DP* CLK_DP DATA_DP
CR18 ZR431F01
10K_1%
FREQ_SEL
RANGE SELEC
2VMCU
0.1uF LM317S 47UF/16V 0.1uF 49K9_1% U14A VMCU MAX478CSA
HEADER3X1 38K3_1%
VMCU
0.1uF
CHRGPMP VOUT 0.1uF
CHRGPMP
0.1uF
10uf/16V
2K_1%
HEADER2X1
DIGI
2.21K_1%
DISCHG THRES TRIG CONT
1K_1%
BASE_FREQ
BASE_FREQ
3.9PF_10%
FIN-A FIN-B PFD-INH
LOG-VDD PFD-OUT LOG-GND
ICLK_H
PFD_OUT
VCO-VDD VCO-OUT
1uf/16V VCO-GND TLC2932I .22UF
VCO-IN BIAS ICO-INH 0.1uF FERRITE_BEAD
FERRITE_BEAD
3K32_1% 0.1uF
Titl
M68EM908KX6 SCHEM
Size Date:
ATIC EML08KX6
Document Number
63CSE21348W
Friday, June 1999
Sheet
M68EML08KXUM/D
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
VMCU
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
HEADER2X1
HEADER2X1 HEADER2X1
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
0.1uF
0.1uF
0.1uF
HEADER2X1
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uf/16V
0.1uF 0.1uF 0.1uF 0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
Titl
M68EM908KX6 SCHEM
Size Date:
ATIC EML08KX6
Document Number
63CSE21348W
Thursday, June 1999
Sheet
SCHEMATICS
SCHEMATICS
M68EML08KXUM/D
INDEX
INDEX
adjusting VMCU voltage: clock source jumper header (J19): components, system: 1-1, configuration operation: connector assignments: logic analyzer (J1, J12): Target (J9): connector signal descriptions: logic analyzer (J1, J12): Target (J9): Customer support: layout: EVS: MMEVS MMEVS, description:1-2 installation, remaining system: introduction: jumper headers: positions: setting: MCUs: emulated: MMDS (HC0508 Motorola Modular Development System): configuration operation: description: 1-1, assignments: logic analyzer connectors (J1, J12): Target connector (J9): positions, jumper headers:
M68EML08KXUM/D
index-1
INDEX
remaining system installation: schematics: setting jumper headers: adjusting VMCU (J27, R10): clock source header (J19): function (J13, J8): VMCU control source (J29): VMCU Voltage range (J25): signal descriptions: logic analyzer connectors (J1, J12): Target connector (J9): specifications: support, customer: system components: MMDS: 1-1, MMEVS: VMCU, adjusting:
index-2
M68EML08KXUM/D

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