LC89978M Delay Line Multi-System Overview LC89978M dela

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LC89978M Delay Line Multi-System Overview LC89978M dela

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Ordering number EN5546A
LC89978M
Delay Line Multi-System
Overview
LC89978M delay line multi television system that incorporates comb filter remove noise from chrominance signal delay line luminance signal.
Package Dimensions
unit:
3111-MFP14S
[LC89978M]
Features
single-voltage power supply Built-in frequency multiplier circuit allows 4fsc operation from (3.58 MHz) input. switched between NTSC/M, PAL/GBI, PAL/M formats setting control values. Includes built-in crosstalk exclusion comb filter chrominance signal that provides high-precision comb characteristics adjustment-free circuit. Peripheral circuits provided chip operation with minimum external components. Positive-phase signal input, positive-phase signal output (luminance signal)
SANYO: MFP14S
Functions
shift registers (for chrominance luminance signals) Timing generator clock driver Delay time selective circuit signal adder Auto-bias circuit Sync clamp circuit (luminance signal) Center bias circuit (chrominance signal) Sample-and-hold circuit frequency multiplier circuit 4fsc clock output circuit High voltage generator Reset Drain (RD).
Specifications
Absolute Maximum Ratings 25°C
Parameter Supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol Topr Tstg Conditions Ratings -0.3 +6.0 +125 Unit
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, JAPAN
73097HA (OT)/N3096HA (OT) 5546-1/7
LC89978M Allowable Operating Ranges 25°C
Parameter Supply voltage Clock input amplitude Clock frequency Chrominance signal input amplitude Luminance signal input amplitude Symbol VCLK FCLK VIN-C VIN-Y Sine wave Conditions Ratings 4.75 5.00 3.579545 5.25 1000 Unit mVp-p mVp-p mVp-p
Assignment
Block Diagram
5546-2/7
LC89978M Control Functions
CONT1 High High CONT2 High High Mode (representative) PAL/GBI PAL/M NTSC/M Chrominance signal delay (number stages) (1833.5) (1.5) (1821.5) (1.5) (911.5) (1.5) Luminance signal delay (number stages) (913) (907) (907)
Switching Voltage Levels
Parameter Switching voltage level: Switching voltage level: high Symbol Conditions Ratings -0.3 +0.5 Unit
Note: *Since control pins have built-in pull-down resistors (about leaving these pins opens effectively sets them level.
Function 4FSC This provides 4fsc clock signal generated frequency multiplier circuit.
Electrical Characteristics 25°C, FCLK 3.579545 MHz, VCLK mVp-p
Parameter Symbol IDD-1 Supply current IDD-2 IDD-3 [Chrominance signal characteristics] (with input Y-IN) VINC-1 VINC-2 output voltage VINC-3 VOUTC-1 VOUTC-2 VOUTC-3 GVC-1 Voltage gain GVC-2 GVC-3 CD-1 Comb depth CD-2 CD-3 LNC-1 Linearity LNC-2 LNC-3 LCK4C-1 Clock leakage (4fsc) LCK4C-2 LCK4C-3 LCK1C-1 Clock leakage (fsc) LCK1C-2 LCK1C-3 mVrms mVrms -0.3 +0.3 Switch states Test conditions Ratings Unit
Continued next page. 5546-3/7
LC89978M
Continued from preceding page.
Parameter Symbol NC-1 Noise NC-2 NC-3 ZOC-1 Output impedance ZOC-2 ZOC-3 TDC-1 delay time TDC-2 TDC-3 VINY-1 VINY-2 output voltage VINY-3 VOUTY-1 VOUTY-2 VOUTY-3 GVY-1 Voltage gain GVY-2 GVY-3 GFY-1 Frequency response GFY-2 GFY-3 DGY-1 Differential gain DGY-2 DGY-3 DPY-1 Differential phase DPY-2 DPY-3 LSY-1 Linearity LSY-2 LSY-3 LCK4Y-1 Clock leakage (4fsc) LCK4Y-2 LCK4Y-3 LCK1Y-1 Clock leakage (fsc) LCK1Y-2 LCK1Y-3 NY-1 Noise NY-2 NY-3 ZOY-1 Output impedance ZOY-2 ZOY-3 TDY-1 Delay time TDY-2 TDY-3 Switch states Test conditions mVrms Ratings Unit
[Luminance signal characteristics] (With signals input C-IN1 C-IN2) 63.81 63.39 63.39 mVrms mVrms mVrms
5546-4/7
LC89978M Test Conditions supply current with input signal output voltage (the center bias voltage) with input signal Measure C-OUT output when 350-mVp-p sine wave input C-IN1 C-IN2. C-OUT output [mVp-p] 20log [dB] [mVp-p] Test frequencies: GVC-1: 4.431395 (PAL/GBI) GVC-2: 3.571628 (PAL/M) GVC-3: 3.571628 (NTSC/M) Measure comb depth from C-OUT output when 350-mVp-p sine wave with frequency input C-IN1 C-IN2, when sine wave frequency input. C-OUT output input [mVp-p] 20log [dB] C-OUT output input [mVp-p] Test Frequencies CD-1: 4.431395 (PAL/GBI) 4.435303 (PAL/GBI) GD-2: 3.571628 (PAL/M) 3.575561 (PAL/M) GD-3: 3.571628 (NTSC/M) 3.563761 (NTSC/M)
Measure C-OUT output when 200-mVp-p sine wave input C-IN1 C-IN2, when 500-mVp-p sine wave input, calculate gain difference follows: 20log output 500-mVp-p input [mVp-p] [mVp-p] Test Frequencies LNC-1 4.431395MHz (PAL/GBI) LNC-2 3.571628MHz (PAL/M) LNC-3 3.571628MHz (NTSC/M)
output 200-mVp-p input [mVp-p] [dB] [mVp-p]
Measure 4fsc (14.3 MHz) (3.58 MHz) components C-OUT output with input signal. Measure noise C-OUT output with input signal. Measure noise with noise meter with 200-kHz high-pass filter 5-MHz low-pass filter. Input 350-mVp-p sine wave C-IN1 C-IN2. C-OUT output when position, C-OUT output when position. [mVp-p] [mVp-p] [dB] [mVp-p] Test Frequencies ZOC-1: 4.431395 (PAL/GBI) ZOC-2: 3.571628 (PAL/M) ZOC-3: 3.571628 (NTSC/M) delay time C-OUT output with respect C-IN1 input. This 1.5-bit delay. output voltage (clamp voltage) with input signal.
5546-5/7
LC89978M Measure Y-OUT output with 200-kHz 400-mVp-p sine wave input Y-IN. Y-OUT output [mVp-p] 20log [dB] [mVp-p] Measure Y-OUT output when 200-kHz 200-mVp-p sine wave input Y-IN, when 3.5-MHz 200-mVp-p sine wave input. Y-OUT output 3.5-MHz input [mVp-p] 20log [dB] Y-OUT output 200-kHz input [mVp-p] Here, adjust Vbias that clamp level +250 Apply 5-step staircase wave figure below) Y-IN, measure differential gain differential phase Y-OUT output using vector scope.
Apply 5-step staircase wave figure below) Y-IN, measure luminance level sync level Y-OUT output. [mV] [mV]
Measure 4fsc (14.3 MHz) (3.58 MHz) components Y-OUT output with input signal. Measure noise Y-OUT output with input signal. Measure noise with noise meter with 200-kHz low-pass filter, 4.2-MHz low-pass filter, 3.58-MHz trap filter. Input 200-kHz, 400-mVp-p sine wave Y-IN1. V-OUT output when position, Y-OUT output when position. [mVp-p] [mVp-p] [mVp-p] Measure delay time Y-OUT output with respect input Y-IN.
5546-6/7
LC89978M Test Circuit
products described contained herein intended surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment like, failure which directly indirectly cause injury, death property loss. Anyone purchasing products described contained herein above-mentioned shall: Accept full responsibility indemnify defend SANYO ELECTRIC CO., LTD., affiliates, subsidiaries distributors their officers employees, jointly severally, against claims litigation damages, cost expenses associated with such use: impose responsibility fault negligence which cited such claim litigation SANYO ELECTRIC CO., LTD., affiliates, subsidiaries distributors their officers employees jointly severally. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties. This catalog provides information July, 1997. Specifications information herein subject change without notice. 5546-7/7

LC89978M Delay Line Multi-System Overview LC89978M dela

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