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IQ80960RP Evaluation Platform User's Guide
June 1996 Order Number: 272913-001
Information this document provided connection with Intel products. license, express implied, estoppel otherwise, intellectual property rights granted this document. Except provided Intel's Terms Conditions Sale such products, Intel assumes liability whatsoever, Intel disclaims express implied warranty, relating sale and/or Intel products including liability warranties relating fitness particular purpose, merchantability, infringement patent, copyright other intellectual property right. Intel products intended medical, life saving, life sustaining applications. Intel retains right make changes specifications product descriptions time, without notice. *Third-party brands names property their respective owners. Copies documents which have ordering number referenced this document, other Intel literature, obtained from: Intel Corporation P.O. 7641 Prospect 60056-764 call 1-800-548-4725
CONTENTS
CHAPTER INTRODUCTION i960 PROCESSOR ADVANTAGES FEATURES. ABOUT THIS MANUAL NOTATIONAL CONVENTIONS TECHNICAL SUPPORT, SCHEMATICS, EQUATIONS. 1.4.1 Intel Customer Support Contacts Additional Information CHAPTER GETTING STARTED PRE-INSTALLATION CONSIDERATIONS 2.1.1 Software Development Tools 2.1.2 MON960 Debug Monitor 2.1.3 Host Communications 2.1.3.1 Terminal Emulation Method 2.1.3.2 Host Debugger Interface Library (HDIL) Method 2.1.3.3 Download Support 2.1.3.4 Source Level Debugger SOFTWARE INSTALLATION. 2.2.1 Installing Software Development Tools HARDWARE INSTALLATION 2.3.1 Installing Modules 2.3.2 Installing IQ-SDK Platform Host System 2.3.3 Verify IQ-SDK Platform Functional CREATING DOWNLOADING EXECUTABLE FILES 2.4.1 MONDB-to-IQ-SDK Platform Communication Support 2.4.2 Download 2.4.3 Terminal Emulation-to-IQ-SDK Platform Communication Support CHAPTER HARDWARE REFERENCE CONNECTORS, SWITCHES, LEDS POWER REQUIREMENTS INTERLEAVED DRAM 3.3.1 DRAM Performance 3.3.2 Upgrading DRAM FLASH ROM. 3.4.1 ROMSWAP ROM-DISABLE Switches 3.4.2 Switch CONSOLE SERIAL PORT SECONDARY EXPANSION CONNECTOR SERIAL EEPROM (I2C).
CONTENTS
3.8.1 3.8.2 3.8.3 3.8.4 3.10
HEADERS Header Emulator Header JTAG Header 3-11 APIC Header 3-12 USER LEDS 3-13 DRAM STATUS REGISTER. 3-14
CHAPTER i960® PROCESSOR OVERVIEW MEMORY LOCAL INTERRUPTS COUNTER/TIMERS. PRIMARY INTERFACE SECONDARY INTERFACE. CHANNELS CHAPTER MON960 IQ-SDK PLATFORM SECONDARY EXPANSION CONNECTOR FIRMWARE COMPONENTS 5.2.1 MON960 Initialization 5.2.2 i960 Core Initialization 5.2.3 Memory Controller Initialization 5.2.4 DRAM Initialization 5.2.5 Primary Interface Initialization 5.2.6 Primary Initialization 5.2.7 PCI-to-PCI Bridge Initialization 5.2.8 Secondary Initialization MON960 KERNEL MON960 EXTENSIONS 5.4.1 Secondary Initialization 5.4.2 BIOS Routines 5.4.2.1 pci_bios_present 5.4.2.2 find_pci_device 5.4.2.3 find_pci_class_code 5.4.2.4 generate_special_cycle 5.4.2.5 read_config_byte 5.4.2.6 read_config_word 5.4.2.7 read_config_dword 5.4.2.8 write_config_byte 5-10 5.4.2.9 write_config_word 5-10 5.4.2.10 write_config_dword 5-11 5.4.2.11 get_irq_routing_options 5-11
CONTENTS
5.4.2.12 set_pci_irq 5.4.3 Additional MON960 Commands 5.4.3.1 print_pci Utility DIAGNOSTICS EXAMPLE CODE. 5.5.1 Board Level Diagnostics 5.5.2 Expansion Module Diagnostics
5-12 5-12 5-12 5-12 5-13 5-13
CHAPTER MODULE INTERFACE INTRODUCTION PHYSICAL ATTRIBUTES. MODULE SIGNAL DEFINITIONS. MODULE CONNECTOR RIGHT-ANGLE MODULE EXTENDER CARD APPENDIX PARTS LIST
CONTENTS
FIGURES Figure 1-1. Figure 1-2. Figure 3-1. Figure 3-2. Figure 3-3. Figure 3-4. Figure 4-1. Figure 4-2. Figure 4-3. Figure 6-1. Figure 6-2. Figure 6-3. TABLES Table 3-1. Table 3-2. Table 3-3. Table 3-4. Table 3-5. Table 3-6. Table 3-7. Table 3-8. Table 3-9. Table 3-10. Table 6-1.
IQ-SDK Platform Functional Block Diagram i960® Processor Block Diagram. IQ-SDK Platform Physical Diagram Module Physical Diagram. Register Bitmap 3-13 DRAM Status Register 3-14 IQ-SDK Platform Memory i960® Interrupt Controller Connections i960® Processor Controller Module Physical Diagram. Module Component Clearance Drawing Module Extender Card Mechanical Drawing.
IQ-SDK Platform Connectors LEDs IQ-SDK Platform Power Requirements. DRAM Performance DRAM Configurations ROMSWAP ROM-DISABLE Switch Positions UART Register Addresses Header Pinout Emulator Header Pinout. 3-10 JTAG Header Pinout 3-12 IQ-SDK Platform APIC Header Pinout 3-13 Module Connector Pinout.
INTRODUCTION
CHAPTER INTRODUCTION
This user's guide describes Software Developer's (IQ-SDK) Intel's i960® processor. i960 processor combines i960 processor core with interfaces, well memory control, channels, interrupt controller interface, Serial Bus. IQ-SDK platform full-length adapter board that installed host system that complies with Local Specification Revision 2.1. devices connected secondary IQ-SDK platform build powerful intelligent subsystems.
Serial EEPROM Host System
Expansion Module(s)
Primary Interface
i960® Processor
Secondary
DRAM
Flash
Local
DRAM
UART
User LEDs
RS-232
Console Port
Figure 1-1. IQ-SDK Platform Functional Block Diagram
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Local Memory
Serial
APIC
Memory Controller
i960® Core Processor
Interface Unit
APIC Interface Unit
Internal Local Arbiter
Local Primary Channels Address Translation Unit Message Unit Channel Secondary Address Translation Unit
PCI-to-PCI Bridge Unit Primary Internal Primary Arbiter
Secondary Internal Secondary Arbiter Secondary Arbiter
Figure 1-2. i960® Processor Block Diagram
INTRODUCTION
i960 PROCESSOR ADVANTAGES FEATURES
i960 processor serves main component high performance, PCI-based intelligent subsystem. IQ-SDK platform allows developer connect devices i960 processor using removable modules, specifications which included this manual. features IQ-SDK platform enumerated below shown Figures 1-2.
i960 processor long-card form factor Primary interface Secondary connected primary interface with PCI-to-PCI bridge channels both buses APIC interface Serial SIMM sockets supporting Mbytes DRAM Serial console port based 16C550 UART Eight user-programmable LEDs Flash sockets Kbyte serial EEPROM (24C04) connected port APIC header Emulator header JTAG header
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
ABOUT THIS MANUAL
brief description contents this manual follows.
Chapter INTRODUCTION Chapter GETTING STARTED Introduces IQ-SDK features. Also defines notational conventions related documentation. Provides step-by-step instructions installing IQ-SDK platform host system downloading executing application program. This chapter also describes Intel's software development tools, MON960 Debug Monitor, software installation, hardware configuration. Describes locations connectors, switches LEDs IQ-SDK platform. Header pinouts register descriptions also provided this chapter. Presents overview capabilities i960 processor includes memory map. Describes number features added MON960 support application development i960 processor. Describes physical electrical characteristics Module interface, which allows devices removable modules connected secondary IQ-SDK platform. Lists each IQ-SDK component quantity, component's reference name appears board, description size rating, manufacturer's part number. order replacement parts contact manufacturer listed Table A-1.
Chapter HARDWARE REFERENCE Chapter i960® PROCESSOR OVERVIEW Chapter MON960 IQ-SDK PLATFORM Chapter MODULE INTERFACE Appendix PARTS LIST
INTRODUCTION
NOTATIONAL CONVENTIONS
following notation conventions consistent with other 80960RP documentation general industry standards. overbar code examples pound symbol appended signal name indicate that signal active. Normally inverted clock signals indicated with overbar above signal name (e.g., RAS). Indicates user entry and/or commands. text, signal names bold lowercase letters (e.g., h_off, h_on). code examples, typewriter font used. Indicates reference related documents; also used show emphasis. Indicates code examples file directories names. non-Intel company product names, trailing asterisk indicates item trademark registered trademark. Such brands names property their respective owners. text, signal names shown uppercase. When several signals share common name, each signal represented signal name followed number; group represented signal name followed variable (n). code examples, signal names shown case required software development tool use. text-instead using subscripted "base" designators (e.g., FF16) leading "0x" (e.g., 0xFF)-hexadecimal numbers represented string digits followed letter zero prefix added numbers that begin with through (e.g., shown 0FFH.) examples actual code, "0x" used. Decimal binary numbers represented their customary notations. (e.g., decimal number 1111 1111 binary number. some cases, letter added binary numbers clarity.)
Bold sans serif Bold serif Italics Typewriter font Asterisks
UPPERCASE
Designations hexadecimal binary numbers
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
TECHNICAL SUPPORT, SCHEMATICS, EQUATIONS
technical assistance with IQ-SDK, contact Intel Technical Support Hotline. information about technical support other geographical areas, contact Intel's North America Technical Support Hotline. also your with modem download IQ-SDK schematics from Intel's Bulletin Board Service (BBS). Up-to-date product technical information available electronically from these sources.
Intel's World-Wide (WWW) Location: IQ-SDK Product Information FaxBACK Service: Canada Europe worldwide Application Bulletin Board Service: 14.4-Kbaud line, worldwide dedicated 2400-baud line, worldwide Europe 916-356-3600 916-356-7209 +44(0)793-432955 800-628-2283 +44(0)793-496646 916-356-3105 http://www.intel.com http://www.intel.com
INTRODUCTION
1.4.1
Intel Customer Support Contacts
Customer Support Canada) Country Australia National Sydney Belgium, Netherlands, Luxembourg Canada Finland France Germany Israel Italy Japan Sweden United States 010-4071-111 800-468-8118 358-0-544-644 33-1-30-57-70-00 49-89-90992-257 972-3-498080 39-02-89200950 Contact local distributor 46-8-7340100 800-548-4725 Literature Contact local distributor 800-628-8686 Technical Support 008-257-307 61-2-975-3300 61-3-810-2141 010-4071-111 Contact local distributor 358-0-544-644 33-1-30-57-72-22 Hardware: 49-89-903-8529 Software: 49-89-903-2025 972-3-548-3232 39-02-89200950 0120-1-80387 46-8-7340100 800-628-6249
1.4.2
Additional Information
order manuals from Intel, contact your local sales representative Intel Literature Sales (1-800-879-4683).
Company/ Order Intel 270791 Intel 272736-001 Intel #272737 Intel #484290 Intel #272905-001 Intel #272812-001 Special Interest Group 1-800-433-5177 Xicor, Inc.
Product 80960RP
Document Name
Intel Solutions960® catalog i960® Microprocessor User's Manual 80960RP Intelligent Microprocessor Data Sheet MON960 Debug Monitor User's Guide APIC Emulation Software i960® Processor Connector Specification Using In-Circuit Emulators Logic Analyzers with i960® Processor Local Specification Revision 24C08 Serial EEPROM Data Sheet
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Contact Cyclone Microsystems additional information about their products:
Phone: Cyclone Microsystems Science Park Haven 06511 FAX: e-mail: WWW:
203-786-5536 203-786-5025 info@cyclone.com http://www.cyclone.com
GETTING STARTED
CHAPTER GETTING STARTED
This chapter contains instructions installing IQ-SDK platform host system, explains download execute application program using MON960 Debug Monitor. PRE-INSTALLATION CONSIDERATIONS
This section provides general overview components required develop execute program IQ-SDK platform. MON960 Debug Monitor User's Guide (order number 484290) fully describes several these components, including MON960 commands, Host Debugger Interface Library (HDIL), MONDB.EXE utility. 2.1.1 Software Development Tools
number software development tools available i960 processor family1. installation instructions presented this chapter were verified using GNU/960 CTOOLS960-Intel's i960® processor software development tools. Advanced C-language compilers i960 processor family available DOS-based systems variety UNIX workstation hosts. These products provide execution profiling instruction scheduling optimizations include assembler, linker, utilities designed embedded processor software development. using other software development tools, read through this example gain general understanding your tools with this board. 2.1.2 MON960 Debug Monitor
IQ-SDK platform equipped with Intel's MON960, on-board software monitor that allows execute debug programs written i960 processors. monitor provides program download, breakpoint, single step, memory display, other useful functions running debugging program. IQ-SDK platform works with source-level debuggers, such DB960 GDB960. source-level debugger must support Host Debugger Interface Library (HDIL) defined MON960.
Refer Intel's Solutions960® catalog complete list i960 processor software development debug tools.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
2.1.3
Host Communications
MON960 allows communicate download programs developed IQ-SDK platform across host system's serial port interface. IQ-SDK platform supports methods serial download: terminal emulation Host Debugger Interface Library (HDIL).
2.1.3.1 Terminal Emulation Method
Terminal emulation software your host system communicate MON960 IQ-SDK platform RS-232 serial port. IQ-SDK platform supports port speeds from 115,200 bps. Serial downloads MON960 require that terminal emulation software support XMODEM protocol. Configure serial port host system 300-115,200 baud, bits, stop bit, parity.
2.1.3.2 Host Debugger Interface Library (HDIL) Method
MONDB utility provided with MON960 allows application code downloaded, executed, debugged IQ-SDK platform. This utility differs from standard terminal emulation programs that allows download executable images through serial port (see Section 2.1.3.3). When used serial download, MONDB operate permissible port speeds (300-115,200 bps). MON960 detect HDIL connection requested only after IQ-SDK platform been powered reset. Once user initiates terminal connection, HDIL requests ignored.
2.1.3.3 Download Support
Application code downloaded IQ-SDK platform host system's bus. MONDB must used downloads, unless debugger available that supports downloads with HDIL interface. command line syntax MONDB documented MON960 User's Guide.
2.1.3.4 Source Level Debugger
source-level debugger, such Intel's DB960 GDB960, establish serial communications with IQ-SDK platform. MON960 Host Debugger Interface Library (HDIL) provides interface between MON960 debugger, debugger used with IQ-SDK platform must support HDIL. HDIL connection requests cannot detected MON960 user already initiated connection using terminal emulator. this case, IQ-SDK platform must reset before HDIL requests processed.
GETTING STARTED
2.2.1
SOFTWARE INSTALLATION Installing Software Development Tools
haven't done already, install your development software described manuals. references this manual CTOOLS960 GNU/960 assume that default directories were selected during installation. this case, substitute appropriate path default path wherever file locations referenced this manual. example program provided MON960 diskette enables your development tools compile sample application program. using software tools other than CTOOLS960 GNU/960, these instructions still generally applicable; however, will need consult your tools documentation equivalent commands. HARDWARE INSTALLATION
Follow these instructions your IQ-SDK platform running. sure items checklist were provided with your IQ-SDK.
WARNING: STATIC CHARGES SEVERELY DAMAGE IQ-SDK PLATFORM. SURE PROPERLY GROUNDED BEFORE REMOVING IQ-SDK PLATFORM FROM ANTI-STATIC BAG.
2.3.1
Installing Modules
Installing Modules IQ-SDK platform simple procedure. module turned that component side faces component side IQ-SDK platform, connectors mated gently pushed together. module includes connectors that accessible from outside host system, slot plate IQ-SDK platform must replaced with cutout slot plate. this case, slide connectors module through cutout slot plate before mating connectors. Nylon standoffs screws used secure module IQ-SDK platform; these cutout slot plates available from Intel request. 2.3.2 Installing IQ-SDK Platform Host System
installing IQ-SDK platform first time, visually inspect board damage that have occurred during shipment. there visible defects, return board replacement. Follow host system manufacturer's instructions installing adapter. IQ-SDK platform full-length adapter requires slot that free from obstructions. Local Specification Revision dimensions full-length adapter.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
2.3.3
Verify IQ-SDK Platform Functional
These instructions assume that have already installed IQ-SDK platform host system described Section 2.3.2.
connect serial port communicating with downloading IQ-SDK
platform, connect RS-232 cable (provided with IQ-SDK) from free serial port host system phone jack-style connector IQ-SDK platform.
Upon power-up, Fail should turn off, indicating that processor passed
self-test, green should light, indicating that processor performing cycles.
Press return terminal connected IQ-SDK platform bring MON960
prompt. MON960 automatically adjusts baud rate match that terminal startup. baud rates other than 9600, necessary press return several times. CREATING DOWNLOADING EXECUTABLE FILES
download code IQ-SDK platform, your compiler must produce COFF-format object file. Companion Diskette included with IQ-SDK contains sample makefile sample linker directive file which used build applications IQ-SDK platform with CTOOLS960 GNU/960 toolset. These files need adapted other compilers. During download, MON960 checks link address stored COFF file, stores file that location IQ-SDK platform. executable file linked invalid address IQ-SDK platform, MON960 will abort download. 2.4.1 MONDB-to-IQ-SDK Platform Communication Support
MONDB command line program that serves host interface download debug features MON960, ROM-based monitor that runs IQ-SDK platform. This example demonstrates MONDB download application IQ-SDK platform. batch file, DWNLD.BAT, provided Companion Diskette with command line options start download IQ-SDK platform. start download, enter DWNLD followed name COFF-format file download. command line parameters DWNLD.BAT changed with text editor. MONDB command line options documented MON960 User's Manual under name EXE960. 2.4.2 Download
download IQ-SDK platform requires MONDB. MON960 User's Manual description MONDB's command line syntax. your application produces output console port IQ-SDK platform, need connect terminal.
GETTING STARTED
2.4.3
Terminal Emulation-to-IQ-SDK Platform Communication Support
terminal emulator communicate with IQ-SDK platform:
Invoke terminal emulation program. establish communication between terminal emulation program MON960, reset
IQ-SDK platform using host's reset switch press <ENTER>. MON960 banner appears, followed command prompt.
command prompt, enter `do' download:
Start your terminal emulation program's XMODEM transfer mode send COFFformat object file. following message appears when transfer complete: Download complete -Start address XXXXXXXX
execute your program, enter `go':
error during download usually indicates that application improperly linked. Checking linker-generated file against IQ-SDK platform address (Figure 4-1) usually reveals this type error. Code data segments should located range assigned Flash RAM. More information MON960 commands mentioned this section found MON960 Debug Monitor User's Guide.
HARDWARE REFERENCE
CHAPTER HARDWARE REFERENCE
location function physical connectors, switches, LEDs described this section. Refer Figure 3-1, physical diagram IQ-SDK platform, locations components discussed this section. CONNECTORS, SWITCHES, LEDS
Figure shows physical locations major components IQ-SDK platform. functions these components listed Table 3-1. complete list components IQ-SDK platform, refer Appendix Parts List.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
1234
Figure 3-1. IQ-SDK Platform Physical Diagram
DRAM SIMM
HARDWARE REFERENCE
Table 3-1. IQ-SDK Platform Connectors LEDs
Reference CR1, SW1-1 SW1-2 JTAG connector Serial port connector Emulator connector Module connector (secondary bus) connector APIC connector Eight user LEDs (small red) Fail (red) (green) Enables programming voltage, VPP, Flash ROMs ROMSWAP: Determines which Flash boot ROM. ROMSWAP boot from ROMSWAP OFF: boot from DISABLE: Disables booting from either Flash device. Allows processor boot from devices connected emulator header. used. Description
SW1-3 SW1-4
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Figure 3-2. Module Physical Diagram
POWER REQUIREMENTS
IQ-SDK platform draws power from bus. power requirements IQ-SDK platform shown Table 3-2. numbers include power required Module mounted IQ-SDK platform.
HARDWARE REFERENCE
Table 3-2. IQ-SDK Platform Power Requirements
Voltage +3.3 NOTE: Typical Current used Maximum Current used
Does include power required Module mounted IQ-SDK platform.
INTERLEAVED DRAM
IQ-SDK platform populated with Mbytes interleaved SIMM DRAM. DRAM accessible from either buses IQ-SDK platform, used implement shared communications areas Modules installed IQ-SDK platform. 3.3.1 DRAM Performance
IQ-SDK platform uses interleaved fast page mode DRAM achieve zero wait state burst MHz. memory runs with wait states first cycle burst wait states during burst. additional recovery cycles required beyond intrinsic i960 core recovery cycle. Table shows performance numbers IQ-SDK platform.
Table 3-3. DRAM Performance
Cycle Type Read Single Read Burst Write Single Write Burst NOTE: Table Clocks 4-1-1-1-1 4-1-1-1-1 Wait States 2-0-0-0 2-0-0-0 Performance Bandwidth Mbytes/sec Mbytes/sec Mbytes/sec Mbytes/sec
Bandwidth sustained bandwidth-not peak.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
3.3.2
Upgrading DRAM
On-board DRAM located SIMM sockets shown Figure 3-1. IQ-SDK platform equipped with Mbytes DRAM. various memory combinations shown Table 3-4. Only Fast Page Mode DRAM modules rated should used IQ-SDK platform. Either devices used, since DRAM parity enabled IQ-SDK platform. Both SIMM sockets must populated IQ-SDK platform function.
Table 3-4. DRAM Configurations
Total Memory Mbytes Mbytes Mbytes Mbytes Mbytes Mbytes SIMM Module Type 256K 256K Mbyte) 512K 512K Mbytes) Mbytes) Mbytes) Mbytes) Mbytes)
FLASH
standard 32-pin PLCC sockets included IQ-SDK platform. primary socket, populated with 27C020 PROM 28F020 Flash containing MON960. secondary socket, contains 28F020 Flash used store user applications. MON960 includes features erase program Flash download code directly into Flash ROM. 3.4.1 ROMSWAP ROM-DISABLE Switches
ROMSWAP switch allows user determine socket from which processor boots. ROM-DISABLE switch disables both Flash ROMs, allowing processor boot from device located emulator connector. Table describes ROMSWAP ROMDISABLE switch positions.
HARDWARE REFERENCE
Table 3-5. ROMSWAP ROM-DISABLE Switch Positions
ROMSWAP ROM-DISABLE Address FEF8 0000H FEFC 0000H available Address FEFC 0000H FEF8 0000H available Boot Device Emulator Connector
3.4.2
Switch
switch (SW1-1) enables/disables boot Flash ROMs, recommended that this switch remains (the default setting from factory). When enabled (switch position), processor able boot from power sequencing correct. CONSOLE SERIAL PORT
console serial port IQ-SDK platform, based 16C550 UART, capable operation from 115,200 bps. port connected phone jack-style plug IQSDK platform. DB25 RJ-45 cable included with IQ-SDK used connect console port standard RS-232 port host system. UART IQ-SDK platform clocked with 1.843 clock, programmed this clock with internal baud rate counters. UART register addresses shown Table 3-6; refer 16C550 device data book detailed description registers device operation. Note that some UART addresses refer different registers depending whether read write being performed.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Table 3-6. UART Register Addresses
Address E000 0000H E000 0004H E000 0008H E000 000CH E000 0010H E000 0014H E000 0018H E000 001CH Read Register Receive Holding Register Unused Interrupt Status Register Unused Unused Line Status Register Modem Status Register Scratchpad Register Write Register Transmit Holding Register Interrupt Enable Register FIFO Control Register Line Control Register Modem Control Register Unused Unused Scratchpad Register
SECONDARY EXPANSION CONNECTOR
i960 processor provides secondary which expansion modules connected (see Section details). Modules connected secondary using connector (see Section 6.4). assignments secondary connector differ slightly from normal assignments, that four clock signals, S-CLK3:0; four request signals, S-REQ3:0#; four grant signals, S-GNT3:0# have been added. These signals replace following signals from standard edge connector, which unnecessary IQSDK platform's expansion connector: PRSNT1#, PRSNT2#, CLK, GNT#, REQ#, IDSEL, reserved pins. pinout expansion connector found Table 6-1. Information expansion modules found Chapter SERIAL EEPROM (I2C)
Kbyte serial EEPROM connected IQ-SDK platform address Intel does define contents this device, available developer. EEPROM read written using bus; consult i960® Microprocessor User's Manual 24C08 Serial EEPROM Data Sheet more information. HEADERS
number headers provided IQ-SDK platform allow adapter connected various external devices. This section details these headers.
HARDWARE REFERENCE
3.8.1
Header
four post header included IQ-SDK platform. pinout this header shown Table 3-7. Kbyte serial EEPROM connected IQ-SDK platform; Section details.
Table 3-7. Header Pinout
SIGNAL fused fused fused fused SIGNAL
3.8.2
Emulator Header
IQ-SDK platform equipped with emulator header. diagram signal traces from i960 processor emulator header, refer Connector Specification Using In-Circuit Emulators Logic Analyzers with i960® Processor. pinout emulator header shown Table 3-8.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Table 3-8. Emulator Header Pinout (Sheet
Connector A001 AE005 Signal Name Width/ HLTD1/ Retry Width/ HLTD1/ Sync P_RST# STEST ICECLK ICEVLD# ICEMSG# ICEBRK# ICEBUS5 ICEBUS3 ICEBUS2 ICEBUS0 XINT7# XINT6# XINT4# MA11 AD31 S_CLK AD10 Connector B019 F003 Signal Name RAS3# Connector C036 C019 Signal Name LRDYRCV#
A002 A003 A004 A005 A006 A007 A008 A009 A010 A011 A012 A013 A014 A015 A016 A017 A018 A019 A020 A021 A022 A023 A024 A025 A026 A027 A028 A029 A030 A031 A032 A033 A034
AF005 AE007 AE003 AB002 AB001 AA002 AA001 Y001 W002 W001 V002 R002 R001 P002 B003 B008 F025 B015 B016 B017 A017 B018 A018 B019 B021 A021 B022
B020 B021 B022 B023 B024 B025 B026 B027 B028 B029 B030 B031 B032 B033 B034 B035 B036 B037 B038 B039 B040 C001 C002 C003
B013 E003 C002 C004 A005 C007 C009 A010 C012 C014 C016 C017 C020 A022 B024 D026 N002 N001 AD006 AD005 AD004 AC002 AB003 Y003 V003 T003 HOLDA NMI# LOCK#/ ONCE# ICESEL# ICELOCK# ICEBUS4 S_INTB#/ XINT1# S_INTA#/ XINT0# LRST# FAIL# BE0# AD17 AD11 AD26 AD24 AD16 RAS0#
C037 C038 C039 C040 D001 D002 D003 D004 D005 D006 D007 D008 D009 D010 D011 D012 D013 D014 D015 D016 D017 D018 D019 D020 D021 D022 D023 D024 D025 D026 D027 D028 D029
C022 C023 C024 M002 L002 L001 K002 K001 J002 J001 H002 H001 G002 F002 F001 E002 E001 D003 D001 A013 B004 B005 B006 B007 A007 A008 B009
W/R# BLAST#/ EBM# DALE1 LEAF0# CE1# DWE1# DWE0# MWE2# MWE1# CAS7# CAS6# CAS4# CAS1# CAS0# RAS2# RAS1#
RDYRCV# ADS# BE3# BE1#
C004 C005 C006 C007 C008 C009 C010 C011 C012
AD15 AD30 AD28
3-10
HARDWARE REFERENCE
Table 3-8. Emulator Header Pinout (Sheet
Connector A035 A036 A037 A038 A039 A040 B001 B002 B003 B004 B005 B006 B007 B008 B009 B010 B011 B012 B013 B014 B015 B016 B017 B018 AC001 AA003 W003 V001 R003 P001 M003 L003 J003 G003 CE0# MWE0# CAS2# HOLD XINT5# S_INTD#/ XINT3# LEAF1# B023 A023 C025 D025 AC003 Y002 AF004 (target) ICEADS# ICEBUS7 ICEBUS1 MSGFRM# ICEBUS6 D/C# RSTMODE# DT/R# Den#/ BIMODE# TRST# Signal Name Connector C013 C014 C015 C016 C017 C018 C019 C020 C021 C022 C023 C024 C025 C026 C027 C028 C029 C030 C031 C032 C033 C034 C035 P003 N003 M001 K003 H003 G001 B014 A014 D002 C003 C005 C006 C008 C010 C011 C013 C015 A016 AD20 AD14 AD29 AD23 AD13 AD12 MA10 DALE0 MWE3# CAS5# CAS3# Signal Name S_INTC#/ XINT2# WAIT# Connector D030 D031 D032 D033 D034 D035 D036 D037 D038 D039 D040 A009 B010 B011 A011 B012 A012 A015 C021 AD19 AD18 AD09 BE2# AD27 AD25 AD22 AD21 Signal Name
3.8.3
JTAG Header
JTAG header allows debugging hardware quickly easily connected some i960 processor's logic signals. JTAG header header. connector (part number 2516-6002UG) required connect this header. pinout JTAG header shown Table 3-9. header connector keyed using connector slot header ensure proper installation.
3-11
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Each signal JTAG header paired with ground connection avoid noise problems associated with long ribbon cables. Signal descriptions found i960® Microprocessor User's Manual.
Table 3-9. JTAG Header Pinout
INPUT/OUTPUT 80960RP
SIGNAL TRST# RSTIN# RSTOUT# PWRVLD
SIGNAL
3.8.4
APIC Header
APIC (Advanced Programmable Interrupt Controller) header included IQ-SDK platform APIC interface allows IQ-SDK platform intelligent interrupt controller host system. APIC header header. pinout APIC header shown Table 3-10, signal definitions APIC header found i960® Microprocessor User's Manual. APIC header software information, refer APIC Emulation Software i960® Processor.
3-12
HARDWARE REFERENCE
Table 3-10. IQ-SDK Platform APIC Header Pinout
SIGNAL SIGNAL PICDATA0 SIGNAL
USER LEDS
IQ-SDK platform bank eight user-programmable LEDs, located upper edge adapter board. These LEDs controlled write-only register used debugging during development. Software control state user LEDs writing Register, located E004 0000H. Each eight bits this register correspond user LEDs. Clearing Register writing turns corresponding while setting writing turns corresponding off. Resetting IQSDK platform results clearing register turning LEDs Register bitmap shown Figure 3-3. user LEDs numbered descending order from left right, with LED7 being left when looking component side adapter.
User User User User User User User User
Figure 3-3. Register Bitmap
3-13
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
3.10 DRAM STATUS REGISTER DRAM status register included IQ-SDK platform that initialization code configure adapter size speed installed DRAM. register read-only register address E004 0000H.
Board 0001
Reserved
DRAM_PD4 DRAM_PD3 60ns 70ns
Figure 3-4. DRAM Status Register
3-14
i960® PROCESSOR OVERVIEW
CHAPTER i960 PROCESSOR OVERVIEW
This chapter describes features operation processor IQ-SDK platform. more detail, refer i960® Microprocessor User's Manual. MEMORY
memory IQ-SDK platform shown Figure 4-1. addresses below 8202 0000H IQ-SDK platform reserved various functions i960 processor, shown memory map. Documentation these areas, well processor memory mapped registers FF00 0000H IBR, found i960® Microprocessor User's Manual.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Processor Memory Mapped Registers ROM, Flash ROM, Processor Registers
F000 0000H FEFC 0000H
F000 0000H
On-board Devices
FEF8 0000H
Reserved
E000 0000H
Reserved
F000 0000H
DRAM Status Register (read only)
B000 0000H
DRAM
Register (write only) UART
E004 0000H E000 0000H
A000 0000H
Reserved
9002 0000H
Outbound Translation Windows
8000 0000H
Outbound Direct Addressing Window
0000 1000H
Peripheral Memory Mapped Registers
0000 0800H
Reserved
0000 0400H
Processor Internal Data
0000 0000H
*Section describes relationship ROMs SWAP switch.
Figure 4-1. IQ-SDK Platform Memory
I960® PROCESSOR OVERVIEW
LOCAL INTERRUPTS
i960 processor built around i960 core, which nine external interrupt lines designated XINT0# through XINT7# NMI#. i960 processor, these interrupt lines directly connected external interrupts, pass through layer internal interrupt routing logic. Figure shows interrupt connections i960 processor. XINT0# through XINT3# i960 core used receive interrupts from secondary bus, these interrupts passed through primary interface, depending setting XINT Select Interrupt Routing Select Register i960 processor. IQ-SDK platform, XINT0# through XINT3# configured receive interrupts from secondary bus. XINT4# XINT5# i960 processor connected interrupt sources external processor. IQ-SDK platform, XINT4# unused XINT5# connected 16C550 UART. XINT6#, XINT7#, NMI# receive interrupts from internal sources well their respective external interrupt lines. Since these interrupts accept signals from multiple sources, status register provided each them allow service routines identify source interrupt. Each possible interrupt sources assigned position status register. interrupt sources these lines shown Figure 4-2. IQ-SDK platform, these interrupts connected external interrupt sources receive interrupts only from internal devices i960 processor. Note that error indications received NMI#, whereas XINT6# XINT7# receive normal device interrupts.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
i960® Processor
80960 Outbound Doorbell 80960 Outbound Doorbell 80960 Outbound Doorbell 80960 Outbound Doorbell XINT0# XINT1# XINT2# S_INTB#/XINT1# XINT3# i960 Core XINT4# XINT5# S_INTC#/XINT2# XINT6# XINT7# NMI#
XINT Select
S_INTA#/XINT0#
S_INTD#/XINT3# XINT4# (N/C) XINT5# (UART)
Channel Interrupt Pending Channel Interrupt Pending Channel Interrupt Pending XINT6# (N/C) Interface Unit Interrupt Pending APIC Interface Unit Interrupt Pending Messaging Unit Interrupt Pending Primary ATU/Start BIST Interrupt Pending XINT7# (N/C) Primary Bridge Interface Error Secondary Bridge Interface Error Primary Error Secondary Error Messaging Unit Error Local Processor Error Channel Error Channel Error Channel Error
NMI# (N/C)
Figure 4-2. i960® Interrupt Controller Connections
I960® PROCESSOR OVERVIEW
COUNTER/TIMERS
i960 processor equipped with on-chip counter/timers which clocked with i960 processor clock signal. i960 processor receives clock from primary interface clock, generated motherboard. Most motherboards generate clock signal, although specification only requires clock frequency between MHz. timers programmed single-shot continuous mode, generate interrupts processor when countdown expires.
PRIMARY INTERFACE primary interface IQ-SDK platform provides i960 processor with connection host system. Only PCI-to-PCI bridge unit i960 processor directly connected primary interface. Devices installed Modules connected bridge unit i960 processor. PCI-to-PCI bridge accepts Type configuration cycles destined devices secondary bus, will forward them Type Type configuration cycles, special cycles. SECONDARY INTERFACE
secondary interface provided i960 processor used connect PCI-based Modules host system's bus. Modules attached IQ-SDK platform with connector (see Section 3.6) contain four separate devices. i960 processor provides PCI-to-PCI bridge functionality installed devices onto host bus, supports transaction forwarding both directions across bridge. devices Modules therefore masters slaves host system's bus. Additional PCIto-PCI bridge devices supported i960 processor secondary interface designed into Modules. addition, i960 processor supports "private" devices secondary bus. Private devices hidden from initialization code host system, configured accessed directly i960 processor. These devices part normal address space, they masters transfer data from other devices system. Unless designated private devices, devices installed secondary interface IQ-SDK platform mapped into system-wide address space configuration software running host system. logical distinction made system level between devices primary devices secondary buses; transaction forwarding handled transparently PCI-to-PCI bridge. Configuration cycles read write accesses from host forwarded through PCI-to-PCI bridge unit i960 processor. Master read write cycles from devices secondary also forwarded host PCIto-PCI bridge unit.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
CHANNELS
i960 processor features three independent channels, which operate primary interface, whereas remaining operates secondary interface. three channels connect i960 processor's local used transfer data from devices memory IQ-SDK platform. Support demand mode, chaining, scatter/gather built into three channels. address entire bytes address space bytes address space i960 local bus.
Primary
Channel
Channel
80960 Local
Bridge Channel
Secondary
Figure 4-3. i960® Processor Controller
MON960 IQ-SDK PLATFORM
CHAPTER MON960 IQ-SDK PLATFORM
number additions have been made MON960 fully support IQ-SDK. This section describes these additions. complete documentation operation MON960, MON960 Debug Monitor User's Guide. SECONDARY EXPANSION CONNECTOR
IQ-SDK platform contains secondary expansion connector give users access secondary 80960RP using either standard custom module. Extensions MON960 perform secondary initialization including establishment secondary address map. Routines compatible with Local Specification Revision allow software IQ-SDK platform search devices secondary read write configuration space those devices. FIRMWARE COMPONENTS
IQ-SDK firmware package consists four main components: initialization firmware, MON960 kernel, MON960 extensions, diagnostics/example code. These four components together referred MON960. 5.2.1 MON960 Initialization
main function MON960 initialization IQ-SDK platform into known, functional state that allows host processor perform initialization allows both MON960 kernel MON960 extensions load execute correctly. MON960 initialization first activity performed after RESET condition. MON960 initialization encompasses major portions 80960RP IQ-SDK platform including i960 core initialization, Memory Controller initialization, DRAM initialization, Primary Address Translation Unit (ATU) initialization, PCI-to-PCI Bridge Unit initialization. IQ-SDK platform designed Configuration Mode 80960RP. Configuration Mode allows i960 core initialize control initialization process before host configures 80960RP processor. utilizing Configuration Mode, user given ability initialize configuration registers values other than default power-up values. Configuration Mode gives user maximum flexibility customize which 80960RP processor IQ-SDK platform appear host configuration software.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
5.2.2
i960 Core Initialization
i960 core begins initialization process reading Initial Memory Image (IMI) from fixed address boot (FEFF FF30H i960 address space). includes Initialization Boot Record (IBR), Process Control Block (PRCB), several system data structures. provides initial configuration information core integrated peripherals, pointers system data structures first instruction executed after processor initialization, checksum words that processor uses selftest routine. addition PRCB, required data structures are: System Procedure Table, Control Table, Interrupt Table, Fault Table, User Stack (application dependent), Supervisor Stack, Interrupt Stack. 5.2.3 Memory Controller Initialization
Since 80960RP Memory Controller integral design operation IQ-SDK platform, operational parameters Bank Bank established immediately after processor core initialization. Memory Bank associated with ROMs IQ-SDK platform. Memory Bank associated with UART, Control Register, DRAM Status Register. Parameters such Bank Base Address, Read Wait States, Write Wait States must established ensure proper operation IQ-SDK platform. mory Controller initialized consistent with IQ-SDK platform memory shown Figure 4-1. 5.2.4 DRAM Initialization
DRAM Initialization includes only establishing operational parameters 80960RP's DRAM controller, also sizing clearing installed DRAM configuration. configure system properly, algorithm used which DRAM controller configured largest supportable bank size, memory test determine actual bank size, DRAM controller reconfigured proper bank size. DRAM controller also initialized enable refresh cycles. Once DRAM controller configured, DRAM cleared preparation language runtime environment. actual DRAM size stored later (e.g. establish size IQ-SDK platform Slave image). DRAM Controller initialized consistent with IQ-SDK platform memory shown Figure 4-1.
MON960 IQ-SDK PLATFORM
5.2.5
Primary Interface Initialization
IQ-SDK platform multi-function device. primary bus, functions (from Configuration Space standpoint) supported.
Function PCI-to-PCI Bridge 80960RP, which optionally provides access
capability between primary secondary bus.
Function Primary which provides access capability between primary
local i960 bus. Since IQ-SDK platform operating Configuration Mode, host will receive Retries when attempts access Configuration Space 80960RP's primary interface until Configuration Cycle Disable Extended Bridge Control Register (EBCR) cleared. this reason, prevent host problems, Primary Initialization occurs earliest possible opportunity after Memory DRAM controller initialization. completion primary interface initialization signalled having i960 core clear Configuration Cycle Disable EBCR. 5.2.6 Primary Initialization
Primary (Bridge) initialization includes initialization i960 core initialization host processor. Local initialization occurs first consists mainly establishing operational parameters access local IQ-SDK platform bus. Primary Inbound Limit Register (PIALR) initialized establish block size memory required Primary ATU. PIALR value based installed DRAM configuration. Primary Inbound Translate Value Register (PIATVR) initialized establish translation value PCI-to-Local accesses. PIATVR value reference base local DRAM. Primary Outbound Memory Window Value Register (POMWVR) initialized establish translation value Local-to-PCI accesses. POMWVR value remains default value allow IQ-SDK platform access start Memory address map, which typically occupied host memory. Likewise, Primary Outbound Window Value Register (POIOWVR) remains default value allow IQ-SDK platform access start address map. Doorbell-related parameters also established allow communication between IQ-SDK platform master using doorbell mechanism. default, Primary Outbound Configuration Cycle parameters established Dual Address Cycle (DAC) support enabled. Configuration Register (ATUCR) initialized establish operational parameters Doorbell Unit interrupts (both primary secondary), enable primary secondary ATUs. host responsible allocating address space (Memory, Memory Mapped I/O, I/O), assigning Base addresses IQ-SDK platform.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
5.2.7
PCI-to-PCI Bridge Initialization
PCI-to-PCI Bridge initialization includes initialization i960 core initialization host processor. Local initialization occurs first consists mainly establishing operational parameters secondary interface PCI-to-PCI bridge. IQ-SDK platform, secondary configured consist private devices (not visible host configuration cycles). support private secondary bus, Secondary IDSEL Select Register (SISR) initialized prevent secondary address bits [20:16] from being asserted during conversion Type configuration cycles primary Type configuration cycles secondary bus. Secondary masters prevented from initiating transactions that will forwarded primary interface. host responsible assigning initializing numbers, allocating address space (Memory, Memory Mapped I/O, I/O), assigning numbers valid interrupt routing values. 5.2.8 Secondary Initialization
Secondary (Bridge) initialization consists mainly establishing operational parameters access between local IQ-SDK platform secondary devices. Secondary Inbound Base Address Register (SIABAR) initialized establish base address IQ-SDK platform local memory from secondary bus. convention, secondary base address access IQ-SDK platform local memory "0". Secondary Inbound Limit Register (SIALR) initialized establish block size memory required secondary ATU. SIALR value based installed DRAM configuration. Secondary Inbound Translate Value Register (SIATVR) initialized establish translation value Secondary PCI-to-Local accesses. SIATVR value reference base local DRAM. Secondary Outbound Memory Window Value Register (SOMWVR) initialized establish translation value Local-to-Secondary accesses. SOMWVR value left default value allow IQ-SDK platform access start Memory address map. Likewise, Secondary Outbound Window Value Register (SOIOWVR) left default value allow IQ-SDK platform access start address map. secondary bus, IQ-SDK platform assumes duties host and, such, required configure devices secondary bus. Secondary Outbound Configuration Cycle parameters established during secondary configuration. Secondary configuration accomplished MON960 Extension routines. Secondary support initialized.
MON960 IQ-SDK PLATFORM
MON960 KERNEL
MON960 Kernel (monitor) provides IQ-SDK user with software platform which application software developed run. monitor provides several features that IQSDK user speed application development. Among available features are:
Communication with terminal terminal emulation package host computer through
serial cable with automatic baud rate detection
Communication with software debugger such DB960 gdb960 (available from Intel)
using software interface called Host Debugger Interface (HDI)
Communication with host computer primary Downloads COFF object files primary serial console port
baud rates 115,200 baud
Downloads COFF object files primary On-board erasure programming Intel 28F020 Flash ROMs Memory display modification capability Breakpoint single-step capability support debugging user code Disassembly i960 instructions MON960 EXTENSIONS
monitor been extended include secondary initialization also BIOS routines which contained Revision BIOS Specification. 5.4.1 Secondary Initialization
MON960 extensions responsible initializing devices secondary IQ-SDK platform. Secondary initialization involves allocating address spaces (Memory, Memory Mapped I/O, I/O), assigning base addresses, assigning values, enabling mastership. Devices containing PCI-to-PCI bridges hierarchical buses supported.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
5.4.2
BIOS Routines
BIOS routines accessible MON960 layer also accessed application level software using i960 system call mechanism System Procedure Table. supported BIOS functions described subsections that follow. pci_bios_present() find_pci_device() find_pci_class_code() generate_special_cycle() read_config_byte() read_config_word() read_config_dword() write_config_byte() write_config_word() write_config_dword() get_irq_routing_options() set_pci_irq() Although calling interface different from that used DOS-based host, these functions preserve, closely possible, parameters return values described Local Specification Revision 2.1. Functions that return multiple values filling fields structure passed calling routine.
5.4.2.1 pci_bios_present
This function allows caller determine whether BIOS interface function present, current interface version level. also provides information about hardware mechanism used accessing configuration space whether hardware supports generation Special Cycles. Calling convention:
pci_bios_present PCI_BIOS_INFO *info
Return values: This function always returns SUCCESSFUL.
MON960 IQ-SDK PLATFORM
5.4.2.2
find_pci_device
This function returns location devices that have specific Device Vendor Given Vendor Device Index, function returns Number, Device Number, Function Number Device/Function whose Vendor Device match input parameters. Calling software find devices having same Vendor Device making successive calls this function starting with index "0", incrementing index until function returns DEVICE_NOT_FOUND. return value BAD_VENDOR_ID indicates that Vendor value passed value "1"s. Calling convention:
find_pci_device device_id, vendor_id, index
Return values: This function returns SUCCESSFUL indicated device located, DEVICE_NOT_FOUND indicated device cannot located, BAD_VENDOR_ID vendor_id value illegal.
5.4.2.3 find_pci_class_code
This function returns location devices that have specific Class Code. Given Class Code Index, function returns Number, Device Number, Function Number Device/Function whose Class Code matches input parameters. Calling software find devices having same Class Code making successive calls this function starting with index "0", incrementing index until function returns DEVICE_NOT_FOUND. Calling convention:
find_pci_class_code class_code, index
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Return values: This function returns SUCCESSFUL indicated DEVICE_NOT_FOUND indicated device cannot located.
5.4.2.4 generate_special_cycle
device
located
This function allows generation Special Cycles. generated special cycle broadcast specific system. Special Cycles supported IQ-SDK platform secondary bus. Calling convention:
generate_special_cycle bus_number, special_cycle_data
Return values: Since Special Cycles supported IQ-SDK platform, this function always returns FUNC_NOT_SUPPORTED.
5.4.2.5 read_config_byte
This function allows caller read individual bytes from configuration space specific device. Calling convention:
read_config_byte bus_number, device_number, function_number, register_number,/* 0,1,2,.,255
UINT 8*data
Return values: This function returns SUCCESSFUL indicated byte read correctly ERROR there problem with parameters.
MON960 IQ-SDK PLATFORM
5.4.2.6
read_config_word
This function allows caller read individual shorts bits) from configuration space specific device. Register Number parameter must multiple (i.e., must "0"). Calling convention:
read_config_word bus_number, device_number, function_number, register_number,/* 0,2,4,.,254
UINT 16*data
Return values: This function returns SUCCESSFUL indicated word read correctly ERROR there problem with parameters.
5.4.2.7 read_config_dword
This function allows caller read individual longs bits) from configuration space specific device. Register Number parameter must multiple four (i.e., bits must "0"). Calling convention:
read_config_dword bus_number, device_number, function_number, register_number,/* 0,4,8,.,252
UINT 32*data
Return values: This function returns SUCCESSFUL indicated long read correctly ERROR there problem with parameters.
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
5.4.2.8
write_config_byte
This function allows caller write individual bytes configuration space specific device. Calling convention:
write_config_byte bus_number, device_number, function_number, register_number,/* 0,1,2,.,255
UINT 8*data
Return values: This function returns SUCCESSFUL indicated byte written correctly ERROR there problem with parameters.
5.4.2.9 write_config_word
This function allows caller write individual shorts bits) configuration space specific device. Register Number parameter must multiple (i.e., must "0"). Calling convention:
write_config_word bus_number, device_number, function_number, register_number,/* 0,2,4,.,254
UINT 16*data
Return values: This function returns SUCCESSFUL indicated word written correctly ERROR there problem with parameters.
5-10
MON960 IQ-SDK PLATFORM
5.4.2.10
write_config_dword
This function allows caller write individual longs bits) configuration space specific device. Register Number parameter must multiple four (i.e., bits must "0"). Calling convention:
write_config_dword bus_number, device_number, function_number, register_number,/* 0,4,8,.,252
UINT 32*data
Return values: This function returns SUCCESSFUL indicated long written correctly ERROR there problem with parameters.
5.4.2.11 get_irq_routing_options
This routine returns interrupt routing options available IQ-SDK platform. values provided each interrupt each device. these values bitmap that shows interrupt which 80960RP XINT (XINT3:0) connected. second value link value that provides specifying which interrupt pins wire-OR'ed together motherboard. Interrupt pins with same link value wired together. Interrupt routing fabric IQ-SDK platform reconfigurable (fixed mapping relationships). Calling convention:
get_irq_routing_options PCI_IRQ_ROUTING_TABLE *table
Return values: This function always returns SUCCESSFUL.
5-11
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
5.4.2.12
set_pci_irq
Interrupt routing fabric IQ-SDK platform reconfigurable (fixed mapping relationships); therefore, this function supported. Calling convention:
set_pci_irq int_pin, irq_num, bus_dev
Return values: This function always returns FUNC_NOT_SUPPORTED. 5.4.3 Additional MON960 Commands
following commands have been added interface MON960 support IQ-SDK platform.
5.4.3.1 print_pci Utility
print_pci command MON960 accessed through MON960 command prompt. This command displays contents configuration space selected adapter secondary interface. more information meaning fields configuration space, refer Local Specification Revision 2.1. syntax this command <bus number> <device number> <function number> DIAGNOSTICS EXAMPLE CODE
IQ-SDK platform diagnostic routines serve twofold purpose: verify proper hardware operation provide example code users need similar functions their applications. Diagnostic routines fall into categories: board level diagnostics expansion module diagnostics.
5-12
MON960 IQ-SDK PLATFORM
5.5.1
Board Level Diagnostics
Board level diagnostics exercise basic areas IQ-SDK platform. Diagnostic routines include DRAM tests, UART tests, tests, internal timer tests, tests, primary tests. Primary tests exercise primary ATU, Doorbell unit, controller. Interrupts from both local sources generated handled. tests require external test suite running verify complete functionality IQSDK platform. 5.5.2 Expansion Module Diagnostics
expansion module Module) diagnostics exercise secondary expansion modules, also demonstrate BIOS routines present MON960 illustrate basic functions expansion modules (e.g., sending receiving Ethernet packets reading writing SCSI disk blocks). Cyclone-built expansion modules supported MON960 diagnostic code.
5-13
MODULE INTERFACE
CHAPTER MODULE INTERFACE
INTRODUCTION
Module Interface allows devices connected secondary interface i960 processor. four devices included Module (the i960 processor allows devices secondary bus), including PCI-to-PCI bridges. standard signals defined 32-bit edge connectors used Modules, with exceptions noted Section 6.3. timing devices Modules same timing other device; Local Specification Revision details.
number Modules available from Intel. This section intended users interested developing their modules. PHYSICAL ATTRIBUTES
physical dimensions Modules shown following figures.
7.000 0.120 HOLES
3.800 3.600
IQXX Rev. 270-03YY CYCLONE MICROSYSTEMS COPYRIGHT 19XX BRD_IQ\IQ_MEC.MAX
0.200 0.850 6.250 6.850
0.400
Note: dimensions inches.
Figure 6-1. Module Physical Diagram
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Panel
Module Component Area
Module
0.235 0.625 0.472
1.000
PCI80960RP (IQ-SDK)
Note: dimensions inches.
Figure 6-2. Module Component Clearance Drawing
MODULE SIGNAL DEFINITIONS
Modules signals defined Local Specification Revision 32-bit devices, with minor changes.
Added four clock signals, S_CLK3:0, Module connector Added four request signals, S_REQ3:0#, Module connector. Added four grant signals, S_GNT3:0# Module connector. Removed following signals from standard edge connector: PRSNT1#, PRSNT2#, CLK, GNT#, REQ#, IDSEL, reserved pins.
replaced pins either this implementation, their function duplicated added pins. added signals correspond directly signals documented Local Specification Revision 2.1; there signal each possible device Module. S_CLK3:0 follow description CLK, S_REQ3:0# follow description REQ#, S_GNT3:0# follow description REQ# Specification. When appropriate signals connected devices Module, each device full complement signals defined specification. IDSEL signals provided. designer Module should connect proper S_AD signal device's IDSEL pin. S_AD31:11 used depending whether device public private device.
MODULE INTERFACE
MODULE CONNECTOR
Modules Champ .050" board-to-board connector with pins. Plug 176380-4 located IQ-SDK platform attaches receptacle 176372-5. This connector combination allows 12mm (0.472") board-to-board spacing. Figure Figure dimensions component clearance details.
Table 6-1. Module Connector Pinout (Sheet
Signal S_TRST# S_TMS S_TDI S_INTA# S_INTC# CLK_C CLK_D S_GNT1# S_RST# S_GNT0# S_REQ2# S_AD30 S_AD28 S_AD26 S_AD24 S_GNT2# S_AD22 Signal S_TCK S_INTB# S_INTD# S_REQ3# S_REQ1# S_GNT3# CLKA CLKB S_REQ0# S_AD31 S_AD29 S_AD27 S_AD25 S_C/BE3# S_AD23
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Table 6-1. Module Connector Pinout (Sheet
Signal S_AD20 S_AD18 S_AD16
Signal S_AD21 S_AD19 S_AD17 S_C/BE2# S_IRDY# S_DEVSEL# S_LOCK# S_PERR# S_SERR# S_C/BE1# S_AD14 S_AD12 S_AD10 S_AD8 S_AD7 S_AD5 S_AD3 S_AD1
S_FRAME# S_TRDY# S_STOP# S_PAR S_AD15
S_AD13 S_AD11 S_AD9 S_C/BE0# S_AD6 S_AD4 S_AD2 S_AD0
NOTE: pins supplied with power reserved future use. decouple pins ground with 0.01 capacitors provide return paths.
MODULE INTERFACE
RIGHT-ANGLE MODULE EXTENDER CARD
users developing their Modules, right-angle module extender card available from Intel (Intel IQEXTENDER). This card allows Modules connected IQ-SDK platform right angle, provides 0.025" posts signals, simplifying connection logic analyzer. extender card shown Figure 6-3.
270-0014-02 REV.
COPYRIGHT 1996
Figure 6-3. Module Extender Card Mechanical Drawing
PARTS LIST
APPENDIX PARTS LIST
This appendix identifies IQ-SDK platform components quantities, component reference name appears board, description size rating, manufacturer's part number. order replacement parts, contact manufacturer listed Table A-1. manufacturer specified those items that obtained from variety manufacturers.
Table A-1. IQ-SDK Platform Bill Materials (Sheet
Item Reference U18, U17, U10, U27, U29, U11, U14, U15, U23, U24, U26, U13, U31, C1-C14, C18, C27-C29, C32C36, C38, C40C43 Description Mfg. Part# 74ALS04 74ABT273 74ABT573 74ABT245 Manufacturer Motorola Texas Instruments Texas Instruments National Semiconductor Texas Instruments Quality Semiconductor National Semiconductor National Semiconductor Intel Texas Instruments Intel
80960RP-33 Processor UART Flash Memory Module 256Kx32-70 EEPROM Capacitor 0.1UF
74ABT541 QS3245SO 1488A 1489A PALCE16V8H-10JC GC80960RP33 16C550 PLCC 28F020-150
24C08
Xicor
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Table A-1. IQ-SDK Platform Bill Materials (Sheet
Item Reference C19-C25, C16, C31, C37, C39, C26, R33-R37, R62R63, R66-R68 R46, R30-R32, R39R42, R47, R51, R53, R57, R58, R61, R19-R20, R23, R64, Description Capacitor 0.01 Mfg. Part# Manufacturer
Capacitor Capacitor Capacitor Resistor Pack Resistor 1/8W, Resistor 1/8W,
Resistor 1/8W,
R14-R15, R17R18, R21-R22, R24-R25, R48, R52, R54-R56, R59-R60, R3-R10, R12-R13 R1-R2, R11, R26-R28, R38, R43-R45 U22,
Resistor 1/8W,
Resistor 1/8W,
Resistor 1/8W, Resistor Pack
120-Pin Connector Plug 72-Pin SIMM Connector Thru Hole Connector w/Shell Connector Jumper Jumper Jumper Switch DHS-4S Apem Mors 822134-3 GM-N-66 103308 Kycon
PARTS LIST
Table A-1. IQ-SDK Platform Bill Materials (Sheet
Item Reference CR1, Description 1.8432 THole Clock Chip Green Small Group Fuse Lamp Socket Socket Mfg. Part# KHOHC1CSE CY7B991-7J Manufacturer Kyocera Cypress
INDEX
INDEX
APIC Header 3-12
Headers APIC header 3-12 emulator header header JTAG header 3-11 Host Communications Host Debugger Interface Library (HDIL)
Connector Module) Console Serial Port Counter/Timers Memory Customer Support Contacts
Header Interleaved DRAM Interrupts Module component clearances connector installing right-angle module extender card signal definitions Module Interface physical attributes IQ-SDK Platform installing host system physical locations components verifying functionality
Debug Monitor (MON960) Diagnostic Routines board level 5-13 expansion module 5-13 Channels DRAM initialization interleaved performance upgrading DRAM Status Register 3-14
EEPROM Emulator Header Extender Card
JTAG Header 3-11 Core Initialization
Features functional blocks IQ-SDK MON960 kernel Firmware
LEDs 3-13 Local Interrupts
Memory Controller Initialization
Index-1
IQ80960RP EVALUATION PLATFORM USER'S GUIDE
Memory (CPU) MON960 extensions initialization kernel print_pci utility 5-12 MON960 Debug Monitor MONDB
Secondary Initialization Secondary Expansion Connector Secondary Initialization Secondary Interface Serial EEPROM (I2C) Serial Port Signal Definitions Module) Software Development Tools installing Source Level Debugger
BIOS Routines find_pci_class_code find_pci_device generate_special_cycle get_irq_routing_options 5-11 pci_bios_present read_config_byte read_config_dword read_config_word set_pci_irq 5-12 write_config_byte 5-10 write_config_dword 5-11 write_config_word 5-10 Download Interface primary secondary PCI-to-PCI Bridge Initialization Power Requirements Primary Initialization Primary Interface Initialization
Technical Support Terminal Emulation communication support using serial download Timers Tools installing software software development
UART Register Addresses
Switch
Right Angle Module Extender Card ROM-DISABLE Switch ROMSWAP Switch
Index-2
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