Order Number: 273303-005 Information this document provided conne
|
|
|
Top Searches for this datasheet
Pentium® Processor Low-Power Module
Order Number: 273303-005
Information this document provided connection with Intel products. license, express implied, estoppel otherwise, intellectual property rights granted this document. Except provided Intel's Terms Conditions Sale such products, Intel assumes liability whatsoever, Intel disclaims express implied warranty, relating sale and/or Intel products including liability warranties relating fitness particular purpose, merchantability, infringement patent, copyright other intellectual property right. Intel products intended medical, life saving, life sustaining applications. Intel make changes specifications product descriptions time, without notice. Designers must rely absence characteristics features instructions marked "reserved" "undefined." Intel reserves these future definition shall have responsibility whatsoever conflicts incompatibilities arising from future changes them. Intel® Pentium® Processor Low-power Module contain design defects errors known errata which cause product deviate from published specifications. Current characterized errata available request. MPEG international standard video compression/decompression promoted ISO. Implementations MPEG CODECs, MPEG enabled platforms require licenses from various entities, including Intel Corporation. Contact your local Intel sales office your distributor obtain latest specifications before placing your product order. Copies documents which have ordering number referenced this document, other Intel literature obtained calling 1-800548-4725 visiting Intel's website http://www.intel.com. Copyright Intel Corporation, 2001. Portions this manual Copyright 1999 General Software, Inc. rights reserved. *Other names brands claimed property others.
Pentium® Processor Low-Power Module
Contents
Contents
About this Manual
Content Overview. Text Conventions Technical Support 1.3.1 Electronic Support Systems 1.3.1.1 Online Documents 1.3.1.2 Intel Product Forums 1.3.2 Telephone Technical Support Product Literature. Related Documents.10 Overview 2.1.1 Processor Assembly Features 2.1.2 Baseboard Features Included Hardware Software Features.13 2.3.1 General Software, Inc.13 2.3.2 Software Systems, Ltd.14 Before Begin Setting Evaluation Board.16 Configuring BIOS Block Diagram Mechanical Design System Operation.20 3.3.1 Pentium Processor Power 3.3.2 82443BX Host Bridge/Controller 3.3.2.1 Memory Organization 3.3.2.2 System Interface.21 3.3.2.3 Accelerated Graphics Port (AGP) Interface.21 3.3.2.4 System Clocking 3.3.3 3.3.4 82371EB ISA/IDE Xcelerator (PIIX4E) 3.3.5 DRAM.22 3.3.6 Power 3.3.7 Power Management 3.3.8 Boot ROM.23 3.3.9 RTC/NVRAM 3.3.10 Legacy 3.3.11 Support 3.3.12 Floppy Disk Support 3.3.13 Keyboard/Mouse 3.3.14 3.3.15 RS232 Ports 3.3.16 IEEE 1284 Parallel Port.23
Getting Started
Theory Operation
Pentium® Processor Low-Power Module
Contents
3.3.17 3.3.18 3.3.19 3.3.20 3.3.21 3.3.22 3.3.23
Connectors Connectors Connector Post Code Debugger. Clock Generation. Interrupt Memory
Hardware Reference
Processor Assembly 4.1.1 Thermal Management 4.1.2 Debugger Port Post Code Debugger. Expansion Slots. Device Mapping Connector Pinouts. 4.5.1 Power Connector. 4.5.2 Debugger Connector 4.5.3 Stacked 4.5.4 Mouse Keyboard Connectors. 4.5.5 Parallel Port. 4.5.6 Serial Ports. 4.5.7 Connector. 4.5.8 Floppy Drive Connector. 4.5.9 Slot Connector. 4.5.10 Slot Connector. Connector Jumpers 4.7.1 Enable Spread Spectrum Clocking (J14) 4.7.2 Clock Frequency Selection (J15) 4.7.3 On/Off (J20). 4.7.4 Flash BIOS Select (J21). 4.7.5 Flash BIOS Boot Block Control (J22) 4.7.6 SMI# Source Control (J23). 4.7.7 CMOS Clear (J24). 4.7.8 Push Button Switches In-Circuit BIOS Update. BIOS Pre-Boot Features Power-On Self-Test (POST) Setup Screen System 5.3.1 Basic CMOS Configuration Screen 5.3.2 Configuring Drive Assignments 5.3.2.1 Configuring Floppy Drive Types 5.3.3 Configuring Drive Types. Configuring Boot Actions. Custom Configuration Setup Screen. Shadow Configuration Setup Screen Standard Diagnostics Routines Setup Screen
BIOS Quick Reference
Pentium® Processor Low-Power Module
Contents
5.10
5.11
Start System BIOS Debugger Setup Screen.48 Start RS232 Manufacturing Link Setup Screen.49 Manufacturing Mode.49 5.10.1 Console Redirection 5.10.2 CE-Ready Windows Loader 5.10.3 Integrated BIOS Debugger Embedded BIOS POST Codes
Index
Code Listing Bill Materials Schematics
Figures
Evaluation Board Jumpers Connectors.16 Evaluation Board Block Diagram.19 BIOS POST Pre-Boot Environment.42 Embedded BIOS Setup Screen Menu.43 Embedded BIOS Basic Setup Screen.44 Embedded BIOS Custom Setup Screen Embedded BIOS Shadow Setup Screen.47 Standard Diagnostic Routines Setup Screen Start RS232 Manufacturing Link Setup Screen.49 CE-Ready Boot Feature Integrated BIOS Debugger Running Over Remote Terminal
Pentium® Processor Low-Power Module
Contents
Tables
4-10 4-11 4-12 4-13 Related Resources. Interrupts Memory Device Mapping Primary Power Connector (J11). Connector Assignment Interposer Card). Connector Pinout (J2). Keyboard Mouse Connector Pinouts Baseboard). DB25 Parallel Port Connector Pinout (J3). Serial Port Connector Pinout (J4) IDE1 (JP3) IDE2 (JP4) Connector Diskette Drive Header Connector (JP1). Slots (J7, Slots (J5, Slot (J13) Default Jumper Settings. IDE0-IDE3 Drive Assignments Baseboard Bill Materials Interposer Board Bill Materials Components Bill Materials
Revision History
Revision Date 8/01 7/01 3/01 5/00 1/00 Description Changed part numbers components BOM. Added power management section, BIOS information. Updated schematics, BOM. Removed references specific video adapter card. First publication this document.
Pentium® Processor Low-Power Module
About this Manual
This manual tells evaluation board processor assembly included your Pentium® Processor Low-Power Module Development Kit.
Content Overview
Chapter "About This Manual" This chapter contains description conventions used this manual. last sections tell obtain literature contact customer support. Chapter "Getting Started" Provides complete instructions configure evaluation board processor assembly setting jumpers, connecting peripherals, providing power, configuring BIOS. Chapter "Theory Operation" This chapter provides information system design. Chapter "Hardware Reference" This chapter provides description jumper settings functions, pinout information each connector. Chapter "BIOS Quick Reference" This chapter describes configure BIOS your system configuration. summary BIOS menu options provided. Appendix "PLD Code Listing" This appendix includes sample code listing Post Code Debugger. Appendix "Bill Materials" This appendix contains bill materials development platform. Appendix "Schematics" This appendix contains schematics selected connectors subsystems development platform.
Text Conventions
following notations used throughout this manual. Variables Instructions pound symbol appended signal name indicates that signal active low. Variables shown italics. Variables must replaced with correct values. Instruction mnemonics shown uppercase. When programming, instructions case-sensitive. either upper- lowercase.
Pentium® Processor Low-Power Module
About this Manual
Numbers
Hexadecimal numbers represented string hexadecimal digits followed character zero prefix added numbers that begin with through (For example, shown 0FFH.) Decimal binary numbers represented their customary notations. (That decimal number 1111 1111 binary number. some cases, letter added clarity.) following abbreviations used represent units measure: Gbyte Kbyte Mbyte amps, amperes gigabytes kilobytes kilo-ohms milliamps, milliamperes megabytes megahertz milliseconds milliwatts nanoseconds picofarads watts volts microamps, microamperes microfarads microseconds microwatts
Units Measure
Signal Names
Signal names shown uppercase. When several signals share common name, individual signal represented signal name followed number, while group represented signal name followed variable (n). example, lower chip-select signals named CS0#, CS1#, CS2#, they collectively called CSn#. pound symbol appended signal name identifies active-low signal. Port pins represented port abbreviation, period, number (e.g., P1.0).
1.3.1
Technical Support
Electronic Support Systems
Intel's site World Wide (http://www.intel.com/) provides up-to-date technical information product support. This information available hours day, days week, providing technical information whenever need
1.3.1.1
Online Documents
Product documentation provided online variety web-friendly formats
Pentium® Processor Low-Power Module
About this Manual
1.3.1.2
Intel Product Forums
Intel provides technical expertise through electronic messaging. With publicly accessible forums, have benefits email technical support, with added benefit option viewing previous messages written other participants, providing suggestions tips that help others. Each Intel's technical support forums based single product product family. Questions replies limited topic particular forum. Intel also provides several non-technical support related forums. Complete information Intel forums available
1.3.2
Telephone Technical Support
U.S. Canada, technical support representatives available answer your questions between a.m. p.m. PST. also your questions (Please include your voice telephone number indicate whether prefer response phone fax). Outside U.S. Canada, please contact your local distributor. 1-800-628-8686 916-356-7599 916-356-6100 (fax) U.S. Canada U.S. Canada U.S. Canada
Product Literature
order product literature from following Intel literature centers. 1-800-548-4725 708-296-9333 44(0)1793-431155 44(0)1793-421333 44(0)1793-421777 81(0)120-47-88-32 U.S. Canada U.S. (from overseas) Europe (U.K.) Germany France Japan (fax only)
Pentium® Processor Low-Power Module
About this Manual
Related Documents
Table 1-1. Related Resources
Document Title Intel Pentium Processor Low-Power Module datasheet Mobile Pentium Processor Specification Update Pentium Processor Low-Power Module 500/100 Design Guide Pentium® Processor Low-Power Module 500/100 SDRAM DIMM Routing Guidelines Pentium® Processor Low-Power Module Thermal Design Guide Family Processors Hardware Developer's Manual Intel Architecture Software Developer's Manual, Volume Basic Architecture Intel Architecture Software Developer's Manual, Volume Instruction Reference Intel Architecture Software Developer's Manual, Volume System Programming Guide Intel® 440BX AGPset: 82443BX Host Bridge/Controller datasheet Intel 440BX AGPset: 82443BX Host Bridge/Controller Specification Update Intel® 440BX AGPset: 82443BX Host Bridge/Controller Timing Specification 82371AB (PIIX4) 82371EB (PIIX4E) PCI-TO-ISA/IDE Xcelerator datasheet Intel 82371EB (PIIX4E) Specification Update Intel 82371AB Xcelerator (PIIX4) Timing Specification
Order Number 273299 245306 273319 273317 273300 244001 243190 243191 243192 290633 290639 273218 290562 290635 273135
Pentium® Processor Low-Power Module
Getting Started
This chapter identifies evaluation board kit's components, features specifications, tells board operation.
Overview
evaluation board consists baseboard processor assembly.
processor assembly consists Intel® 500-MHz Pentium® Processor Low-Power
Module (100-MHz processor side bus) with 82443BX Host Bridge/Controller, port level shifters.
baseboard contains 82371EB Xcelerator (PIIX4E) other system
board components peripheral connectors. Warning: processor assembly attached baseboard factory. remove processor assembly from baseboard. Intel will support processor assembly baseboard portion assembly (including processor module) removed customer.
2.1.1
Processor Assembly Features
processor assembly features summarized below. Pentium Processor Low-Power Module:
Full support Pentium® processor Power with 256-Kbyte, 8-way
set-associative, on-die cache 100-MHz system frequencies
Intel 440BX AGPset: 82443BX Host Bridge/Controller memory interface:
64-bit memory data interface SDRAM support 16-Mbit, 64-Mbit, 128-Mbit DRAM technologies
Five masters
Specification Compliant
Accelerated Graphics Port (AGP) Support:
Interface Specification Revision compliant Single AGP, 66-MHz, 3.3-V device support
Integrated System Power Management support Integrated voltage regulator solution Thermal Transfer Plate (TTP) heat dissipation
Pentium® Processor Low-Power Module
Getting Started
Interposer Card:
Level shifters convert connector interface debugger
Caution: connector used this board requires supply voltage. Previous development board connectors required supply voltage. Intel® Pentium® Processor Low-Power Module datasheet (order number 273299) more information module.
2.1.2
Baseboard Features
evaluation baseboard these features:
Flash system BIOS
General Software system BIOS In-circuit BIOS upgradability
SDRAM DIMM connectors 32-Mbyte, 100-MHz SDRAM DIMM included
Mbyte x64, with latency
User-accessible on-board connectors include:
serial RS-232 ports; COM1, COM2 EPP/ECP parallel port PS/2 keyboard PS/2 mouse (6-pin mini-DIN connectors) ports connectors floppy connector Three expansion slots expansion slots. There shared slots, usable. connector Standard power supply connector
Miscellaneous features include:
On-board post-code debugger (Port Reset push button Stand-off feet table-top operation
Pentium® Processor Low-Power Module
Getting Started
Included Hardware
Evaluation board (baseboard processor assembly combination) 4.3-Gbyte hard disk drive pre-loaded with Real Time Operating System* 32-Mbyte SDRAM DIMM Attached fansink video graphics adapter Intel® PRO/100+ Adapter 82559-based Ethernet network adapter Mounting hardware cable hard disk drive
Software Features
software chosen facilitate development real-time applications based components used evaluation board. software tools included your described this section. Refer letter included your date information other vendors offering development software this kit. Note: Software provided free vendor only licensed evaluation purposes. Customers using tools that work with Microsoft products must have licensed those products. targets created those tools should also have appropriate licenses. Software included subject change.
2.3.1
General Software, Inc.
Embedded BIOS full-featured BIOS x86-based handheld, embedded, volume consumer electronics applications. This product offers winning combination superior configurability superior embedded features. Intel selected Embedded BIOS standard pre-installed pre-boot firmware this design. following features Embedded BIOS have been enabled this Intel development kit:
SDRAM detection, configuration initialization cache configuration initialization Intel 440BX Northbridge configuration initialization PIIX4E Southbridge configuration initialization POST codes displayed POST code monitor serial ports, EPP/ECP parallel port device enumeration configuration configuration initialization FDC37B787 Super programming
Pentium® Processor Low-Power Module
Getting Started
Integrated debugger Burn-in diagnostics Console redirection Manufacturing mode
2.3.2
Software Systems, Ltd.
Real Time Operating System Intel Architecture comes pre-loaded hard disk supplied your kit.
Small memory footprint operating system with microGUI microGUI full featured graphical user interface (GUI) windowing system Photon Application Builder Development provides basic utilities build program Intel Flash Watcom C/C++ Development Suite full featured development suite Includes compiler, assembler debugger with full support microGUI function library
Makes development optimized executables fast easy Fully integrated with provided video network drivers
software, following password username:
Password: Username: Inteldemo
Caution: shutdown button exit from QNX. Improper shutdown result loss file system.
Pentium® Processor Low-Power Module
Getting Started
Before Begin
Before configure your evaluation board, want gather some additional hardware software. Monitor standard multi-resolution monitor. setup instructions this chapter assume that using standard monitor. must ATX-type power supply. need keyboard with PS/2 style connector adapter. Optional. mouse with PS/2 style connector adapter. connect four drives floppy drives evaluation board. devices (master slave) attached each connector. will need provide cables these drives. have these storage devices attached board same time. Video Adapter video adapter supplied with your kit, other video adapter. evaluation board supports AGP, video cards. install correct drivers video adapters other than provided. Intel 100+ Adapter network adapter card supplied with your kit. Drivers this adapter also provided. evaluation board supports standard compatible network cards. will have install correct drivers adapters included your kit. Other Devices Adapters evaluation board behaves much like standard desktop computer motherboard. Most compatible peripherals attached configured work with evaluation board. example, want install sound card graphics card.
Power Supply Keyboard Mouse Additional Drives
Network Adapter
Pentium® Processor Low-Power Module
Getting Started
Setting Evaluation Board
Once have gathered hardware described last section, follow steps below your evaluation board. This manual assumes familiar with basic concepts involved with installing configuring hardware personal computer system. Refer Figure locations connectors, jumpers, etc. Make sure static-free environment before removing components from their anti-static packaging. evaluation board susceptible electro-static discharge damage; such damage cause product failure unpredictable operation. Inspect contents your kit. Check damage that have occurred during shipment. Contact your sales representative items missing damaged.
Caution:
Connecting wrong cable reversing cable damage evaluation board damage device being connected. Since board protective chassis, caution when connecting cables this product.
Figure 2-1. Evaluation Board Jumpers Connectors
Connectors Connectors
Connector
Keyboard (Top) COM1 (Top)/ /Mouse COM2 Parallel Port
LEDs
Power Connector
Floppy Connector Debugger Port
Post Code Debugger
Thermal Transfer Plates
IDE2 IDE1
Battery
Connectors
SDRAM DIMM Slots
Special Mounting Holes
Pentium® Processor Low-Power Module
Getting Started
Make sure board's jumpers following default locations.
installed installed (Note that default this jumper previous boards Installed.) Jumper pins Jumper pins Jumper pins Jumper pins Jumper pins
Mount hardware: Table-top operation: evaluation board shipped with standoff "feet" table-top environment. These feet installed evaluation board raise table surface.Your contains bags mounting hardware. contains eight standoff feet, eight mounting screws, eight washers. Another three shorter feet that must attached slightly differently.
mount eight standard feet, insert washer onto screw, then push screw through board. From below board, thread longer feet onto screw. mount three special feet, screw three shorter feet onto existing screws. Figure location three special holes.
Warning: remove nuts from these three holes! This will detach processor assembly from baseboard, Intel will longer support evaluation board. evaluation board form factor.
Connect desired storage devices evaluation board: evaluation board supports Primary Secondary interfaces that each host devices (master/slave). When using multiple devices, such hard disk CD-ROM drive, make sure hard disk drive jumper master position CDROM jumper slave position. When using single device with evaluation board, make sure that jumper correctly single master operation. jumper settings other configurations, consult drive's documentation. Note: evaluation board BIOS only supports hard drives Gbytes less. Installing hard disk drive included your kit:
Connect hard drive's cable connector connector evaluation board. sure align cable connector with JP4. Connect other cable hard disk drive.
Caution: Make sure tracer ribbon cable aligned with both hard disk connector header. Connecting cable backwards damage evaluation board hard disk.
Connect hard drive power supply.
Note: hard disk already formatted pre-loaded with Real-Time Operating System Intel Architecture.
Pentium® Processor Low-Power Module
Getting Started
have make changes system BIOS enable this hard disk. Chapter "BIOS Quick Reference" more information.
Floppy drive: floppy disk drive connected evaluation board most direct method loading software.
Insert floppy drive cable into sure orient correctly). Connect other ribbon cable floppy drive. Connect power cable floppy drive. must make changes system BIOS enable this floppy disk. Chapter "BIOS Quick Reference" more information.
Make sure SDRAM DIMM installed socket labeled J18. Connect PS/2 mouse keyboard (see Figure connector locations). Note: baseboard) stacked PS/2 connector. bottom connector mouse keyboard. Make sure fansink's power connector plugged into Jumper J12. Install Intel 100+ Adapter into slot. BIOS provided Plug Play BIOS; network adapter function properly when installed slots. Connect network cable port card. Install video adapter into available slots. Connect monitor cable port card. Connect power supply:
You'll need standard power supply. Make sure power supply unplugged turned off), then connect power supply cable power header (J11).
Note: Some power supplies have on/off switch. this case remove jumper before plugging power connector. controls internal power supply on/off switch. When ready apply power, insert jumper pins 2-3. want wire this header toggle switch convenience. Turn power monitor evaluation board.When power should power-indicator LEDs light (located next power connector upper right corner board; Figure 2-1). Check that fansink thermal transfer plate processor module operating.
Configuring BIOS
General Software's BIOS software pre-loaded evaluation board. will have make changes BIOS enable hard disks, floppy disks other supported features Setup program modify BIOS settings control special features system. Setup options configured through menu-driven user interface. Chapter "BIOS Quick Reference" contains description BIOS options. BIOS updates periodically posted Intel's Developers' site http://developer.intel.com/.
Pentium® Processor Low-Power Module
Theory Operation
Block Diagram
Figure 3-1. Evaluation Board Block Diagram
Voltage Regulator
Pentium® Processor Power with On-Die Cache
Processor Assembly
(includes interposer card)
Processor Side 82443BX Host Bridge/Controller Level Shifters Clock Generator
Memory Connector
Connectors
APIC
PIIX4E
Master
Boot Flash PS/2 Mouse
Connectors
IEEE 1284 Parallel Port FDC37B787 SuperI/O* COM1 COM2
PS/2 Keyboard Floppy Drive
Pentium® Processor Low-Power Module
72-Bit DIMM
72-Bit DIMM
Theory Operation
Mechanical Design
extra protection development environment users want install evaluation board chassis. evaluation board connectors, three connectors, connector DRAM DIMM connectors. connectors rear board defined window. Note: evaluation board does conform form factor. exceeds length requirement slightly. board into standard chassis.
System Operation
500-MHz Pentium® Processor Power Module evaluation board full-featured system board processor assembly that includes 500-MHz Pentium processor Low-Power Module with Kbytes on-die cache Intel 82443BX Host Bridge/Controller. evaluation board contains Intel 82371EB PCI-to-ISA/IDE Xcelerator (PIIX4E) other system peripherals.
3.3.1
Pentium Processor Power
processor module processor assembly contains Pentium Processor Low-Power running 500/100 with 32-Kbyte code data caches.
3.3.2
82443BX Host Bridge/Controller
Intel® 440BX AGPset supports Pentium processor architecture. interfaces with Pentium Processor Power system MHz. Along with Host-to-PCI bridge interface, 82443BX Host Bridge/Controller been optimized with SDRAM memory controller data path unit. 82443BX also features Accelerated Graphics Port (AGP) interface. 82443BX component includes following functions capabilities:
3.3.2.1
64-bit Power GTL+ based system data interface 32-bit system address support 64/72-bit main memory interface with optimized support SDRAM 32-bit interface with integrated arbiter Supports single 66-MHz, 3.3-V device Extensive data buffering between interfaces high throughput concurrent operations
Memory Organization
memory interface 82443BX Host Bridge/Controller available module connector. This allows following:
memory control signals, sufficient support three SO-DIMM sockets
banks SDRAM
signal each bank
Pentium® Processor Low-Power Module
Theory Operation
Memory features supported 82443BX Host Bridge/Controller this product are:
Eight banks memory 256-Mbit memory devices Second memory address lines (MAA[13:0]) Extended Data (EDO) DRAM 66-MHz memory
clocking architecture supports SDRAM. tight timing requirements 100-MHz SDRAM clocks, clocking mode SDRAM memory configurations allows host SDRAM clocks generated from same clocking architecture system electronics.
3.3.2.2
System Interface
82443BX supports maximum Gbytes memory address space from processor perspective. largest address size bits. 82443BX provides control signals address paths transfers between processor bus, bus, Accelerated Graphics Port main memory. 82443BX supports 4-deep-in-order queue, which provides support pipelining four outstanding transaction requests system bus. Pentium Processor Power supports second-level cache size Kbytes with ECC. cachecontrol logic provided processor. system bus-to-PCI transfers, addresses either translated directly forwarded bus, depending address space being accessed. When access configuration space, processor cycle mapped configuration space cycle. When access memory space, processor address passed without modification bus. Certain memory address ranges dedicated graphics memory address space. When this space portion mapped main DRAM, address translated address remapping mechanism request forwarded DRAM subsystem. portion graphics aperture mapped AGP, corresponding system cycles accessing that range forwarded without translation. address defines other system cycles that forwarded AGP.
3.3.2.3
Accelerated Graphics Port (AGP) Interface
82443BX supports interface. interface maximum theoretical transfer rate ~500 Mbytes/s.
3.3.2.4
System Clocking
82443BX operates system interface MHz, transfer rate 66/133 MHz. 82443BX clocking scheme uses external clock synthesizer that produces reference clocks system interfaces. 82443BX generates DRAM clock signals. Please refer CK97 Clock Synthesizer/Driver Specification (order number 243867).
Pentium® Processor Low-Power Module
Theory Operation
3.3.3
evaluation board populated with debugger port. port provides path debugger tools like emulators, in-target probes, logic analyzers gain access Pentium Processor Power registers signals without affecting high speed operation. This allows system operate full speed with debugger attached.
Caution:
connector used this board requires supply voltage. Previous development board connectors required supply voltage.
3.3.4
82371EB ISA/IDE Xcelerator (PIIX4E)
82443BX designed support PIIX4E bridge. PIIX4E highly-integrated multifunctional component that supports following functions capabilities:
Revision compliant PCI-to-ISA bridge with support 33-MHz operations ACPI Power Management support Enhanced controller, interrupt controller timer functions Integrated controller with Ultra DMA/33 support host interface with support ports System Management (SMB) with support DIMM Serial Presence Detect
3.3.5
DRAM
evaluation board provides 168-pin DIMM module connectors. DRAM interface 64-bit data path that supports 100-MHz Synchronous DRAM (SDRAM). DRAM interface supports Mbytes Mbytes 4-Mbit, 16-Mbit 64-Mbit DRAM SRAM technology (both symmetrical asymmetrical). Parity supported. 32-Mbyte SDRAM DIMM included kit.
3.3.6
Power
evaluation board uses industry standard ATX-style power supply with 20-pin connector. 230-watt (minimum) supply recommended. Note that power connector keyed prevent incorrect insertion. "ATX Power Connector" page 4-29 detailed description power connector. Make sure that power supply plugged into wall when connecting disconnecting from evaluation board.
3.3.7
Power Management
Power management supported tested feature Pentium® Processor Low-Power Module Development Kit.
Pentium® Processor Low-Power Module
Theory Operation
3.3.8
Boot
system boot installed 2-Mbit 28F002BC flash device. system in-circuit reprogramming BIOS, flash device also socketed. This device addressable extension bus.
3.3.9
RTC/NVRAM
NVRAM contained within 82371EB PIIX4E device. CMOS NVRAM backup provided lithium-ion battery.
3.3.10
Legacy
Support legacy functions provided Intel 82371EB PIIX4E FDC37B787 SuperI/O* device.
3.3.11
Support
evaluation board supports both primary secondary interface 40-pin connectors. connector labeled IDE1 primary interface. IDE2 secondary interface.
3.3.12
Floppy Disk Support
Floppy disk support provided FDC37B787 SuperI/O device. 34-pin floppy connector provided evaluation board.
3.3.13
Keyboard/Mouse
Keyboard mouse support provided FDC37B787 SuperI/O device. keyboard mouse connectors (J1) PS/2 style, 6-pin stacked miniature connectors. connector keyboard bottom connector mouse.
3.3.14
support provided through PIIX4E used through connector
3.3.15
RS232 Ports
serial ports provided FDC37B787 SuperI/O device. 9-pin RS232 connectors provided single stacked connector (J4).
3.3.16
IEEE 1284 Parallel Port
25-pin IEEE 1284 parallel port connector controlled FDC37B787 SuperI/O device provided (J3).
Pentium® Processor Low-Power Module
Theory Operation
3.3.17
Connectors
Three industry standard 32-bit, connectors provided evaluation board. connectors designed handle either only card universal card. 3.3-V cards supported.
3.3.18
Connectors
16-bit connectors provided evaluation board.
3.3.19
Connector
support provided through 82443BX Host Bridge/Controller. industry standard connector (J13) provided evaluation board.
3.3.20
Post Code Debugger
evaluation board on-board Post Code Debugger. Data from program that does write 0080H latched displayed LEDs (U12 U13). During BIOS startup, codes posted these LEDs indicate what BIOS doing. Application programs post their data these LEDs writing address 0080H.
3.3.21
Clock Generation
There devices baseboard which generate distribute clocks used entire system. These CY2280 clock synthesizer CY2318NZ clock buffer. CY2280 generates clocks Pentium Processor Power Module, Host Bridge/Controller, cache, PCI, bus. processor clock runs MHz. clocks MHz. This device capable spread spectrum clocking. spread spectrum clocking enabled, 0.5% down spread will introduced processor clocks. CY2318NZ clock buffer used buffer clock signals sent SDRAM DIMMS. SDRAM interface operates MHz.
Pentium® Processor Low-Power Module
Theory Operation
3.3.22
Interrupt
Table 3-1. Interrupts
System Resources Channel Check Reserved, Interval Timer Reserved, Keyboard buffer full Reserved, Cascade interrupt from slave Serial Port Serial Port Parallel Port (PNP0 option) Floppy Parallel Port Real Time Clock IRQ2 Redirect Reserved. supported. Reserved. supported. Onboard Mouse Port present, else user available Reserved, Math coprocessor Primary present, else user available Reserved. supported.
3.3.23
Memory
Table 3-2. Memory
Address Range (Hex) 100000-8000000 E0000-FFFFF C8000-DFFFF A0000-C7FFF 9FC00-9FFFF 80000-9FBFF 00000-7FFFF 127K 512K Size 127.25M 128K Extended Memory BIOS Available expansion BIOS area (Flash disk memory window) Off-board video memory BIOS Extended BIOS Data (movable QEMM, 386MAX) Extended conventional Conventional Description
Pentium® Processor Low-Power Module
Hardware Reference
This section provides reference information system design. Included this section connector pinout information, jumper settings, other system design information.
Processor Assembly
processor assembly contains host devices such Pentium® Processor Low-Power Module 82443BX Host Bridge/Controller. processor assembly also includes interposer card with level shifters bus, voltage regulator debugger connector. assembly connects baseboard 400-pin connector.
Warning:
processor assembly attached baseboard factory. remove processor assembly from baseboard. Intel will support processor assembly baseboard portion assembly (including processor module) removed customer.
4.1.1
Thermal Management
objective thermal management ensure that temperature each component maintained within specified functional limits. functional temperature limit range within which electrical circuits expected meet their specified performance requirements. Operation outside functional limit degrade system performance cause reliability problems. processor module contains thermal transfer plates (TTP). thermal solution should pre-installed over processor.
Important: evaluation contains sink attached above Pentium Processor Power. This thermal solution been tested open environment room temperature sufficient evaluation purposes only. designer provide adequate thermal management customer-derived designs. Pentium Processor Low-Power Module with Intel 443BX Host Bridge/Controller, voltage regulator dissipates thermal design power (TDP) when case temperature approximately maintained. processor core dissipates majority thermal power. thermal solution must designed ensure that maximum case temperature never exceeded. specified maximum ambient temperature module operation However, thermal solutions targeted operation ambient temperature range 50-70° Refer Pentium® Processor Low-Power Module Thermal Design Guide (order number 273300) more details.
Pentium® Processor Low-Power Module
Hardware Reference
4.1.2
Debugger Port
evaluation platform populated with debugger port. port provides path debugger tools like emulators, in-target probes, logic analyzers gain access processor's registers signals without affecting high speed operation. This allows system operate full speed with debugger attached.
Caution:
connector used this board requires supply voltage. Previous development board connectors required supply voltage.
Post Code Debugger
evaluation board on-board Post Code Debugger. Data from code that does write latched displays (U12/U13). During BIOS startup, code posted these LEDs indicate what BIOS doing. Application code post data these LEDs doing write address 80H. 22V10 code used implement this function included Appendix "PLD Code Listing."
Expansion Slots
evaluation platform three expansion slots slots.
Device Mapping
evaluation platform devices mapped device numbers connecting address line IDSEL signal each device. Table shows mapping devices.
Table 4-1. Device Mapping
Device PIIX4E Slot (J7) Slot (J8) Slot (J9) Address Line AD18 AD28 AD29 AD30 Device Number
Pentium® Processor Low-Power Module
Hardware Reference
4.5.1
Connector Pinouts
Power Connector
Table shows signals assigned style power connector.
Table 4-2. Primary Power Connector (J11)
Name PWRGD 5VSB PS_ON# Ground Ground Ground Power Good Standby Ground Soft-off control Ground Ground Ground Volts Function
Pentium® Processor Low-Power Module
Hardware Reference
4.5.2
Caution:
Debugger Connector
pinout supply voltage different from those specified previous development boards.
Table 4-3. Connector Assignment Interposer Card)
Signal RESET# DBRESET# POWERON TRST# DBINST# BSEN# PREQ0# Signal PRDY0# PREQ1# PRDY1# PREQ2# PRDY2# PREQ3# PRDY3# BCLK
4.5.3
Stacked
bottom connector. top.
Table 4-4. Connector Pinout (J2)
VCC0 D0D0+ GND0 Signals VCC1 D1D1+ GND1 Signals
Pentium® Processor Low-Power Module
Hardware Reference
4.5.4
Mouse Keyboard Connectors
keyboard port top. mouse port bottom.
Table 4-5. Keyboard Mouse Connector Pinouts Baseboard)
Data Connect Ground (fused) Clock Connect Signal Name
4.5.5
Parallel Port
Table 4-6. DB25 Parallel Port Connector Pinout (J3)
Signal Name Strobe# Data Data Data Data Data Data Data Data ACK# Busy Paper SLCT Signal Name Auto Feed# Fault# INIT# SLCT Ground Ground Ground Ground Ground Ground Ground Ground
Pentium® Processor Low-Power Module
Hardware Reference
4.5.6
Serial Ports
COM1 connector. COM2 bottom connector.
Table 4-7. Serial Port Connector Pinout (J4)
Serial (SIN) Serial (SOUT) Signal Name
4.5.7
Connector
Table 4-8. IDE1 (JP3) IDE2 (JP4) Connector
Signal Name Reset Host Data Host Data Host Data Host Data Host Data Host Data Host Data Host Data Ground DRQ3 Write# Read# IOCHRDY DACK3# IRQ14 Addr Addr Chip Select Activity Signal Name Ground Host Data Host Data Host Data Host Data Host Data Host Data Host Data Host Data Ground Ground Ground BALE Ground IOCS16# Ground Addr Chip Select Ground
Pentium® Processor Low-Power Module
Hardware Reference
4.5.8
Floppy Drive Connector
Table 4-9. Diskette Drive Header Connector (JP1)
Signal Name Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Signal Name FDHDIN Reserved FDEDIN Index Motor Enable Drive Select Drive Select Motor Enable DIR# STEP# Write Data# Write Gate# Track Write Protect# Read Data# Side Select# Diskette Change#
Pentium® Processor Low-Power Module
Hardware Reference
4.5.9
Slot Connector
Table 4-10. Slots (J7,
Signal Name PIRQ1# PIRQ3# Connect Connect Connect RST# GNT1# Reserved AD30 3.3V AD28 AD26 AD24 IDSEL 3.3V AD22 AD20 AD18 Signal Name Connect PIRQ2# PIRQ0 PRSNT1B# Connect PRSNT2B# Connect PCLK3 REQ# AD31 AD29 AD27 AD25 CBE3# AD23 AD21 AD19 Signal Name AD16 3.3V FRAME# TRDY# STOP# SDONE SBO# AD15 3.3V AD13 AD11 CBEO# REQ64# Signal Name AD17 CBE2# IRDY# DEVSEL# LOCK# PERR# SERR# 3.3V CBE1# AD14 AD12 AD10 ACK64#
Pentium® Processor Low-Power Module
Hardware Reference
4.5.10
Slot Connector
Table 4-11. Slots (J5,
Signal Name IOCHK# IOCHRDY SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 Signal Name RSTSLOT IRQB9 Signal Name SBHE# LA23 LA22 LA21 LA20 LA19 LA18 LA17 MEMR# MEMW# SD10 SD11 SD12 SD13 SD14 SD15 Signal Name DACK2# BALE MEMCS16# IOCS16# IRQB10 IRQB11 IRQB11 IRQ15 IRQ14 DACK0 DREQ0 DACK5 DREQ5 DACK6# DREQ6 DACK7# DREQ7# MASTER#
DREQ2
-12V
ZEROWS# +12V SMEMW# SMEMR# IOW# IOR# DACK3# DREQ3 DACK1# DREQ1 REFRESH# SYSCLK IRQA7 IRQA6 IRQA5 IRQA4 IRQA3
Pentium® Processor Low-Power Module
Hardware Reference
Connector
Table 4-12. Slot (J13)
Pin# OVRCNT# 5.0V 5.0V USB+ INTB# REQ# VCC3.3 RBF# Reserved SBA0 VCC3.3 SBA2 SB_STB SBA4 SBA6 AD31 AD29 VCC3.3 AD27 AD25 AD_STB1 AD23 TYPEDET# Reserved USBGND INTA# RST# GNT# VCC3.3 Reserved PIPE# Reserved SBA1 VCC3.3 SBA3 Reserved SBA5 SBA7 AD30 AD28 VCC3.3 AD26 AD24 Reserved C/BE3# Pin# Vddq3.3 AD21 AD19 AD17 C/BE2# Vddq3.3 IRDY# 3.3Vaux Reserved VCC3.3 DEVSEL# Vddq3.3 PERR# SERR# C/BE1# Vddq3.3 AD14 AD12 AD10 Vddq3.3 AD_STB0 Vddq3.3 Reserved Vddq3.3 AD22 AD20 AD18 AD16 Vddq3.3 FRAME# Reserved Reserved VCC3.3 TRDY# STOP# PME# AD15 Vddq3.3 AD13 AD11 C/BE0# Vddq3.3 Reserved Vddq3.3 Reserved
NOTES: Reserved pins only future A.G.P interface specification. IDSEL# A.G.P. connector. A.G.P. graphics components should connect AD16 signal volt IDSEL# function internal component. volt cards leave TYPEDET signal open. volt cards this signal hard ground.
Pentium® Processor Low-Power Module
Hardware Reference
Jumpers
Table 4-13 shows default jumper settings.
Table 4-13. Default Jumper Settings
Jumper Function Enable Spread Spectrum Clocking Settings Enable Spread Spectrum Disable Spread Spectrum (Default) Reserved Clock Frequency Selection Selects processor side operation (Default) Reserved On/Off (Default) Jumper Installed Flash BIOS Select Flash BIOS boot block control SMI# Source CMOS Clear (Default) (Default) SMI# controlled IOAPIC SMI# controlled PIIX4E (Default) Normal Operation (Default) Clear CMOS
4.7.1
Enable Spread Spectrum Clocking (J14)
This jumper used enable disable spread spectrum clocking clock synthesizer. When this jumper 0.5% down spread will introduced into clocks. default setting jumper installed, which disables spread spectrum clocking.
4.7.2
Clock Frequency Selection (J15)
This jumper controls frequency processor clock. When jumper out, processor side operates MHz. This default setting. (When jumper processor side operates operation. This setting recommended supported.)
4.7.3
On/Off (J20)
This jumper used control state power supply. When this jumper removed, power supply will turned off. Placing jumper position will turn power supply position reserved should used.
Pentium® Processor Low-Power Module
Hardware Reference
4.7.4
Flash BIOS Select (J21)
This jumper controls voltage presented flash BIOS pin. position supplies default normal operation. This position inhibits programming erasing flash BIOS. position supplies should only used directed utility that used reprogram BIOS.
4.7.5
Flash BIOS Boot Block Control (J22)
This jumper controls Boot Block protection Flash BIOS. When this jumper position, boot block locked cannot programmed. This default position this jumper. position unlocks boot block that erased reprogrammed. This position should only used under direction utility that designed reprogram boot block flash device.
4.7.6
SMI# Source Control (J23)
This jumper selects source SMI# interrupt processor. Only position which selects PIIX4E supported. position reserved future use.
4.7.7
CMOS Clear (J24)
This jumper controls power battery backed-up CMOS RAM. This used store information about system configuration that required BIOS. position normal operation. position allows cleared. clear perform following steps: Remove power from evaluation platform removing jumper Move 2-3. Disconnect power supply (J11). Install position. Reconnect power supply (J11). Reboot system enter BIOS setup screen configure system.
4.7.8
Push Button Switches
There push button switches evaluation board labeled
non-functional reserved future use. reset button. Press force hardware reset system.
Pentium® Processor Low-Power Module
Hardware Reference
In-Circuit BIOS Update
BIOS upgraded in-circuit. BIOS updates periodically posted Intel's Developers' site http://www.intel.com/design/. reprogram BIOS: Jumper Jumper position evaluation platform. Download BIOS upgrade file from Intel's Developers' site. Extract BIOS upgrade file onto bootable floppy. Insert floppy disk into floppy drive attached evaluation board. Reboot evaluation board that boots from floppy. Follow on-screen instructions. When BIOS update program finished, power down board reset jumpers position.
Pentium® Processor Low-Power Module
BIOS Quick Reference
Pentium® Processor Low-Power Module evaluation board licensed with single copy Embedded BIOS Embedded software from General Software, Inc.1 This software provided demonstration purposes only must licensed directly from General Software, Inc. integration with designs. General Software reached (800) 850-5755, http://www.gensw.com, email sales@gensw.com. BIOS updates periodically posted Intel Developers' site http://developer.intel.com/.
BIOS Pre-Boot Features
system's pre-boot environment managed with adaptation Embedded BIOS from General Software. pre-boot environment includes POST, Setup Screen System, Manufacturing Mode, Console Redirection, Windows Loader Ready), Integrated BIOS Debugger. REFLASH tool also available update BIOS image with builds Embedded BIOS that obtained from General Software. Before using system, please read following properly configure CMOS settings, learn embedded features pre-boot firmware, Embedded BIOS. last sections this chapter provide BIOS POST Codes Beep codes.
Power-On Self-Test (POST)
When system powered Embedded BIOS tests initializes hardware programs chipset other peripheral components. During this time, POST progress codes written system BIOS port 80H, allowing user monitor progress with special monitor. "Embedded BIOS POST Codes" page 5-52 lists POST codes their meanings. POST displays progress system video device, which video screen card used, terminal emulation program's screen output redirected over serial port.
General SoftwareTM, Logo, Embedded BIOSTM, BIOStartTM, CE-ReadyTM, Embedded DOSare trademarks registered trademarks General Software, Inc.
Pentium® Processor Low-Power Module
BIOS Quick Reference
Figure 5-1. BIOS POST Pre-Boot Environment
When system powered first time, you'll need configure system through Setup Screen System (described later) before peripherals, such disk drives, recognized BIOS. information written battery-backed CMOS board's Real Time Clock. Should board's battery fail, this information will lost board will need reconfigured. OEMs modify look-and-feel POST with Embedded BIOS adaptation kit. While demonstration BIOS looks feels like desktop possible eliminate messages, sounds, delays, make POST effectively invisible.
Pentium® Processor Low-Power Module
BIOS Quick Reference
Setup Screen System
system configured from within Setup Screen System, which series menus that invoked from POST pressing <DEL> main keyboard being used, pressing console being redirected terminal program.
Figure 5-2. Embedded BIOS Setup Screen Menu
Once Setup Screen System (Figure 5-2), user navigate with DOWN arrow keys from main console, keys from remote terminal program accomplish same thing. ENTER used advance next field, keys cycle through values, such those Basic Setup Screen, Diagnostics Setup Screen.
5.3.1
Basic CMOS Configuration Screen
system's drive types, boot activities, POST optimizations configured from Basic Setup Screen (Figure 5-3). order disk drives with your system, must select appropriate assignments drive types left-hand column. Then, using true floppy drives (not memory disks that emulate these drives), need configure drive types themselves Floppy Drive Types Drive Geometry sections. Finally, you'll need configure boot sequence middle screen. Once these selections have been made, your system ready use.
Pentium® Processor Low-Power Module
BIOS Quick Reference
Figure 5-3. Embedded BIOS Basic Setup Screen
5.3.2
Configuring Drive Assignments
Embedded BIOS allows user different file system each drive letter. BIOS allows file systems each floppy (Floppy0 Floppy1), each drive (Ide0, Ide1, Ide2, Ide3), memory disks when configured (Flash0, ROM0, RAM0, etc.) Figure shows first floppy drive (Floppy0) assigned drive system, then first drive (Ide0) assigned drive system. switch floppy disks around hard disks around, just Floppy0 Floppy1 hard disks Ide0 Ide1
Caution:
Take care skip drive when making floppy disk assignments, well drive when making hard disk assignments. first floppy should first hard drive should Also, assign same file system more than drive letter. Thus, Floppy0 should used both BIOS permits this allow embedded devices alias drives, desktop operating systems able maintain cache coherency with such mapping place. special field this section entitled "Boot Method: (Windows CE/Boot Sector)" used configure Ready feature BIOS. normal booting (DOS, Windows etc.), select "Boot Sector" "Unused".
5.3.2.1
Configuring Floppy Drive Types
true floppy drive file systems (and their emulators, such ROM, RAM, flash disks) mapped drive letters, then floppy drives themselves must configured this section. Floppy0 refers first floppy disk drive drive ribbon cable (normally drive A:), Floppy1 refers second drive (drive B:).
Pentium® Processor Low-Power Module
BIOS Quick Reference
5.3.3
Configuring Drive Types
true disk file systems (and their emulators, such ROM, RAM, flash disks) mapped drive letters, then drives themselves must configured this section. following table shows drive assignments Ide0-Ide3:
Table 5-1. IDE0-IDE3 Drive Assignments
File System Name Ide0 Ide1 Ide2 Ide3 Controller Primary (1f0h) Primary (1f0h) Secondary (170h) Secondary (170h) Master/Slave Master Slave Master Slave
primary master drive your system (the typical case), just configure Ide0 this section, Ide0 drive Configuring Drive Assignments section. Drive Types section lets select type each four drives: None, User, Physical, LBA, CHS. User This type allows user select maximum cylinders, heads, sectors track associated with drive. This method rarely used since common use. This type instructs BIOS query drive's geometry from controller each POST. translation drive's geometry performed, this type limited drives Mbytes less. Commonly, this used with embedded Cards. This type instructs BIOS query drive's geometry from controller each POST, then translate geometry according industrystandard convention. This supports 16-Gbyte drives. this method drives. This type instructs BIOS query drive's geometry from controller each POST, then translate geometry according Phoenix convention. Using this type drive previously formatted with Physical geometry might show data being missing corrupted.
Physical
Pentium® Processor Low-Power Module
BIOS Quick Reference
Configuring Boot Actions
Embedded BIOS supports different user-defined steps boot sequence. When entire system been initialized, POST executes these steps order until operating system successfully loads. addition, other pre-boot features before, after, between operating system load attempts. following actions used: Drive Boot operating system from specified drive. "Loader" "BootRecord" "Unused", then standard boot record will invoked, causing DOS, Windows95/98, Windows other industry-standard operating systems load. "Boot Method" "Windows CE", then boot drive's boot record will used, instead BIOS will attempt load execute Windows Kernel file, NK.BIN, from root directory each boot device. Launch Integrated BIOS Debugger. return boot process from debugger environment, type debugger prompt press ENTER. Initiate Manufacturing Mode, allowing system configured remotely RS232 connect host computer. Execute ROM-resident copy Windows available. This feature applicable unless properly configured BIOS adaptation. Execute ROM-resident copy DOS, available. This feature applicable unless copy DOS, such Embedded DOS-ROM, been stored BIOS boot ROM. Copies Embedded DOS-ROM obtained from General Software. action; POST proceeds next activity sequence.
Debugger MFGMODE WindowsCE
None
Custom Configuration Setup Screen
system's hardware-specific features configured with Custom Setup Screen (Figure 5-4). features straightforward except Redirect Debugger option, which extra embedded feature that allows user select whether Integrated BIOS Debugger should standard keyboard video RS232 console redirection interaction with user. video available, debugger always redirected.
Pentium® Processor Low-Power Module
BIOS Quick Reference
Figure 5-4. Embedded BIOS Custom Setup Screen
Shadow Configuration Setup Screen
system's Shadow Configuration Setup Screen (Figure 5-5) allows selective enabling disabling shadowing Kbyte sections, except Kbytes BIOS ROM, which shadowed unit. Normally, shadowing should enabled C000/C400 enhance BIOS performance), then E000-F000 should shadowed maximize system BIOS performance.
Figure 5-5. Embedded BIOS Shadow Setup Screen
Pentium® Processor Low-Power Module
BIOS Quick Reference
Standard Diagnostics Routines Setup Screen
Embedded systems require automated burn-in testing development cycle. This facility provided directly system's system BIOS through Standard Diagnostics Routines Setup Screen (Figure 5-6). system, selectively enable disable features tested, then enable "Tests Begin ESC?" option cause system test suite invoked. repeat system test battery continuously, should also enable "Continuous Testing" option. When continuous testing started, system will continue until error encountered.
Caution:
disk diagnostics perform write operations those drives; therefore, only spare drives should used which contain data that could harmed test. keyboard test fail when fact hardware operating within reasonable limits. This because although device produce occasional errors, BIOS retries operations when failures occur during normal operation system.
Caution:
Figure 5-6. Standard Diagnostic Routines Setup Screen
Start System BIOS Debugger Setup Screen
Embedded BIOS Integrated Debugger invoked from Setup Screen main menu, well boot activity. Once invoked, debugger will display debugger prompt: EB42DBG: await debugger commands. resume back Setup Screen main menu, type following command, which instructs debugger "go": EB42DBG: <ENTER>
Pentium® Processor Low-Power Module
BIOS Quick Reference
Start RS232 Manufacturing Link Setup Screen
Embedded BIOS Manufacturing Mode invoked from Setup Screen main menu, well boot activity. Once invoked, Manufacturing Mode takes over system freezes console system (Figure 5-7). host resume operation system give control back system Setup Screen system with special control software.
Figure 5-7. Start RS232 Manufacturing Link Setup Screen
5.10
Manufacturing Mode
system's BIOS provides special mode, called Manufacturing Mode, that allows target controlled host computer such laptop desktop Running special software supplied General Software, host access target's drives manage file systems target, reprogram flash memories, test target hardware. full discussion uses Manufacturing Mode beyond scope this chapter. Complete documentation host-side software available directly from General Software. more information, visit General Software site http://www.gensw.com.
5.10.1
Console Redirection
system operate either with standard PC/AT PS/2 keyboard video monitor, with special emulation console over RS232 cable connected host computer running terminal program. example session with HYPERTERMINAL, debugger section's screen display (Figure 5-9). Console Redirection feature, simply remove video display card from system that video available BIOS detect. absence video support, BIOS automatically switches keyboard screen functions serial over COM1 board. hardware connection host computer requires null modem cable.
Pentium® Processor Low-Power Module
BIOS Quick Reference
software target terminal emulation program that supports ANSI terminal mode, using 9600 baud, parity, stop (Note: This modified during BIOS adaptation.) program must flow control, console seem stall accept input. Caution: HYPERTERMINAL's default setting flow control, which will render console inoperative. change this, create session, change flow control setting "none", save session, exit HYPERTERMINAL. Then reinvoke HYPERTERMINAL with session will operate with flow control setting.
5.10.2
CE-Ready Windows Loader
Your system's BIOS "CE-Ready" directly boot Windows without loading intermediate operating system such LOADCEPC. Instead, NK.BIN file placed disk drive drive emulator, then BIOS configured through Basic CMOS Configuration Setup Screen boot NK.BIN file from boot drives instead boot records those drives. configure your system boot Windows natively from disk drive, "Boot Method" field "Windows Basic CMOS Configuration Setup Screen. Then, place copy NK.BIN suitable execution LOADCEPC root directory your normal boot drive, such drive Then, reboot system. configuration should displayed (Figure 5-8), immediately following should message "Loading Windows CE." followed series dots, indicating that loading process continuing. Once fully loaded, Windows takes over system runs using standard keyboard, screen, PS/2 mouse.
Figure 5-8. CE-Ready Boot Feature
5.10.3
Integrated BIOS Debugger
system's BIOS contains built-in debugger that valuable tool board bringup process designs similar evaluation board. supports SYMDEB-style command line interface, used main console's keyboard screen, over redirected connection terminal program (see "Console Redirection" page 5-49).
Pentium® Processor Low-Power Module
BIOS Quick Reference
activate debugger time from main console, press left shift control keys together. display similar HYPERTERMINAL session below (Figure 5-9) will appear, containing title, "Embedded BIOS Debugger Breakpoint Trap" snapshot processor general registers. Figure 5-9. Integrated BIOS Debugger Running Over Remote Terminal
leave debugger resume interrupted activity (whether POST, BIOS, DOS, Windows, application program), enter command (short "go") press ENTER. were prompt when entered debugger, then will still waiting command, will prompt again until press ENTER again. debugger also entered from Setup Screen System, boot activity (see "Basic CMOS Configuration Screen" page 5-43), last ditch effort during board bring-up development bootable device available. your version DOS, application, OEM-supplied BIOS extensions have debugging code (i.e., "INT instructions) remaining, then these will invoke debugger automatically, although this error. continue, command. When Embedded BIOS adapted OEM, debugger removed from final production BIOS, superfluous debugging code application will cause debugger invoked.
Pentium® Processor Low-Power Module
BIOS Quick Reference
complete discussion debugger beyond scope this chapter; however, complete documentation available from General Software http://www.gensw.com.
5.11
Embedded BIOS POST Codes
Embedded BIOS writes progress codes, also known POST codes, port during POST, order provide information developers about system faults. These POST codes monitored on-board Post Code Debugger located U13. They displayed screen. more information about POST codes, contact General Software.
Mnemonic Code POST_STATUS_START POST_STATUS_CPUTEST POST_STATUS_DELAY POST_STATUS_DELAYDONE POST_STATUS_KBDBATRDY POST_STATUS_DISABSHADOW POST_STATUS_CALCCKSUM POST_STATUS_CKSUMGOOD POST_STATUS_BATVRFY POST_STATUS_KBDCMD POST_STATUS_KBDDATA POST_STATUS_BLKUNBLK POST_STATUS_KBDNOP POST_STATUS_SHUTTEST POST_STATUS_CMOSDIAG POST_STATUS_CMOSINIT POST_STATUS_CMOSSTATUS POST_STATUS_DISABDMAINT POST_STATUS_DISABPORTB POST_STATUS_BOARD POST_STATUS_TESTTIMER POST_STATUS_TESTTIMER2 POST_STATUS_TESTTIMER1 POST_STATUS_TESTTIMER0 POST_STATUS_MEMREFRESH POST_STATUS_TESTREFRESH POST_STATUS_TEST15US POST_STATUS_TEST64KB POST_STATUS_TESTDATA POST_STATUS_TESTADDR POST_STATUS_TESTPARITY POST_STATUS_TESTMEMRDWR POST_STATUS_SYSINIT POST_STATUS_INITVECTORS POST_STATUS_8042TURBO POST_STATUS_POSTTURBO POST_STATUS_POSTVECTORS POST_STATUS_MONOMODE POST_STATUS_COLORMODE POST_STATUS_TOGGLEPARITY POST_STATUS_INITBEFOREVIDEO
Code
System Progress Report Start POST (BIOS executing). Start register test. Start power-on delay. Power-on delay finished. Keyboard finished. Disable shadowing cache. Compute CRC, wait KBC. okay, ready. Verifying command Start command. Start data. Start 23,24 blocking unblocking. Start command. Test CMOS shutdown register. Check CMOS checksum. Initialize CMOS contents. Initialize CMOS status date/time. Disable DMA, PICs. Disable Port video display. Initialize board, start memory bank detection. Start timer tests. Test 8254 speaker, port Test 8254 refresh. Test 8254 18.2Hz. Start memory refresh. Test memory refresh. Test 15usec refresh ON/OFF time. Test base 64KB memory. Test data lines. Test address lines. Test parity (toggling). Test Base 64KB memory. Prepare system initialization. Initialize vector table. Read 8042 turbo switch setting. Initialize turbo data. Modification IVT. Video monochrome mode verified. Video color mode verified. Toggle parity before video test. Initialize before video check.
Pentium® Processor Low-Power Module
BIOS Quick Reference
POST_STATUS_VIDEOROM POST_STATUS_POSTVIDEO POST_STATUS_CHECKEGAVGA POST_STATUS_TESTVIDEOMEMORY POST_STATUS_RETRACE POST_STATUS_ALTDISPLAY POST_STATUS_ALTRETRACE POST_STATUS_VRFYSWADAPTER POST_STATUS_SETDISPMODE POST_STATUS_CHECKSEG40A POST_STATUS_SETCURSOR POST_STATUS_PWRONDISPLAY POST_STATUS_SAVECURSOR POST_STATUS_BIOSIDENT POST_STATUS_HITDEL POST_STATUS_VIRTUAL POST_STATUS_DESCR POST_STATUS_ENTERVM POST_STATUS_ENABINT POST_STATUS_CHECKWRAP1 POST_STATUS_CHECKWRAP2 POST_STATUS_HIGHPATTERNS POST_STATUS_LOWPATTERNS POST_STATUS_FINDLOWMEM POST_STATUS_FINDHIMEM POST_STATUS_CHECKSEG40B POST_STATUS_CHECKDEL POST_STATUS_CLREXTMEM POST_STATUS_SAVEMEMSIZE POST_STATUS_COLD64TEST POST_STATUS_COLDLOWTEST POST_STATUS_ADJUSTLOW POST_STATUS_COLDHITEST POST_STATUS_REALMODETEST POST_STATUS_ENTERREAL POST_STATUS_SHUTDOWN POST_STATUS_DISABA20 POST_STATUS_CHECKSEG40C POST_STATUS_CHECKSEG40D POST_STATUS_CLRHITDEL POST_STATUS_TESTDMAPAGE POST_STATUS_VRFYDISPMEM POST_STATUS_TESTDMA0BASE POST_STATUS_TESTDMA1BASE POST_STATUS_CHECKSEG40E POST_STATUS_CHECKSEG40F POST_STATUS_PROGDMA POST_STATUS_INITINTCTRL POST_STATUS_STARTKBDTEST POST_STATUS_KBDRESET POST_STATUS_CHECKSTUCKKEYS POST_STATUS_INITCIRCBUFFER POST_STATUS_CHECKLOCKEDKEYS POST_STATUS_MEMSIZEMISMATCH POST_STATUS_PASSWORD
Passing control video ROM. Control returned from video ROM. Check EGA/VGA adapter. EGA/VGA found, test video memory. Scan video retrace signal. Primary retrace failed. Alternate found. Verify video switches. Establish display mode. Initialize BIOS data area. cursor power-on msg. Display power-on message. Save cursor position. Display BIOS identification string. Display "Hit <DEL> message. Prepare protected mode test. Prepare descriptor tables. Enter virtual mode memory test. Enable interrupts diagnostics mode. Initialize data memory wrap test. Test wrap, find total memory size. Write extended memory test patterns. Write conventional memory test patterns. Find memory size from patterns. Find high memory size from patterns. Verify BIOS data area again. Check <DEL> pressed. Clear extended memory soft reset. Save memory size. Cold boot: Display 64KB memtest. Cold boot: Test memory. Adjust memory size EBDA usage. Cold boot: Test high memory. Prepare shutdown real mode. Return real mode. Shutdown successful. Disable line. Check BIOS data area again. Check BIOS data area again. Clear "Hit <DEL>" message. Test page register file. Verify from display memory. Test DMA0 base register. Test DMA1 base register. Checking BIOS data area again. Checking BIOS data area again. Program controllers. Initialize PICs. Start keyboard test. Issue reset command. Check stuck keys. Initialize circular buffer. Check locked keys. Check memory size mismatch. Check password bypass setup.
Pentium® Processor Low-Power Module
BIOS Quick Reference
POST_STATUS_BEFORESETUP POST_STATUS_CALLSETUP POST_STATUS_POSTSETUP POST_STATUS_DISPPWRON POST_STATUS_DISPWAIT POST_STATUS_ENABSHADOW POST_STATUS_STDCMOSSETUP POST_STATUS_MOUSE POST_STATUS_FLOPPY POST_STATUS_CONFIGFLOPPY POST_STATUS_IDE POST_STATUS_CONFIGIDE POST_STATUS_CHECKSEG40G POST_STATUS_CHECKSEG40H POST_STATUS_SETMEMSIZE POST_STATUS_SIZEADJUST POST_STATUS_INITC8000 POST_STATUS_CALLC8000 POST_STATUS_POSTC8000 POST_STATUS_TIMERPRNBASE POST_STATUS_SERIALBASE POST_STATUS_INITBEFORENPX POST_STATUS_INITNPX POST_STATUS_POSTNPX POST_STATUS_CHECKLOCKS POST_STATUS_ISSUEKBDID POST_STATUS_RESETID POST_STATUS_TESTCACHE POST_STATUS_DISPSOFTERR POST_STATUS_TYPEMATIC POST_STATUS_MEMWAIT POST_STATUS_CLRSCR POST_STATUS_ENABPTYNMI POST_STATUS_INITE000 POST_STATUS_CALLE000 POST_STATUS_POSTE000 POST_STATUS_DISPCONFIG POST_STATUS_INT19BOOT POST_STATUS_LOWMEMEXH POST_STATUS_EXTMEMEXH POST_STATUS_PCIENUM
0a0h 0a1h 0a2h 0a3h 0a4h 0a5h 0a6h 0a7h 0a8h 0a9h 0b0h 0b1h 0b2h 0b3h
Password accepted. Entering setup system. Setup system exited. Display power-on screen message. Display "Wait." message. Shadow system video BIOS. Load standard setup values from CMOS. Test initialize mouse. Test floppy disks. Configure floppy drives. Test hard disks. Configure drives. Checking BIOS data area. Checking BIOS data area. base extended memory sizes. Adjust memory size EBDA. Initialize before calling C800h ROM. Call BIOS extension C800h. C800h extension returned. Configure timer/printer data. Configure serial port base addresses. Prepare initialize coprocessor. Initialize numeric coprocessor. Numeric coprocessor initialized. Check settings. Issue keyboard command. flag reset. Test cache memory. Display soft errors. keyboard typematic rate. Program memory wait states. Clear screen. Enable parity NMIs. Initialize before calling E000h. Call BIOS extension E000h. extension returned. Display system configuration box. Call bootstrap loader. Test memory exhaustively. Test extended memory exhaustively. Enumerate busses.
Pentium® Processor Low-Power Module
Code Listing
code listing below 22V10 PLD.
TITLE PATTERN REVISION AUTHOR COMPANY DATE
22V10 PORT ADDRESS DECODER FLASH DECODE CHRIS BANYAI INTEL CORPORATION 10/1/97
OPTIONS SECURITY
part 22V10FN before conversion CHIP P80B iPLD22V10N [6:7] [9:13] [5:4] [26:23] [21:20] IOWR_BAR SA[0:1] SA[2:6] SA[8:9] SA[19:16] SA[15:14] /CS_BAR /CS_DOC
EQUATIONS CS_BAR /IOWR_BAR /AEN /SA0 /SA1 /SA2 /SA3 /SA4 /SA5 /SA6 /SA8 /SA9 CS_BAR.TRST CS_DOC /SEL /AEN SA19 SA18 /SA17 /SA16 SA15 /SA14 /AEN SA19 SA18 /SA17 SA16 /SA15 /SA14 CS_DOC.TRST /IOWR_BAR OX.TRST SIMULATION SETF SETF SETF SETF /AEN /SA0 /SA1 /SA2 /SA3 /SA4 /SA5 /SA6 /SA7 /SA8 /SA9 IOWR_BAR IOWR_BAR /IOWR_BAR IOWR_BAR
Pentium® Processor Low-Power Module
Code Listing
SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF
/IOWR_BAR /AEN IOWR_BAR /IOWR_BAR /SA0 /IOWR_BAR IOWR_BAR /SA0 /SA1 /SA2 /SA3 /SA4 /SA5 /SA6 /SA7 /SA8 /SA9 /SA19 /SA18 /SA17 /SA16 /SA15 /SA14 /SEL SA19 SA18 /SA17 /SA16 SA15 /SA14 /SEL /AEN /SA19 SA19 /SA18 SA18 SA17 /SA17 SA16 /SA16 /SA15 SA15 SA14 /SA14 /SEL SA19 SA18 /SA17 SA16 /SA15 /SA14 /SEL /AEN /SA19 SA19 /SA18 SA18 SA17 /SA17 /SA16 SA16 SA15 /SA15 SA14 /SA14 /SEL
Pentium® Processor Low-Power Module
Bill Materials
Table bill materials baseboard. Table bill materials interposer card. Table bill materials processor, memory thermal solution. Table B-1. Baseboard Bill Materials
Rev. Reference Designator Manufacturer Comments/ Changes from Alternate Manufacturing Info Changes
Description
Manufacturer
J14,J15 J20-24 J7,J8,J9 J5,J6 JP3,JP4
Conn,Jumper2,1X2 25-mil sq/100-mil space,HDR2 Conn,Jumper3,1X3 25-mil sq/100-mil space,HDR3 Conn,Fan PLCC, Socket Conn,CPU,400 Array (BGA),BGA40X10-400R IC,Clock Generator,CK100,SSOP300 -48(PIN) IC,Clock Buffer,18 Output skew,SSOP300-48(PIN) Crystal,32.768KHz,XTAL/ MC-405 Conn, Serial Stack,DB9MX2 Conn, DB25,DB25FM1 Conn,PCI Edge Recept,145154-120 Conn,ISA Edge Recept.,isa98 Conn,Floppy,17X2 Header Conn, IDE,20X2 Header Conn,Power,5566DP-20/ Conn,PS2 Keyboard Mouse Connector Conn,AGP Edge Recept., pins,AGP-124 Stack Connectors BIOS FLASH Memory,TSOP12X20/40S VLSI,PIIX4,PCI &ISA Bridge,324 mBGA,BGA20x20-324
Berg Cypress Cypress Epson FOXCONN FOXCONN FOXCONN FOXCONN FOXCONN FOXCONN FOXCONN FOXCONN FOXCONN FOXCONN INTEL
929647-09-02 929647-09-03 173981-3 822271-1 74219-002 CY2280PVC-11S CY2318ANZPVC1 MC-405 DM10156-73 DT11323-R5T EH06001-PC-W EQ04901-S6 HL07173-P4 HL07206-D2 HM20100-P2 MH11067-D2 PC1243K-10 UB1112C-D3 E28F004B5T60 Part changed previous
Intel
FW82371EB
Pentium® Processor Low-Power Module Evaluation Board Manual
Bill Materials
Table B-1. Baseboard Bill Materials
Rev. Reference Designator C99,C100,C 132,C133,C2 09,C214 102,106108,111112,114,116118, 126127,129131,142,147, 157,159-162, 174-176,181183, 187200,205206,208,226228 C27C41,C44C47,C50C53 C35,C8,C55-57, C94,C119121, C134,C138, C145, C153 C93,C103105, C128,C152, C154-156 C2,C6,C58,C C84,C88,C8 9,C95, C109 C1,C7,C23,C 66C68,C74,C7 7-C82, C101,C113,C 115, C141,C158, C163173,C177180, C184186,C201202,C204,C2 C211213,C216217,C220C225 Manufacturer Comments/ Changes from Alternate Manufacturing Info Changes
Description
Manufacturer
Chip Capacitor,10pF, 50V,CC0603
Kemet
C0603C100J5GA
Chip Capacitor,0.1uF, 16V,CC0603
Kemet
C0603C104K4RA
POPULATE C143, C146,C203, C210, C215
Chip Capacitor,470pF, 50V,CC0603
Kemet
C0603C471K5RA
Cap,Tant,10uF,15V,C Case,6032
Kemet
T491C106K016A
Cap,Tant,47uF, 20V,D Case,7343
Kemet
T491D476M020A
Cap,Tant,100uF, 10V,D Case,7343
Kemet
T495D107M010A
Chip Capacitor,0.01uF 50V,CC0603
Kemet
C0603C103J5RA
Pentium® Processor Low-Power Module Evaluation Board Manual
Bill Materials
Table B-1. Baseboard Bill Materials
Rev. Reference Designator XU11 XU12,XU13 FB1-FB-4, FB5,FB6,FB 7,FB8 Manufacturer GAL22V10B-7LJ LT1117-3.3cst LT1117CST 980020-40-01 110-99-314-41001 MC74ACT05DR BLM41P750S BLM41A800S DM74ALS00M DM74ALS245AW ECE-A1EU221 Changed part Rev. Comments/ Changes from Alternate Manufacturing Info Changes
Description
Manufacturer
IC,PLD,PLCC28,Socket28 IC,Linear Voltage Regulator,SOT-223 IC,Linear Voltage Regulator,SOT-223 40TSOP BIOS Socket,TSOP12X20/40S TIL311 SOCKET,DIP14 IC,Logic,74ACT05,SO14 Ferrite Bead, SM1806, ZBead Ferrite Bead, SM1806, ZBead IC,Logic,74ALS00,SOIC14 IC,Tranciever,8-Bit Bidirectional Buffer,SOIC20,SO20W
LATTICE Linear Tech. Linear Tech. Meritec MILLMAX Motorola Murata Murata National National
Cap,Electrolitic,220uF, C69,C83,C9 25v,6.3mmx11.2mm,PCAPR 8,C110 200-300 R48,R52,R9 8-R100, R106,R108R116,R118R122 R25,R42,R4 5,R49,R63,R 101,R102 R2,R4,R5,R1 1,R40,R41,R 43,R53R56,R105,R 117,R123124,R127 R1,R3,R88,R 89.R90,R91 R10,R12,R1 3,R14,R39,R 58,R70 R92-R95 R20,R44,R5 7,R71 Chip Resistor,0 Shunt,5%,CR0805
Panasonic
Panasonic
ERJ6GEY0R00V
Chip Resistor,1K,5%,CR0805
Panasonic
ERJ6GEYJ102V
Chip Resistor,10K,5%,CR0805
Panasonic
ERJ6GEYJ103V
Chip Resistor,15K,5%,CR0805 Chip Resistor,22,5%,CR0805 Chip Resistor,220,5%,CR0805 Chip Resistor,27,5%,CR0805 Chip Resistor,2.7K,5%,CR0805
Panasonic Panasonic Panasonic Panasonic Panasonic
ERJ6GEYJ153V ERJ6GEYJ220V ERJ6GEYJ221V ERJ6GEYJ270V ERJ6GEYJ272V
Pentium® Processor Low-Power Module Evaluation Board Manual
Bill Materials
Table B-1. Baseboard Bill Materials
Rev. Reference Designator R17R19,R21,R2 3,R26,R28R32,R34,R3 6,R38 R22, R24, R103,R104 R7,R64-R69, R125,R126, R128 R72R87,R96,R1 S1,S2 Manufacturer Comments/ Changes from Alternate Manufacturing Info Changes
Description
Manufacturer
Chip Resistor,33,5%,CR0805
Panasonic
ERJ6GEYJ330V
Chip Resistor,47,5%,CR0805 Chip Resistor,470,5%,CR0805 Chip Resistor,4.7k,5%,CR0805 Chip Resistor,8.2K,5%,CR0805 Switch-Push Button,PBSW/ PNASNC2
Panasonic Panasonic Panasonic
ERJ6GEYJ470V ERJ6GEYJ471V ERJ6GEYJ472V
changed value (11/10/99)
Panasonic Panasonic
ERJ6GEYJ822V EVQ-PHP03T
RP2,RP3,RP 41RP47,RP54- Res,Array,SMT,33,5%,EXBRP56, RP58,RP60, RP61 RP10,RP18, RP23 Res,Array,SMT,1K,5%,EXBV
Panasonic
EXB33V330JV
Panasonic
EXB38V102JV
RP89,RP11,RP13 -17,RP19RP22, Res,Array,SMT,10K,5%,EXB RP24,RP26-V RP35-36, RP39, RP5152,RP59 RP1,RP4 RP25,RP37, RP49,RP50, RP53 RP57 Res,Array,SMT,22,5%,EXBV Res,Array,SMT,2.7K,5%,EX Res,Array,SMT,47,5%,EXBV
Panasonic
EXB38V103JV
Panasonic
EXB38V220JV
(RP48 changed value, below)
Panasonic Panasonic
EXB38V272JV EXB38V470JV RP48 changed value
RP5,RP6,RP Res,Array,SMT,4.7K,5%,EX RP48 RP12,RP34 Res,Array,SMT,5.6k,5%,EX IC,Logic,Inverter, Schmitt Trigger,SOIC14
Panasonic
EXB38V472JV
Panasonic Philips 74LVC14AD
Pentium® Processor Low-Power Module Evaluation Board Manual
Bill Materials
Table B-1. Baseboard Bill Materials
Rev. Reference Designator Manufacturer Comments/ Changes from Alternate Manufacturing Info Changes
Description
Manufacturer
F1-F3 XBT1 D1,D2,D5 C122-C125 C9-C21,C24C26 U3,U4 U12,U13 D3-D4,D6D7 R8,R15,R16, R46,R47 RP38,RP40 R300-R307 R308 R309
IC,Logic,10 Switch,QSOP,SO24W Crystal,14.318MHz,XTAL,F OX-HC495D Fuse,Drawing,SM250 Battery Holder Socket Battery Diode,LED,SOT23-A VLSI,Super I/O,QFP128 Chip Capacitor,47pF,CC0603 Chip Capacitor,220pF,CC0603 IC,Logic,3 state buffer,SOP14 IC,Logic,SOP-14 IC,RS232 Transceiver, SOIC20,SO20W IC,Logic,Open Drain Buffer,SOP-14 Segment display,DIP14 Schottky Diode,SOT23-E Chip Resistor,124,1%,CR0805 Res,Array,SMT,270,5%,EXB Chip Resistor,0,5%,CR0805 Chip Resistor,680,5%,CR0805 Chip Resistor,33,5%,CR0805 Chip Resistor,0 Shunt,5%,CR0805
Quality Semi Raltron RayChem Renata Reneta Siemens SMSC ZETEX Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic
QS3384SO AS-14.31818-20 SMD250-2 HU-2032-1 CR2032 LGS260-DO FDC37B787 C1608C0G1H470 C1608X7R1H221 KT009A 74LVC125A 74LVC14A GD75232DW SN7407D TIL311 BAT54 ERJ-6ENF1240V EXB38V271JV ERJ6GEY0R00V ERJ6GEYJ681V ERJ6GEYJ330V ERJ6GEY0R00V
Pentium® Processor Low-Power Module Evaluation Board Manual
Bill Materials
Table B-2. Interposer Board Bill Materials (Sheet
Reference Designator Description CONNECTOR 100uF, TANT 220uF, TANT 74221-001 Manufacturer Manufacturer Part Number 104078-4 TPSD107M010R0065 TPSD227M006R0100 74221-001 74220-001 74220-001 identical part; added Alternate Manufacturing Info Changes part changed
C8,C9,C10,C23,C24,C25 C7,C22 U1,U2
BERG
C11,C12,C13,C14,C15,C2 0.01uF 6,C27,C28,C29,C30 C1,C2,C3,C4,C5,C6,C16, C17,C18,C19,C20,C21 0.1uF
KEMET KEMET
C0603C103J5RAC C0603C104K4RAC Part changed Nemco PCT10/10AK support correct footprint.
C31,C32
10uF, TANT
KEMET
T491A106K010AS
RP2,RP3,RP4,RP5,RP6,R P7,RP8,RP9,RP10,RP11, RP12,RP13,RP14,RP15,R P16,RP17,RP18, RP19,RP20,RP21,RP22,R P23,RP24,RP25,RP26,RP R8,R9,R11,R20 R10,R6 R1,R2,R14 R4,R5 R18,R17 R12,R13,R7 R19,R16 4.7K 100K 100K 74LVQ04 REGULATOR PANASONIC PANASONIC PANASONIC PANASONIC PANASONIC PANASONIC PANASONIC PANASONIC PANASONIC FAIRCHILD PANASONIC LINEAR TECH MAXIUM ERJ6GEYJ102V ERJ6GEYJ103V ERJ6GEYJ472V EXB38V220JV ERJ6GEYJ470V ERJ6GEYJ101V ERJ6GEYJ151V ERJ6GEYJ241V ERJ6GEYJ104V EXB38V104JV 74LVC04SC ERJ6GEYJ230V LTC1117CST MAX821LUS-T (see changes column) Manufacurer Changed 1.1; QS32X861Q1 alternate added 1/10W PANASONIC
U4,U5,U6
SWITCH
PERICON
PI5C16861B
CHIP CAPACITOR,1 0pF, 50V,CC0603
KEMET
C0603C100J5GAC
Pentium® Processor Low-Power Module Evaluation Board Manual
Bill Materials
Table B-2. Interposer Board Bill Materials (Sheet
200nH VISHAY/DALE IHLP-2525CZ-01 added 1.0; part changed added 1.0; part corrected added added
C34, C35,
220uF
SANYO
10SA220M
C37, C38, R25, R26,
0.1uF
KEMET PANASONIC
C0603C104K4RAC ERJ6GEYJ151V
TP9,TP10,TP11,TP13,TP 14,TP15,TP16,TP17,TP18 TEST POINT ,TP19,TP20,TP21,TP22
Table B-3. Components Bill Materials
Description Development baseboard interposer board Intel® Pentium® Processor module with 256K Mbyte DIMM, SDRAM BIOS FLASH Memory, TSOP12X20/40S Gbyte Hard disk drive Tornado 2.0/VxWorks 69000 Video Card Intel® Pro/100+ Management Adapter (Fast Ethernet Controller) Intel Intel Panasonic Micron Intel varies Wind River Systems Densitron Intel Manufacturer Part EIAMOD500DEVKIT LPM22CUBF500A UDQFNMH21 MT4LSDT464AG10E E28F004B5T60 varies MR2509 TEV-13306-ZC-00 PCIX690LP PILA8460B
software package (pre-installed HDD)
NOTE: This does include items such mounting hardware, packaging material, documentation, etc., because these items development specific subject change with prior notice customer.
Pentium® Processor Low-Power Module Evaluation Board Manual
Bill Materials
Pentium® Processor Low-Power Module Evaluation Board Manual
Schematics
Schematics provided following items: Baseboard:
Revision History Block Diagram Mini-PCI Connector (Not Populated) Processor Assembly Connector DIMM0 DIMM1 DIMM2 (Not Populated) Clocks ISA/PCI Pullups Slots Slot Connector PIIX4 Part PIIX4 Part Connectors Super Connectors Connectors COMx, DB25, Floppy BIOS/ Port Power Connector Unused Gates
Processor Assembly: Note: following schematics interposer card only. Schematics Pentium® Processor Low-Power Module provided.
Revision History Baseboard Connector Level Shifters/ Power Sequencing Series Termination Decoupling/ Pullups Port Module Connector
Pentium® Processor Low-Power Module
Modular Reference Design System Electronics Board
History
Changes made Revision
Removed CS_B#[5:0]. Tied CS_Bn# CS_An# DIMM connectors. Changed WE_B#, SCAS_B# SRAS_B# WE_A#, SCAS_A#, SRAS_A#
Changed WE_A#, SCAS_A# SRAS_A# WE_B#, SCAS_B# SRAS_B# J16.
Revision
connector been changed from reserved VCC_CMOS.
A20M#, INIT, SLP, IGNNE NMI,INTR, STPCLK# pulled VCC_CMOS. A20M#, INIT, SLP, IGNNE NMI,INTR, STPCLK# have series resistors pullups from 2.7K pullups. Removed Pullup FERR#. Processor assembly interposer cards must pull this signal
THIS SCHEMATIC PROVIDED WITH WARRANTIES WHATSOEVER, INCLUDING WARRANTY MERCHANTABILITY, FITNESS PARTICULAR PURPOSE, WARRANTY OTHERWISE ARISING PROPOSAL, SPECIFICATION SAMPLE.
Modified Boot Block flash support 28F004B5.
Removed Series resistor from MAB12#. Processor Assembly must configure frequency.
Removed flash daughter card from schematics.
Changed MAB12#_R FQS.
license, express implied, estoppel otherwise, intellectual property rights granted herein. Intel disclaims liability, including liability infringement proprietary rights, relating information this specification. Intel does warrant represent that such will infringe such rights.
Removed pullups(formerly MAB12#_R).
Added R308 series termination BXDCLKO.
Update Crystal section.
Removed speaker connector.
names A01-A09 changed A1-A9 DIMM connectors
Changed FB1-FB4, part BLM41P750S, Ohm/100 MHz/3
Changes made Revision Added Signals PWROK(A24) +12V(A33) MB12#_R(B33) J19A.
Moved Added C229 -PCIRST
Changes made Revision
Tied VBAT (pin 3.3V Super I/O.
Changes made Revision
Swapped AD23 AD19 connector.
Separated CSEL IDE0 IDE1
Swapped pins with CPU-Fan connector.
Tied VBAT (pin 5.0V Super I/O.
Changed RP48 4.7K.
(Pullups mouse keyboard.)
Title
Inverted POWERON# signal (SUSC#) from PIIX4 control soft-on feature.
Changed Bulk decoupling 2x220uF from 2x400uF.
Changes
Size Date:
Changed Bulk decoupling C154 from 10uF 47uF reduce line items.
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number Friday, February 2001
Sheet
APIC Page
Port Page
Module Connector Page
DRAM (DIMM) Page 5,6,7
PIIX4 Page 13,14
Connectors Page 10,11
Page
Page Flash Bios Port Page Super Page
Mini Connector (not populated) Page
Connectors Page
Clocks Page
KBD/MS Page Serial Page
Parallel Page
Floppy Page
Power Page Unused Devices Page
Pullups Page
Title
Block Diagram
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
populate
V5_0 V3_3 V3_3
4,10,11,13 AD[31:0]
-PLOCK 4,9,10,11
PCICLK4
-FRAME
4,9,10,11,13
-DEVSEL 4,9,10,11,13
-IRDY -TRDY 4,9,10,11,13
4,9,10,11,13
-STOP -PCIRST -SERR 4,9,10,11,13 4,9,10,11,13 4,10,11,12,13 4,9,10,11,13 AD10 AD11 AD12 AD13 AD14 AD15 AD16 -PREQ3 -PGNT3 CLKRUN# 4,13 4,9,13 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 V5_0 AD25 AD26 AD27 PIRQD# PIRQC# PIRQB# PIRQA# -PERR AD28 AD29 AD30 -C/BE0 -C/BE1 AD31 -C/BE2 -C/BE3
9,10,11,13,14 9,10,11,12,13,14 9,10,11,12,13,14 9,10,11,13,14 9,10,11
AD31 IDSELF
V5_0
2X70RCP
4,10,11,13 -C/BE[3:0]
Title
Mini Connector
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
TP36
TP26
J19C J19B GAD_STB1 GAD8 GC/BE#0 GAD7 GAD0 GAD13 GAD12 GAD10 GAD11 GAD9 MECC1 -SERR AD16 SBA7 SBA0 GREQ# GST0 GGNT#
J19A
SBA5 GAD25 GAD30 GAD24 GAD29 GAD1 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 MD13 MD47 MAB#3 MAA1 DQMB1 CS_A0# DQMA1 DQMA5 CS_A3# WE_B MAB#9 5,6,7 9,14 BxFBCLK INIT INTR 9,14 9,14 9,14 FERR# IGNNE# A20M STPCLK# DBRESET 9,14 9,14 9,13,14 SLP# DQMA3 BXDCLKO MAA3 MAB#6 MAB#7 MAB# 5,6,7 5,6,7 5,6,7 5,6,7 MAB# MAB# MAB# MAA5 MAB# RSV2 RSV5 RSV6 MAA1 CKE2 5,6,7 5,6,7,8,9,14 5,6,7,8,9,14 RSV7 9,13 APICD1 APICCLK1 APICD0 9,13 SMBCLK SMBDATA DQMA2 SUS_STAT1# SUSCLK WSC# MAA11 CKE3 MAA2 MAB# RSV4 MAB# MAA9 CKE0 CKE4 MAA10 MAA0 MAB#1 RSV8 DQMB5 CS_A4# MECC5 DQMA0 MD44 MD15 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 MD34 MD12 MD46 MD37 MD40 SBA6 GAD26 GAD4 GAD3 GAD2 GAD31 SBA4 GAD27 GAD6 GAD5
GRBF#
5,6,7 5,6,7
5,6,7 5,6,7
MD36
GAD_STB0 CLKRUN# MD32 MD35 MD39 MD10
3,13 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7
5,6,7 5,6,7
MD41 MD43
MD33 MD38 MD42 MD11 MD45 MD14 MECC0 SCASB# WE_A# DQMA4 CS_A2# CS_A5# 5,6,7 AD23 AD19 AD27 -PCIRST -IRDY -PGNT3 -PGNT1
5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7
3,10,11,13 5,6,7 3,9,10,11,13 3,10,11,13
5,6,7
MECC4
3,10,11,13 3,10,11,13 3,10,11,13 3,10,11,12,13 3,9,10,11,13 9,10
SCASA#
+12V
14,21
SRASB# CS_A1# SRASA# PWROK MAA4 MAA8 MAA12
MAB#
MAB#
MAA6 MAA7 MD25 MD60 DQMA6 MECC2 DQMA7 MECC6 MECC3 SMI# CPURST
5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 9,14
CKE1 CKE5
8,14
CONFIG1
V3_3 SBA6 G_AD26 G_AD4 G_AD3 G_AD2 MD37 MD40 MD44 MD23 V3_3 MECC5 DQMA0 CSB2# DQMB5 CSA4# V3_3 MAB0# MAB2# V3_3 MAA0 MAB5# Reserved4 MAB12# MAA11 CKE3 Reserved5 DQMA1 Reserved6 V3_3 L2_ZZ SM_CLK SM_DATA Reserved7 PICD1 V3_3 G_AD31 SBA4 G_AD27 G_AD6 G_AD5 AD_STBA CLKRUN# MD32 MD35 MD39 MD18 MD21 MD47 V3_3 DQMA2 DQMA5 CSA3# MAB1# Reserved8 WEB# MAA3 MAB9# MAA9 CKE0 CKE4 MAA10 DCLKWR INIT# INTR V3_3 PIC_CLK PICD0
SBA5 G_AD25 G_AD30 RBF# V3_3 MD36 V3_3 MD41 MD43 MECC4 CSB5# CSB1# SCASA# SRASB# CSA1# SRASA# Reserved0 MAA4 MAA8 MAA12 MAB8# MAB13# CKE1 CKE5 Reserved1 V3_3 V3_3 V3_3 V3_3 V3_3 CPU_TYPE
AD_STBB G_AD24 G_AD29 V3_3 G_AD1 MD33 MD38 MD42 MD19 MD45 MD22 MECC0 CSB4# SCASB# V3_3 WEA# DQMA4 CSA2# CSA5# MAA2 MAB4# MAA5 MAB11# Reserved2 MAA13 CKE2 Reserved3 V3_3 SUS_STAT1# SUS_CLK V3_3 WSC#
SBA7 SBA0 V3_3 G_AD8 G_C/BE0# G_AD7 G_AD0 V3_3 MD34 MD16 MD17 MD20 MD46 DQMB1 CSA0# CSB3# MAA1 MAB3# V3_3 MAB6# MAB7# MAB10 DCLKO V3_3 DQMA3 V3_3 SLP# V3_3 FERR# IGNNE# A20M# STPCLK# DB_RST V3_3 G_REQ# G_GNT# G_AD13 G_AD12 G_AD10 G_AD11 G_AD9 MECC1 SERR# AD16 V3_3 AD23 AD19 AD27 PCI_RST# CSB0# IRDY# GNT3# GNT1# MAA6 MAA7 MD25 MD60 DQMA6 V3_3 MECC2 DQMA7 MECC6 MECC3 SMI# CPU_RST V5_0
TP23 RSV8
TP33
RSV2
TP28 TP32 TP35 RSV7 TP37 RSV6 RSV5
RSV4
GFBCLK
J19D GPIPE#
J19E
Note:GFBCLK must 3.0" longer than GCKOUT
SBA1 GAD16 GAD18 GC/BE#1 RSV10 GTRDY# GDEVSEL# TP31 TP25 RSV9
GST1 GST2 GSB_ST GSTOP# GPAR
GAD23
GCLK
GAD15
SBA3 SBA2 GC/BE#3 GAD20 GAD17 GC/BE#2 GFRAME# GIRDY#
GAD14
GAD22 GAD21 GAD19 GAD28
3,10,11,13
3,10,11,13 3,10,11,13 3,10,11,13 3,10,11,13 3,9,10,11,13 3,9,10,11,13 RSV14 RSV13 RSV12 3,10,11,13 3,10,11,13 3,10,11,13 AD15 -STOP AD17 AD24 TP30 TP24 TP29 3,10,11,13 3,9,10,11,13 3,10,11,13 3,10,11,13
-C/BE0 AD10 AD13 -TRDY
3,10,11,13 AD30 3,10,11,13 AD22
3,10,11,13 3,10,11,13 AD12 3,10,11,13 -C/BE1 3,9,10,11,13 -DEVSEL 3,10,11,13 -C/BE2 3,10,11,13 3,10,11,13 3,10,11,13 9,10,13 3,9,13 AD26 AD28 AD29 -PREQ1 -PREQ3 -PREQ4
AD11 AD14 -PLOCK AD18 AD21 PCICLK7 AD25 -PREQ0 RSV13 MD59 MD54
3,10,11,13 3,10,11,13 3,10,11,13 3,10,11,13 3,10,11,13 3,9,10,11 3,10,11,13 3,10,11,13 3,10,11,13 9,10,13 5,6,7 5,6,7
VCC_CMOS
9,13 3,9,10,11,13 -C/BE3 AD20 AD31 -PREQ2 -PGNT0 RSV12 MD26 MD58 MD50 MD18 5,6,7 5,6,7 5,6,7 5,6,7 9,11,13 9,10 3,10,11,13 3,10,11,13 3,10,11,13
-PHOLD -FRAME
RSV9
9,11 9,13
-PGNT2 -PGNT4 -PHOLDA
RSV14
RSV10
MD24 MD23 MD55 MD56 MD63 MD31 CPUCLK0 CPUCLK1 5,6,7 5,6,7 MD62 MD30 CPUCLK2
5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 MD51 MD52 MD19 MD53 MD22
5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 5,6,7 MD21 MD20 MD28 MD61 CPUPWROK 5,6,7 5,6,7 5,6,7 5,6,7
MD57 MECC7 MD48 MD16 MD17 MD49 MD27 MD29
SB_STB G_STOP# G_PAR G_AD15 G_AD14 V3_3 C/BE0# AD10 AD13 TRDY# V5_0 AD30 AD22 V5_0 PHOLD# FRAME# V5_0 Reserved9 GNT2# GNT4# PHLDA# Reserved10 V3_3 MD57 MECC7 MD48 MD49 MD27 MD29 V3_3 V5_0
PIPE# SBA1 G_AD16 G_AD18 V3_3 G_C/BE1# G_TRDY# G_DEVSEL# AD15 STOP# AD17 AD24 Reserved11 V5_0 C/BE3# AD20 AD31 V5_0 REQ2# GNT0# V3_3 Reserved12 MD26 MD58 MD50 MD10 MD13 MD12 MD28 MD61 VR_PWRGD V5_0
SBA3 SBA2 G_C/BE3# G_AD20 G_AD17 G_C/BE2# G_FRAME# G_IRDY# V3_3 AD12 C/BE1# DEVSEL# V5_0 C/BE2# V5_0 AD26 AD28 AD29 Reserved13 REQ1# REQ3# REQ4# Reserved14 V3_3 MD51 MD52 MD11 MD53 MD14 V3_3 MD62 MD30 V5_0 V5_0
GCLKIN GCLKO G_AD23 G_AD22 G_AD21 G_AD19 G_AD28 AD11 AD14 PLOCK# AD18 AD21 PCLK V5_0 AD25 REQ0# V5_0 MD59 MD54 Reserved16 MD24 MD15 MD55 MD56 MD63 MD31 HCLK0 HCLK1 HCLK2 HCLK3 V5_0
GAD[31:0] GC/BE#[3:0] SBA[7:0]
MAB#[13:0]
Title
Connector
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
V3_3
C105 47uF
C155 47uF
C226 0.1uF
C199 0.1uF
C175 0.1uF
C228 0.1uF
C202 0.01uF
C201 0.01uF
C207 0.01uF
C204 0.01uF
Socket
4,6,7 MAA[13:0] MD[63:0]
MECC[7:0]
4,6,7
MD10 MD11 MD12 MD13 MD14 MD15 MECC0 MECC1 MD46 MD47 MECC4 MECC5 MD41 MD42 MD43 MD44 MD45 MD40 MD36 MD37 MD38 MD39 MD32 MD33 MD34 MD35
V3_3 DQ32 DQ33 DQ34 DQ35 V3_3 DQ36 DQ37 DQ38 DQ39
4,6,7 MAA0 MAA2 MAA4 MAA6 MAA8 MAA1 MAA1 MAA1 MAA3 MAA5 MAA7 MAA9 MAA1 MAA1
WE_A# DQMA0 DQMA1 CS_A0#
DQ10 DQ11 DQ12 DQ13 V3_3 DQ14 DQ15 V3_3 DQMB0 DQMB1 A10(AP) V3_3 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 V3_3 DQ46 DQ47 V3_3 /CAS DQMB4 DQMB5 /RAS V3_3 SCASA# DQMA4 DQMA5 CS_A1# SRASA# 4,6,7 SDCLK1 CKE0 DQMA6 DQMA7 4,6,7 4,6,7
B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 B119 B120 B121 B122 B123 B124
SDCLK0
MAA1
4,6,7 4,6,7
DQMA2 DQMA3
MECC2 MECC3 MD16 MD17 MD18 MD19 MD20
MECC6 MECC7 MD48 MD49 MD50 MD51 MD52
V3_3
CKE1 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31
MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
SDCLK2
SDCLK3
4,6,7,8,9,14 4,6,7,8,9,14
SMBDATA SMBCLK
V3_3 DQMB2 DQBM3 V3_3 DQ16 DQ17 DQ18 DQ19 V3_3 DQ20 VREF (NC) CKE1 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 V3_3 DQ28 DQ29 DQ30 DQ31 V3_3 SDRAM DIMM CKE0 DQMB6 DQMB7 V3_3 DQ48 DQ49 DQ50 DQ51 V3_3 DQ52 REGE DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 V3_3 DQ60 DQ61 DQ62 DQ63 V3_3
B125 B126 B127 B128 B129 B130 B131 B132 B133 B134 B135 B136 B137 B138 B139 B140 B141 B142 B143 B144 B145 B146 B147 B148 B149 B150 B151 B152 B153 B154 B155 B156 B157 B158 B159 B160 B161 B162 B163 B164 B165 B166 B167 B168
Slave address 10100000b
Title
DIMM0
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
V3_3
C104 47uF
C103 47uF
C182 0.1uF
C181 0.1uF
C183 0.1uF
C198 0.1uF
Socket
4,5,7
MECC[7:0]
MAA[13:0]
4,5,7
MD[63:0]
MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MECC4 MECC5 MD10 MD11 MD12 MD13 MD14 MD15 MECC0 MECC1 MD36 MD37 MD38 MD39 MD32 MD33 MD34 MD35
V3_3 DQ32 DQ33 DQ34 DQ35 V3_3 DQ36 DQ37 DQ38 DQ39
4,5,7 MAA0 MAA2 MAA4 MAA6 MAA8 MAA10 MAA12 MAA1 MAA3 MAA5 MAA7 MAA9 MAA1 MAA1
WE_A DQMA0 DQMA1 CS_A2#
DQ10 DQ11 DQ12 DQ13 V3_3 DQ14 DQ15 V3_3 DQMB0 DQMB1 A10(AP) V3_3 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 V3_3 DQ46 DQ47 V3_3 /CAS DQMB4 DQMB5 /RAS V3_3 SCASA# DQMA4 DQMA5 CS_A3# SRASA# 4,5,7 SDCLK5 CKE2 DQMA6 DQMA7 4,5,7 4,5,7
B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 B119 B120 B121 B122 B123 B124
SDCLK4
MAA1
4,5,7 4,5,7
DQMA2 DQMA3
MECC2 MECC3 MD16 MD17 MD18 MD19 MD20
MECC6 MECC7 MD48 MD49 MD50 MD51 MD52
V3_3 R108
CKE3 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31
MD53 MD54 MD55 V3_3 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 SDCLK7 R125 4.7K
SDCLK6
4,5,7,8,9,14 4,5,7,8,9,14
SMBDATA SMBCLK
V3_3 DQMB2 DQBM3 V3_3 DQ16 DQ17 DQ18 DQ19 V3_3 DQ20 VREF (NC) CKE1 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 V3_3 DQ28 DQ29 DQ30 DQ31 V3_3 SDRAM DIMM CKE0 DQMB6 DQMB7 V3_3 DQ48 DQ49 DQ50 DQ51 V3_3 DQ52 REGE DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 V3_3 DQ60 DQ61 DQ62 DQ63 V3_3
B125 B126 B127 B128 B129 B130 B131 B132 B133 B134 B135 B136 B137 B138 B139 B140 B141 B142 B143 B144 B145 B146 B147 B148 B149 B150 B151 B152 B153 B154 B155 B156 B157 B158 B159 B160 B161 B162 B163 B164 B165 B166 B167 B168
Slave address 10100001b
Title
DIMM1
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
V3_3
C156 47uf
C128 47uF
C197 0.1uF
C227 0.1uF
C174 0.1uF
C176 0.1uF
Socket
4,5,6 MAB#[13:0] MD[63:0]
MECC[7:0]
4,5,6
Note: populated
MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MECC4 MECC5
MD10 MD11 MD12 MD13 MD14 MD15 MECC0 MECC1
V3_3 DQ32 DQ33 DQ34 DQ35 V3_3 DQ36 DQ37 DQ38 DQ39
4,5,6 MAB# MAB# MAB# MAB# MAB# MAB# MAB# MAB# MAB# MAB# MAB# MAB# MAB# MAB#
WE_B# DQMA0 DQMB1 CS_A4#
DQ10 DQ11 DQ12 DQ13 V3_3 DQ14 DQ15 V3_3 DQMB0 DQMB1 A10(AP) V3_3 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 V3_3 DQ46 DQ47 V3_3 /CAS DQMB4 DQMB5 /RAS V3_3 SCASB# DQMA4 DQMB5 CS_A5# SRASB# 4,5,6 SDCLK9 CKE4 DQMA6 DQMA7 4,5,6 4,5,6
B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 B119 B120 B121 B122 B123 B124
SDCLK8
MAB#
4,5,6 4,5,6
DQMA2 DQMA3
MECC2 MECC3 MD16 MD17 MD18 MD19 MD20
MECC6 MECC7 MD48 MD49 MD50 MD51 MD52
R100
V3_3 R106
CKE5 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31
MD53 MD54 MD55 V3_3 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
R126 4.7K
SDCLK10
SDCLK11
4,5,6,8,9,14 4,5,6,8,9,14
SMBDATA SMBCLK
V3_3 DQMB2 DQBM3 V3_3 DQ16 DQ17 DQ18 DQ19 V3_3 DQ20 VREF (NC) CKE1 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 V3_3 DQ28 DQ29 DQ30 DQ31 V3_3 SDRAM DIMM CKE0 DQMB6 DQMB7 V3_3 DQ48 DQ49 DQ50 DQ51 V3_3 DQ52 REGE DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 V3_3 DQ60 DQ61 DQ62 DQ63 V3_3
B125 B126 B127 B128 B129 B130 B131 B132 B133 B134 B135 B136 B137 B138 B139 B140 B141 B142 B143 B144 B145 B146 B147 B148 B149 B150 B151 B152 B153 B154 B155 B156 B157 B158 B159 B160 B161 B162 B163 B164 B165 B166 B167 B168
Slave address 10100010b
Title
DIMM2
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
TP17 V2.5 V5_0 V2.5 100uF Adj/GND LT117 V3_3 C162 0.1uF 10uF OutTab
V3_3
47uF
C165 0.01uF
C173 0.01uF
C169 0.01uF
C101 0.01uF
C171 0.01uF
C170 0.01uF
C168 0.01uF
C164 0.01uF
C163 0.01uF
Note: should placed close possible
RP20
RP22
VDDPCI VDDPCI VDDUSB VDDREF AVDD AVDD VDDCPU VDDCPU VDDAPIC
Stuff only enable stopping clocks
CPUCLK0 CPUCLK1 CPUCLK2 CPUCLK3 CPUCLK3 PCICLKF PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLKF_R PCICLKR_1 PCICLKR_2 PCICLKR_3 PCICLKR_4 PCLKAPIC PCICLK7 USBCLK0 REF0 REF1 REF2 APICCLK0 APICCLK1 PCICLKR_6 PCICLKR_7 USBCLKR_0 CPUCLK0 CPUCLK1 CPUCLK2 CPUCLKR_01 CPUCLKR_01 CPUCLKR_2 CPUCLKR_3
CPU_STOP# PCI_STOP# SUSA#
CPU_STOP# PCI_STOP# PWR_DWN#
CY2280 APICCLKR_0 APICCLKR_1 REFR_0 REFR_1 REFR_2 HDR2 RESERVED REF0 REF1 REF2 APIC0 APIC1 14.318MHz USBCLK0 USBCLK1
SEL0 SEL1 SEL100 SEL_SS#
PCICLK_F PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 PCI_CLK6 PCI_CLK7
JUMP2
XTALIN XTALOUT
Keep crystal close clock caps close crystal. lead lengths should equal.
10pf
C100 10pf
This circuit only used TX/Pentium Designs. Note only DIMMS supported.
This circuit only used BX/PentiumII Designs. Note three DIMMS supported.
V3_3
C213 0.01uF
C217 0.01uF
C223 0.01uF
C221 0.01uF
C212 0.01uF
C225 0.01uF
C220 0.01uF
C224 0.01uF
C222 0.01uF
C216 0.01uF
C211 0.01uF
C150 15uF
C149 15uF
C148 15uF
These caps tuned change delay through buffer.
BXDCLKO
R308
CPUCLK3 SDCLKR5 SDCLKR4 SDCLKR6 SDCLKR7
C214 10pF
C209 10pF
CLK_IN
CONFIG1
SDCLKR0 SDCLKR1 SDCLKR2 SDCLKR3 SDCLKR8 SDCLKR9 R110 R112 R114 R116 R119 R121 SDCLK0 SDCLK1 SDCLK2 SDCLK3 SDCLK8 SDCLK9
SDCLKR0 SDCLKR1 SDCLKR2 SDCLKR3
CY2318NZ
SDCLK10 SDCLK11 SDCLK7 SDCLK6 SDCLK4 SDCLK5 BxFBCLK
CLKA1 CLKA2 CLKB1 CLKB2
CLKOUT CLKA4 CLKA3 CLKB4 CLKB3 Zero Delay Buffer U21A 4,14 CONFIG1 74HCT14 CONFIG1#
SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9 SDRAM10 SDRAM11 SDRAM12 SDRAM13 SDRAM14 SDRAM15 SDRAM16 SDRAM17 SDCLKR10 SDCLKR11 SDCLKR7 SDCLKR6 SDCLKR4 SDCLKR5 R120 R118 R115 R113 R111 R109 R122
4,5,6,7,9,14 4,5,6,7,9,14
SMBDATA SMBCLK
SDATA SCLK
Title
Clocks
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
Pullups Pullups
V5_0 V5_0 RP50
13,16,18,20 SD[15:0]
3,10,11 3,4,10,11,13 3,4,10,11,13 3,4,10,11,13 2.7K RP53 3,4,10,11,13 3,4,10,11,13 3,4,10,11,13 3,4,10,11,13 2.7K RP49 -IRDY -TRDY -DEVSEL -STOP -PERR -SERR -FRAME
RP33
SD10 SD11 3,10,11,13,14 3,10,11,12,13,14 3,10,11,12,13,14 3,10,11,13,14 RP25 2.7K 3,4,10,11 -PLOCK -PREQ4 2.7K 2.7K V3_3 10,11 10,11 10,11 10,11 SDONE -SBO REQ64# ACK64# 2.7K RP52 4,10,13 4,10,13 4,11,13 3,4,13 -PREQ0 -PREQ1 -PREQ2 -PREQ3 PIRQA# PIRQB# PIRQC# PIRQD#
RP35
SD12 SD13 SD14 SD15
13,16,18,20
SA[19:0]
RP19
RP17
4,13 4,13 -PHOLD -PHOLDA
RP15
SA10 SA11 -PGNT4 RP51 4,10 4,10 4,11 -PGNT3 -PGNT0 -PGNT1 -PGNT2
RP13
SA12 SA13 SA14 SA15
RP11
V2.5
SA16 SA17 SA18 SA19 4,13 4,13 4,14 CPURST APICD1 APICD0
RP27
LA17 LA18 LA19 LA20
RP24 RP29 RP38
VCC_CMOS
LA21 LA22 LA23 13,18,20 13,16,18,20 13,18,20 13,16,18 RP10 13,18 13,16,18 13,18 RP23 13,18 IOCS16# 13,18 MEMCS16 13,18 IOCHK# RP21 13,14 4,5,6,7,8,14 4,5,6,7,8,14 REFRESH# MASTER16# IOCHRDY ZEROWS# 4,14 4,14 4,14 4,14 MEMW# IOW# MEMR# IOR#
13,18
LA[23:17]
A20M# INIT SLP# IGNNE#
RP40 4,14 4,13,14 INTR 13,14 PX4_ SMI# 4,14 STPCLK#
Note IRQ8 Pull-up PIIX4 page
RP16
13,14,16 13,14,16,18 13,14,16,18 13,14,16,18
IRQ1 IRQ3 IRQ4 IRQ5
RP14
V3_3 RP37 APICCS# SMBDATA SMBCLK 2.7K
13,14,16,18 IRQ6 13,14,16,18 IRQ7 13,14,18 IRQ9 13,14,16,18 IRQ10
RP26 13,18 13,18 13,18 13,18 SMEMW# SMEMR# SBHE# BALE
13,14,18 13,14,16,18 13,14,15,16,18 13,14,15,16,18
IRQ11 IRQ12 IRQ14 IRQ15
RP12
14,16,18 14,16,18 14,16,18 14,16,18
DRQ0 DRQ1 DRQ2 DRQ3
5.6K RP34
14,18 DRQ5 14,18 DRQ6 14,18 DRQ7
5.6K
Title
ISA/PCI Pullups
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
J7/J8 V5_0: A10, A16, A59, A61, B19, B22, B59, B61,
J7/J8 V3_3: A21, A27, A33, A45, B25, B31, B36, B41, B43,
J7/J8 A11, A14, B10,
J7/J8 GND: A12, A13, A18, A24, A30, A35, A37, A42, A48, B12, B13, B15, B17, B28, B34, B38, B46, B49,
J7/J8 +12V: -12V:
V5_0
V3_3
V5_0
V3_3
10uF
C116 0.1uF
0.1uF
0.1uF
C113 0.01uF
0.01uF
C119 10uF
C106 0.1uF
0.1uF
10uF
C117 0.1uF
C114 0.1uF
0.1uF
0.01uF
0.01uF
C120 10uF
0.1uF
C107 0.1uF
3,4,11,13 AD[31:0]
AD[31:0]
3,4,11,13 -C/BE[3:0]
-C/BE[3:0]
PCI_TRST PCI_TCLK PCI_TMS PCI_TDI PIRQA# PIRQC# 3,9,11,13,14 3,9,11,12,13,14 PIRQA# PIRQC#
PCI_TRST PCI_TMS PCI_TDI PIRQD# PIRQB#
PCI_TCLK
3,9,11,12,13,14 3,9,11,13,14
PIRQB# PIRQD#
0.01uF -PCIRST -PGNT0 -PREQ1 AD30 AD28 PCIA2 AD28 AD26 AD24 AD22 AD20 AD18 AD16
0.01uF
0.01uF
0.01uF
-PCIRST -PGNT1 AD31 AD29 AD27 AD25 -C/BE3 AD23 AD21 AD19 AD17 -C/BE2 AD30 AD28 AD26 AD24 PCIB2 AD22 AD20 AD18 AD16 -FRAME
PCICLK1 AD31 AD29 AD27 AD25 -C/BE3 AD23 AD21 AD19 AD17 -C/BE2 -FRAME -TRDY -STOP SDONE -SBO AD15 3,4,9,11,13 3,4,9,11,13 9,11 9,11 3,4,9,11,13 3,4,9,11,13
PCICLK1
AD29
4,9,13
-PREQ0
3,4,11,12,13 PCICLK2 4,9,13
3,4,9,11,13
-IRDY
-IRDY -DEVSEL -PLOCK -PERR -SERR -C/BE1 AD14
-TRDY -STOP SDONE -SBO AD15 AD12 AD10 AD13 AD11
3,4,9,11,13
-DEVSEL
3,4,9,11 3,9,11 3,4,9,11,13 -C/BE1 AD14 AD12 AD10 AD13 AD11
-PLOCK -PERR -SERR
-12V V5_0 V5_0 INTB INTD PRSNT1 PRSNT2 V5_0 AD[31] AD[29] AD[27] AD[25] V3_3 C/BE3 AD[23] AD[21] AD[19] V3_3 AD[17] C/BE2 IRDY V3_3 DEVSEL LOCK PERR V3_3 SERR V3_3 C/BE1 AD[14] AD[12] AD[10] TRST +12V V5_0 INTA INTC V5_0 V5_0 V5_0 AD[30] V3_3 AD[28] AD[26] AD[24] IDSEL V3_3 AD[22] AD[20] AD[18] AD[16] V3_3 FRAME TRDY STOP V3_3 SDONE AD[15] V3_3 AD[13] AD[11] AD[09]
-12V V5_0 V5_0 INTB INTD PRSNT1 PRSNT2 V5_0 AD[31] AD[29] AD[27] AD[25] V3_3 C/BE3 AD[23] AD[21] AD[19] V3_3 AD[17] C/BE2 IRDY V3_3 DEVSEL LOCK PERR V3_3 SERR V3_3 C/BE1 AD[14] AD[12] AD[10]
TRST +12V V5_0 INTA INTC V5_0 V5_0 V5_0 AD[30] V3_3 AD[28] AD[26] AD[24] IDSEL V3_3 AD[22] AD[20] AD[18] AD[16] V3_3 FRAME TRDY STOP V3_3 SDONE AD[15] V3_3 AD[13] AD[11] AD[09]
REQ64# 9,11 ACK64#
REQ64#
9,11 ACK64#
AD[08] AD[07] V3_3 AD[05] AD[03] AD[01] V5_0 ACK64 V5_0 V5_0 C/BE0 V3_3 AD[06] AD[04] AD[02] AD[00] V5_0 REQ64 V5_0 V5_0 Conn
AD[08] AD[07] V3_3 AD[05] AD[03] AD[01] V5_0 ACK64 V5_0 V5_0 Conn -C/BE0
C/BE0 V3_3 AD[06] AD[04] AD[02] AD[00] V5_0 REQ64 V5_0 V5_0
-C/BE0
SLOT
SLOT
Title
Slots
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
V5_0
V3_3
10uF
0.1uF
0.1uF
C118 0.1uF
0.01uF
C115 0.01uF
C121 10uF
C108 0.1uF
0.1uF
3,4,10,13 AD[31:0] V5_0
AD[31:0]
3,4,10,13 -C/BE[3:0]
-C/BE[3:0]
PCI_TRST PCI_TDI PCI_TMS PCI_TMS PCI_TDI PIRQC# PIRQA# 3,9,10,12,13,14 3,9,10,13,14 PCI_TRST 4.7K
4.7K
4.7K PCI_TCLK
4.7K
PCI_TCLK
3,9,10,13,14 3,9,10,12,13,14
PIRQD# PIRQB#
0.01uF -PCIRST -PGNT2 AD30 AD28 AD26 AD24 PCIC2 AD22 AD20 AD18 AD16 -FRAME -TRDY -STOP SDONE -SBO AD15 AD13 AD11 9,10 9,10 3,4,9,10,13 3,4,9,10,13 3,4,9,10,13 3,4,9,10,13 AD30 3,4,10,12,13
0.01uF
PCICLK3
4,9,13 AD31 AD29 AD27 AD25 AD23 AD21 AD19 AD17
-PREQ2
-C/BE3
-C/BE2
3,4,9,10,13
-IRDY
3,4,9,10,13
-DEVSEL
3,4,9,10 3,9,10 3,4,9,10,13
-PLOCK -PERR -SERR
-C/BE1 AD14 AD12 AD10
-12V V5_0 V5_0 INTB INTD PRSNT1 PRSNT2 V5_0 AD[31] AD[29] AD[27] AD[25] V3_3 C/BE3 AD[23] AD[21] AD[19] V3_3 AD[17] C/BE2 IRDY V3_3 DEVSEL LOCK PERR V3_3 SERR V3_3 C/BE1 AD[14] AD[12] AD[10] TRST +12V V5_0 INTA INTC V5_0 V5_0 V5_0 AD[30] V3_3 AD[28] AD[26] AD[24] IDSEL V3_3 AD[22] AD[20] AD[18] AD[16] V3_3 FRAME TRDY STOP V3_3 SDONE AD[15] V3_3 AD[13] AD[11] AD[09]
9,10 ACK64#
AD[08] AD[07] V3_3 AD[05] AD[03] AD[01] V5_0 ACK64 V5_0 V5_0 C/BE0 V3_3 AD[06] AD[04] AD[02] AD[00] V5_0 REQ64 V5_0 V5_0 Conn
REQ64#
9,10
-C/BE0
SLOT
Title
Slot
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
V3_3
C186 0.01uF
C185 0.01uF
C184 0.01uF
C179 0.01uF
C178 0.01uF
C166 0.01uF
C167 0.01uF
C177 0.01uF
C172 0.01uF
C180 0.01uF
tied ground Specification
SBA[7:0] V3_3 V5_0 V5_0 4.7K 74AS0 GST0 GST2 GRBF# SBA0 SBA2 GSB_ST SBA4 SBA6 SBA5 SBA7 SBA3 SBA1 GCLK GREQ# 4.7K V5_0 V3_3 +12V V3_3 V3_3
-PCIRST GGNT# GST1 GPIPE# 3,4,10,11,13
74AS PIRQB# 3,9,10,11,13,14
3,9,10,11,13,14
PIRQC#
OVRCNT# 5.0V 5.0V USB+ INTB# REQ# 3.3V RBF# SPARE SBA0 3.3V SBA2 SB_STB SBA4 SBA6 SPARE RESERVED USBGND INTA# RST# GNT# 3.3V RESERVED PIPE# SPARE SBA1 3.3V SBA3 RESERVED SBA5 SBA7
GAD31 GAD29 GAD27 GAD25 GAD_STB1 GAD23 GAD21 GAD19 GAD17 GC/BE#2 GIRDY# V3_3 GDEVSEL# GC/BE#1 GAD14 GAD12 GAD10 GAD8 GAD_STB0 GAD7 GAD5 GAD3 GAD1 8.2K 8.2K
GAD30 GAD28 GAD26 GAD24 GC/BE#3 GAD22 GAD20 GAD18 GAD16 GFRAME#
Stub length from connector resistor must less than 0.1"
V3_3
GAD_STB0
8.2K
GAD_STB1
8.2K
GSB_ST
8.2K
GTRDY# GSTOP# GPME GAD15 GAD13 GAD11 GAD9 GC/BE#0 GAD6 GAD4 GAD2 GAD0 GPAR
GFRAME#
8.2K
GIRDY#
8.2K
GTRDY#
8.2K
GSTOP#
8.2K
GDEVSEL#
8.2K
GREQ#
8.2K
AD31 AD29 3.3V AD27 AD25 AD_STB1 AD23 VDDQ3.3 AD21 AD19 AD17 C/BE2# VDDQ3.3 IRDY# SPARE SPARE 3.3V DEVSEL# VDDQ3.3 PERR# SERR# C/BE1# VDDQ3.3 AD14 AD12 AD10 VDDQ3.3 AD_STB0 VDDQ3.3 SMB0 Connector AD30 AD28 3.3V AD26 AD24 RESERVED C/BE3# VDDQ3.3 AD22 AD20 AD18 AD16 VDDQ3.3 FRAME# 3.3V TRDY# STOP# PME# AD15 VDDQ3.3 AD13 AD11 C/BE0# 3.3V RESERVED VDDQ3.3 SMB1
GGNT#
8.2K
V3.3SUS
GPIPE#
8.2K
GRBF#
8.2K
GPAR
8.2K
GPME
8.2K
GAD[31:0]
GC/BE#[3:0]
Title
Connector
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number Friday, February 2001
Sheet
3,4,10,11 AD[31:0] SDD[15:0]
U21B RSTDRV RSTDRV# 74HCT14 SDCS3# PDCS3# SDCS1# PDCS1# SA[19:0] 9,16,18,20
SIGNALS
DS3S# DS3P# DS1S# DS1P#
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
AD18
SIGNALS
AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE#0 C/BE#1 C/BE#2 C/BE#3
3,4,10,11 -C/BE[3:0]
-C/BE0 -C/BE1 -C/BE2 -C/BE3
PIIX4
PIIX4 device
SD[15:0] 9,16,18,20
R_AD18 3,4,9,10,11 3,4,9,10,11
CLKRUN# -DEVSEL -FRAME
SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 XD[7:0]
SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19
3,4,9,10,11 -IRDY 3,4,9,10,11
3,4,10,11,12 -PCIRST
Place near PIIX4
C229 47pF REQ0# REQ1# REQ2# REQ3# XOE# XDIR# 74ALS2
-PHOLD -PHOLDA 3,4,9,10,11 -SERR 3,4,9,10,11 -STOP 3,4,9,10,11 -TRDY
CLOCKRUN# DEVSEL# FRAME# IDSEL IRDY# PCIRST# PHOLD# PHOLDA# SERR# STOP# TRDY#
4,9,10 4,9,10 4,9,11 3,4,9
-PREQ0 -PREQ1 -PREQ2 -PREQ3
ISA/EIO SIGNALS
Note: U14, C203,C215, C210 populated
V5_0
PDD[15:0]
SD10 SD11 SD12 SD13 SD14 SD15 LA[23:17] 9,18
SD10 SD11 SD12 SD13 SD14 SD15
C203 0.1uF
C215 0.1uF
C210 0.1uF
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 GPO1/LA17 GPO2/LA18 GPO3/LA19 GPO4/LA20 GPO5/LA21 GPO6/LA22 GPO7/LA23 MEMCS16# MEMR# MEMW# SMEMR# SMEMW# SYSCLK GPO0/BALE GPI0/IOCHK# REFRESH# IOCS16# ZEROWS# REFRESH# IOCS16# ZEROWS# 9,18 9,18 9,18 SMEMW# SYSCLK BALE IOCHK# 9,18 9,18 9,18 MEMCS16 MEMR# MEMW# SMEMR# 9,18 9,18,20 9,18,20 9,18 LA17 LA18 LA19 LA20 LA21 LA22 LA23
APICD0 APICD1 APICCLK
APICD0 APICD1 APICCLK0 INTR IRQ1 IRQ0 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 MEMR# MEMW# 9,14 APICCS# D/I# IRQ8_Buf IRQ9 IRQ10 IRQ11 IRQ12 APICREQ# APICACK1# WSC# APICREQ# APICACK1# APICACK2# I13R PCLKAPIC RSTDRV PCICLK RESET
4,9,14 9,14,16 9,14,16,18 9,14,16,18 9,14,16,18 9,14,16,18 9,14,16,18
SIGNALS
SBHE# RSTDRV IOR# IOW# IOCHRDY SBHE# RSTDRV IOR# IOW# IOCHRDY
PIIX4
SDA0 SDA1 SDA2 PDDACK# SDDACK# PDREQ SDREQ PDIOR# PDIOW# PIORDY SDIOR# SDIOW# SIORDY PDA0 PDA1 PDA2
SDA0 SDA1 SDA2 PDDACK# SDDACK# PDREQ# SDREQ# PDIOR# PDIOW# PIORDY SDIOR# SDIOW# SIORDY PDA0 PDA1 PDA2
9,18 16,18 9,16,18 9,16,18,20 9,16,18 16,18,20
9,14,18 9,14,16,18 9,14,18 9,14,16,18
V5_0 RP59 I13R I21R I22R TESTIN#
I21R I22R
IRQ14 IRQ15 PIRQA# PIRQB# PIRQC# PIRQD# IRQ9OUT# PX4_ SMI#
9,14,15,16,18 9,14,15,16,18 3,9,10,11,14 3,9,10,11,12,14 3,9,10,11,12,14 3,9,10,11,14 9,14
INTIN0 INTIN1 INTIN2 INTIN3 INTIN4 INTIN5 INTIN6 INTIN7 INTIN8 INTIN9 INTIN10 INTIN11 INTIN12 INTIN13 INTIN14 INTIN15 INTIN16 INTIN17 INTIN18 INTIN19 INTIN20 INTIN21 INTIN22 INTIN23/SMI# SMIOUT#
RSTDRV
JUMP3 V2.5 V3.3SUS R117
SMI#
Bat54
82093
VCC_CMOS
This circuit prevent IOAPIC from being powered IRQ#8 when suspend power applied device.
IRQ#8
U15A 74LVC125 IRQ8_Buf
Title
PIIX4 Part
Size Date:
THIS DRAWING CONTAINS INFORMATION WHICH BEEN VERIFIED MANUFACTURING USER PRODUCT. INTEL RESPONSIBLE MISUSE THIS INFORMATION.
Document Number <Doc> Friday, February 2001
Sheet
V3_3 V3.3SUS
C195 0.1uF
C191 0.1uF
C193 0.1uF
C188 0.1uF
C187 0.1uF
C192 0.1uF
C190 0.1uF
C189 0.1uF
C194 0.1uF
VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCSUSB VCCSUS VCCSUS
16,18 16,18 16,18 16,18
DACK0# DACK1# DACK2# DACK3# DACK5# DACK6# DACK7#
DACK0# DACK1# DACK2# DACK3# DACK5# DACK6# DACK7#
SIGNALS
TP11 TP13 74LVC14 U24E PWRON# EXTSMI# SUSA#
V3_3
9,16,18 9,16,18 9,16,18 9,16,18 9,18 9,18 9,18 RP30 EXTSMI# SUSA# GPO15/SUSB# GPO16/SUSC#
DRQ0 DRQ1 DRQ2 DRQ3 DRQ5 DRQ6 DRQ7
DREQ0 DREQ1 DREQ2 DREQ3 DREQ5 DREQ6 DREQ7
USBP1+ USBP1USBP0+ USBP0OC0# OC1# V3.3SUS
USBP1+ USBP1USBP0+ USBP0OC0# OC1#
POWER MGMT.
CPU_STOP# PCI_STOP# SUS_STAT1# THERM# BATLOW SMBALERT# GPME SMBDATA SMBCLK 4,5,6,7,8,9 4,5,6,7,8,9 RSMRST# PWRBTN#
APICACK1# APICCS# APICREQ# APICACK#/GPO12 APICCS#/GPO13 APICREQ#/GP15
REQA#/GPI2 REQB#/GPI3 REQC#/GPI4 GNTA#/GPO9 GNTB#/GPO10 GNTC#/GPO11
V3.3SUS
V3_3
16,18 9,13
DMA/IRQ SIGNALS
GPO17/CPU_STP# GPO18/PCI_STP# GPO19/ZZ GPO20/SUS_STAT1# GPO21/SUS_STAT2# GPI8/HCT# GPI9/BATLOW# RSMRST# PWRBT# GPI10/LID SMBDATA SMBCLK GPI11/SMBALERT# GPI12/RI#A
9,13,16 9,13,16,18 9,13,16,18 9,13,16,18 9,13,16,18 9,13,16,18 9,13,18 V5_0
SERIRQ THERM# EXTSMI#
RP39
PIIX4
VREF C129 0.1uF C134 10uF
V3_3 Bat54 V3.3SUS SMBALERT# TE
Other recent searches
UP002711-0607 - UP002711-0607 UP002711-0607 Datasheet
TMP91C815F - TMP91C815F TMP91C815F Datasheet
SMV1763-079LF - SMV1763-079LF SMV1763-079LF Datasheet
QFN16 - QFN16 QFN16 Datasheet
MK16-B-2 - MK16-B-2 MK16-B-2 Datasheet
IRLL014NPbF - IRLL014NPbF IRLL014NPbF Datasheet
EV0056 - EV0056 EV0056 Datasheet
ECS-SR-A - ECS-SR-A ECS-SR-A Datasheet
DS21354 - DS21354 DS21354 Datasheet
DS21554 - DS21554 DS21554 Datasheet
DS2154 - DS2154 DS2154 Datasheet
2SD2659 - 2SD2659 2SD2659 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
