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Pentium® Processor Low-Power Module 266-MHz
Order Number: 273237-001
Information this document provided connection with Intel products. license, express implied, estoppel otherwise, intellectual property rights granted this document. Except provided Intel's Terms Conditions Sale such products, Intel assumes liability whatsoever, Intel disclaims express implied warranty, relating sale and/or Intel products including liability warranties relating fitness particular purpose, merchantability, infringement patent, copyright other intellectual property right. Intel products intended medical, life saving, life sustaining applications. Intel make changes specifications product descriptions time, without notice. Designers must rely absence characteristics features instructions marked "reserved" "undefined." Intel reserves these future definition shall have responsibility whatsoever conflicts incompatibilities arising from future changes them. Intel® Pentium® processor contain design defects errors known errata which cause product deviate from published specifications. Current characterized errata available request. MPEG international standard video compression/decompression promoted ISO. Implementations MPEG CODECs, MPEG enabled platforms require licenses from various entities, including Intel Corporation. Contact your local Intel sales office your distributor obtain latest specifications before placing your product order. Copies documents which have ordering number referenced this document, other Intel literature obtained calling 1-800548-4725 visiting Intel's website http://www.intel.com. Copyright Intel Corporation, 1999. Portions this manual Copyright 1999 General Software, Inc. rights reserved. *Third-party brands names property their respective owners.
Pentium® Processor Low-Power Module
Contents
About This Manual .1-1
Content Overview.1-1 Text Conventions .1-1 Technical Support .1-2 1.3.1 Electronic Support Systems .1-2 1.3.1.1 Online Documents .1-2 1.3.1.2 Intel Product Forums .1-3 1.3.2 Telephone Technical Support .1-3 Product Literature.1-3 Related Documents.1-4 Overview .2-1 2.1.1 Processor Assembly Features .2-1 2.1.2 Baseboard Features .2-2 Included Hardware .2-2 Software Features.2-3 2.3.1 General Software, Inc.2-3 2.3.2 Software Systems, Ltd.2-3 Before Begin .2-4 Setting Evaluation Board.2-4 Configuring BIOS .2-7 Block Diagram .3-1 Mechanical Design .3-2 System Operation.3-2 3.3.1 Pentium Processor Power .3-2 3.3.1.1 Cache .3-2 3.3.2 82443BX Host Bridge/Controller .3-2 3.3.2.1 System Interface.3-3 3.3.2.2 Accelerated Graphics Port (AGP) Interface.3-3 3.3.2.3 System Clocking .3-3 3.3.3 .3-3 3.3.4 82371EB ISA/IDE Xcelerator (PIIX4E) .3-4 3.3.5 DRAM.3-4 3.3.6 Power .3-4 3.3.7 Boot ROM.3-4 3.3.8 RTC/NVRAM .3-4 3.3.9 Legacy .3-4 3.3.10 Support .3-5 3.3.11 Floppy Disk Support .3-5 3.3.12 Keyboard/Mouse .3-5 3.3.13 .3-5 3.3.14 RS232 Ports .3-5 3.3.15 IEEE 1284 Parallel Port.3-5 3.3.16 Connectors .3-5
Getting Started .2-1
Theory Operation .3-1
Pentium® Processor Low-Power Module
3.3.17 3.3.18 3.3.19 3.3.20 3.3.21 3.3.22
Connectors .3-5 Connector .3-5 Post Code Debugger.3-6 Clock Generation.3-6 Interrupt .3-6 Memory .3-7
Hardware Reference .4-1
Processor Assembly .4-1 4.1.1 Thermal Management .4-1 4.1.2 Debugger Port .4-1 Post Code Debugger.4-2 Expansion Slots.4-2 Device Mapping .4-2 Connector Pinouts.4-3 4.5.1 Power Connector.4-3 4.5.2 Debugger Connector .4-4 4.5.3 Stacked .4-4 4.5.4 Mouse Keyboard Connectors.4-5 4.5.5 Parallel Port.4-5 4.5.6 Serial Ports.4-6 4.5.7 Connector.4-6 4.5.8 Floppy Drive Connector.4-7 4.5.9 Slot Connector.4-8 4.5.10 Slot Connector.4-9 Connector .4-10 Jumpers .4-11 4.7.1 Enable Spread Spectrum Clocking (J14) .4-11 4.7.2 Clock Frequency Selection (J15) .4-11 4.7.3 On/Off (J20).4-11 4.7.4 Flash BIOS Select (J21).4-12 4.7.5 Flash BIOS Boot Block Control (J22) .4-12 4.7.6 SMI# Source Control (J23).4-12 4.7.7 CMOS Clear (J24).4-12 4.7.8 Push Button Switches .4-12 In-Circuit BIOS Update.4-13 BIOS Pre-Boot Features .5-1 Power-On Self-Test (POST) .5-1 Setup Screen System .5-3 5.3.1 Basic CMOS Configuration Screen .5-3 5.3.2 Configuring Drive Assignments .5-4 5.3.2.1 Configuring Floppy Drive Types .5-4 5.3.3 Configuring Drive Types.5-5 Configuring Boot Actions.5-6 Custom Configuration Setup Screen.5-6 Shadow Configuration Setup Screen .5-7 Standard Diagnostics Routines Setup Screen .5-8 Start System BIOS Debugger Setup Screen .5-8
BIOS Quick Reference .5-1
Pentium® Processor Low-Power Module
5.10
5.11 5.12
Start RS232 Manufacturing Link Setup Screen.5-9 Manufacturing Mode.5-9 5.10.1 Console Redirection .5-9 5.10.2 CE-Ready Windows Loader .5-10 5.10.3 Integrated BIOS Debugger .5-10 Embedded BIOS POST Codes .5-12 Embedded BIOS Beep Codes.5-15
Index
Code Listing
.Index-1
Figures
Evaluation Board Jumpers Connectors.2-5 Evaluation Board Block Diagram.3-1 BIOS POST Pre-Boot Environment.5-2 Embedded BIOS Setup Screen Menu.5-3 Embedded BIOS Basic Setup Screen.5-4 Embedded BIOS Custom Setup Screen .5-7 Embedded BIOS Shadow Setup Screen.5-7 Standard Diagnostic Routines Setup Screen .5-8 Start RS232 Manufacturing Link Setup Screen.5-9 CE-Ready Boot Feature .5-10 Integrated BIOS Debugger Running Over Remote Terminal .5-11
Tables
4-10 4-11 4-12 4-13 Related Resources.1-4 Interrupts .3-6 Memory .3-7 Device Mapping.4-2 Primary Power Connector (J11) .4-3 Connector Assignment Interposer Card) .4-4 Connector Pinout (J2) .4-4 Keyboard Mouse Connector Pinouts Baseboard) .4-5 DB25 Parallel Port Connector Pinout (J3).4-5 Serial Port Connector Pinout (J4).4-6 IDE1 (JP3) IDE2 (JP4) Connector.4-6 Diskette Drive Header Connector (JP1) .4-7 Slots (J7, J9).4-8 Slots (J5, J6).4-9 Slot (J13) .4-10 Default Jumper Settings .4-11 IDE0-IDE3 Drive Assignments .5-5
Pentium® Processor Low-Power Module
About This Manual
This manual tells evaluation board processor assembly included your Pentium® Processor Low-Power Development Kit.
Content Overview
Chapter "About This Manual" This chapter contains description conventions used this manual. last sections tell obtain literature contact customer support. Chapter "Getting Started" Provides complete instructions configure evaluation board processor assembly setting jumpers, connecting peripherals, providing power, configuring BIOS. Chapter "Theory Operation" This chapter provides information system design. Chapter "Hardware Reference" This chapter provides description jumper settings functions, pinout information each connector. Chapter "BIOS Quick Reference" This chapter describes configure BIOS your system configuration. summary BIOS menu options provided. Appendix "PLD Code Listing" This appendix includes sample code listing Post Code Debugger.
Text Conventions
following notations used throughout this manual. Variables Instructions pound symbol appended signal name indicates that signal active low. Variables shown italics. Variables must replaced with correct values. Instruction mnemonics shown uppercase. When programming, instructions case-sensitive. either upper- lowercase.
Pentium® Processor Low-Power Module
About This Manual
Numbers
Hexadecimal numbers represented string hexadecimal digits followed character zero prefix added numbers that begin with through (For example, shown 0FFH.) Decimal binary numbers represented their customary notations. (That decimal number 1111 1111 binary number. some cases, letter added clarity.) following abbreviations used represent units measure: Gbyte Kbyte Mbyte amps, amperes gigabytes kilobytes kilo-ohms milliamps, milliamperes megabytes megahertz milliseconds milliwatts nanoseconds picofarads watts volts microamps, microamperes microfarads microseconds microwatts
Units Measure
Signal Names
Signal names shown uppercase. When several signals share common name, individual signal represented signal name followed number, while group represented signal name followed variable (n). example, lower chip-select signals named CS0#, CS1#, CS2#, they collectively called CSn#. pound symbol appended signal name identifies active-low signal. Port pins represented port abbreviation, period, number (e.g., P1.0).
1.3.1
Technical Support
Electronic Support Systems
Intel's site World Wide (http://www.intel.com/) provides up-to-date technical information product support. This information available hours day, days week, providing technical information whenever need
1.3.1.1
Online Documents
Product documentation provided online variety web-friendly formats
Pentium® Processor Low-Power Module
About This Manual
1.3.1.2
Intel Product Forums
Intel provides technical expertise through electronic messaging. With publicly accessible forums, have benefits email technical support, with added benefit option viewing previous messages written other participants, providing suggestions tips that help others. Each Intel's technical support forums based single product product family. Questions replies limited topic particular forum. Intel also provides several non-technical support related forums. Complete information Intel forums available
1.3.2
Telephone Technical Support
U.S. Canada, technical support representatives available answer your questions between a.m. p.m. PST. also your questions (Please include your voice telephone number indicate whether prefer response phone fax). Outside U.S. Canada, please contact your local distributor. 1-800-628-8686 916-356-7599 916-356-6100 (fax) U.S. Canada U.S. Canada U.S. Canada
Product Literature
order product literature from following Intel literature centers. 1-800-548-4725 708-296-9333 44(0)1793-431155 44(0)1793-421333 44(0)1793-421777 81(0)120-47-88-32 U.S. Canada U.S. (from overseas) Europe (U.K.) Germany France Japan (fax only)
Pentium® Processor Low-Power Module
About This Manual
Related Documents
Table 1-1. Related Resources
Document Title Order Number 243668 243887 244001 243190 243191 243192 290633 290639 273218 290562 290635 273135
Pentium® Mobile
Processor Mobile Module datasheet Processor Specification Update
Pentium®
Family Processors Hardware Developer's Manual Intel Architecture Software Developer's Manual, Volume Basic Architecture Intel Architecture Software Developer's Manual, Volume Instruction Reference Intel Architecture Software Developer's Manual, Volume System Programming Guide Intel® 440BX AGPset: 82443BX Host Bridge/Controller datasheet Intel® Intel® 440BX AGPset: 82443BX Host Bridge/Controller Specification Update 440BX AGPset: 82443BX Host Bridge/Controller Timing Specification
82371AB (PIIX4) 82371EB (PIIX4E) PCI-TO-ISA/IDE Xcelerator datasheet Intel 82371EB (PIIX4E) Specification Update Intel 82371AB Xcelerator (PIIX4) Timing Specification
Pentium® Processor Low-Power Module
Getting Started
This chapter identifies evaluation board kit's components, features specifications, tells board operation.
Overview
evaluation board consists baseboard processor assembly.
processor assembly consists Intel® 266-MHz Pentium® Processor Low-Power
Module with 82443BX Host Bridge/Controller interposer board.
baseboard contains 82371EB Xcelerator (PIIX4E) other system
board components peripheral connectors. Warning: processor assembly attached baseboard factory. remove processor assembly from baseboard. Intel will support processor assembly baseboard portion assembly (including processor module) removed customer.
2.1.1
Processor Assembly Features
processor assembly features summarized below. Pentium Processor Low-Power Module:
Full support Pentium® processor Power with 66-MHz system
frequencies
Intel 440BX AGPset: 82443BX Host Bridge/Controller memory interface: wide range DRAM support including:
64-bit memory data interface plus bits hardware scrubbing DRAM SDRAM support Mbit Mbit DRAM technologies
Five masters
Specification Compliant
Accelerated Graphics Port (AGP) Support:
Interface Specification Revision compliant 66/133 MHz, 3.3-V device support
Integrated System Power Management support
Interposer Card:
Level shifters convert connector interface debugger
Pentium® Processor Low-Power Module
Getting Started
Intel® Pentium® Processor Mobile Module datasheet (order number 243668) more information module.
2.1.2
Baseboard Features
evaluation baseboard these features:
Flash system BIOS
General Software system BIOS In-circuit BIOS upgradability
SDRAM DIMM connectors 32-Mbyte SDRAM DIMM included
Mbyte x64, with latency
User-accessible on-board connectors include:
serial RS-232 ports; COM1, COM2 EPP/ECP parallel port PS/2 keyboard PS/2 mouse (6-pin mini-DIN connectors) ports connectors floppy connector Three expansion slots expansion slots. There shared slots usable. connector Standard power supply connector
Miscellaneous features include:
board post-code debugger (Port Reset push button Stand-off feet table-top operation
Included Hardware
Evaluation board (baseboard processor assembly combination) 3.2-Gbyte hard disk drive pre-loaded with Real Time Operating System* 32-Mbyte SDRAM DIMM Attached fansink video graphics adapter using CHIPS* 69000 HiQVideo* Accelerator Mounting hardware cable hard disk drive
Pentium® Processor Low-Power Module
Getting Started
Software Features
software chosen facilitate development real-time applications based components used evaluation board. software tools included your described this section. Note: Software provided free vendor only licensed evaluation purposes. Customers using tools that work with Microsoft products must have licensed those products. targets created those tools should also have appropriate licenses. Software included subject change.
2.3.1
General Software, Inc.
Embedded BIOS full-featured BIOS x86-based handheld, embedded, volume consumer electronics applications. This product offers winning combination superior configurability superior embedded features. Embedded BIOS leads industry with on-target embedded features that OEMs making embedded, handheld, mobile, consumer electronics demand:
Ready*, Windows launcher Integrated BIOS-aware debugger Resident Flash Disk disk emulator disk disk emulators Manufacturing Mode in-field diagnosis software upgrades Power management that operate stand-alone environment resource management Matrix keyboard support panel drivers Console redirection over RS232 ports Flexibility boot from many disk servers OEM-configurable setup screen system Embedded DOS*-ROM (adaptation license) Total compatibility with industry standards
2.3.2
Software Systems, Ltd.
Real Time Operating System Intel Architecture.
Small memory footprint operating system with microGUI microGUI full featured graphical user interface (GUI) windowing system Photon Application Builder Development provides basic utilities build program Intel Flash Watcom C/C++ Development Suite: full featured development suite Includes compiler, assembler debugger with full support microGUI function library Makes development executables fast, easy optimized
Pentium® Processor Low-Power Module
Getting Started
Before Begin
Before configure your evaluation board, want gather some additional hardware software. Monitor standard multi-resolution monitor. setup instructions this chapter assume that using standard monitor. must ATX-type power supply. need keyboard with PS/2 style connector adapter. Optional. mouse with PS/2 style connector adapter. connect four drives floppy drive evaluation board. devices (master slave) attached each connector. will need provide cables these drives. have these storage devices attached board same time. Video Adapter Chips Technologies video adapter supplied with your kit, different adapter. evaluation board supports AGP, video cards. install correct drivers video adapters other than provided. evaluation board behaves much like standard desktop computer motherboard. Most compatible peripherals attached configured work with evaluation board. example, want install sound card network adapter.
Power Supply Keyboard Mouse Additional Drives
Other Devices Adapters
Setting Evaluation Board
Once have gathered hardware described last section, follow steps below your evaluation board. This manual assumes familiar with basic concepts involved with installing configuring hardware personal computer system. Refer Figure locations connectors, jumpers, etc. Make sure static-free environment before removing components from their anti-static packaging. evaluation board susceptible electro-static discharge damage; such damage cause product failure unpredictable operation. Inspect contents your kit. Check damage that have occurred during shipment. Contact your sales representative items missing damaged.
Caution:
Connecting wrong cable reversing cable damage evaluation board damage device being connected. Since board protective chassis, caution when connecting cables this product.
Pentium® Processor Low-Power Module
Getting Started
Figure 2-1. Evaluation Board Jumpers Connectors
Connectors Connectors
Connector
Keyboard (Top) COM1 (Top)/ /Mouse COM2 Parallel Port
LEDs
Power Connector
Floppy Connector Debugger Port
Post Code Debugger
Thermal Transfer Plate
IDE2 IDE1
Battery
Connectors
SDRAM DIMM Slots
Special Mounting Holes
Make sure board's jumpers following default locations.
installed Installed Jumper pins Jumper pins Jumper pins Jumper pins Jumper pins
Mount hardware: Table-top operation: evaluation board shipped with standoff "feet" table-top environment. These feet installed evaluation board raise table surface.Your contains bags mounting hardware. contains eight standoff feet, eight mounting screws, eight washers. Another three shorter feet that must attached slightly differently. mount eight standard feet, insert washer onto screw, then push screw through board. From below board, thread longer feet onto screw. mount three special feet, screw three shorter feet onto existing screws. Figure location three special holes.
Pentium® Processor Low-Power Module
Getting Started
Warning:
remove nuts from these three holes! This will detach processor assembly from baseboard, Intel will longer support evaluation board. evaluation board compatible, able mount board standard ATX-style chassis.
Connect desired storage devices evaluation board: evaluation board supports Primary Secondary interfaces that each host devices (master/slave). When using multiple devices, such hard disk CD-ROM drive, make sure hard disk drive jumper master position CDROM jumper slave position. When using single device with evaluation board, sure that jumpers correctly single master operation. jumper settings other configurations, consult drive's documentation. Note: evaluation board BIOS only supports hard drives Gbytes less. Installing hard disk drive included your kit: Connect hard drive's connector connector evaluation board. sure align cable connector with JP4. Connect other hard disk drive. Caution: Make sure tracer ribbon cable aligned with both hard disk connector header. Connecting cable backwards damage evaluation board hard disk. Connect hard drive power supply. Note: hard disk already formatted pre-loaded with Real-Time Operating System Intel Architecture. have make changes system BIOS enable this hard disk. Chapter "BIOS Quick Reference" more information. Floppy drive: floppy disk drive connected evaluation board most direct method loading software. Insert floppy cable into sure orient correctly). Connect other ribbon cable floppy drive. Connect power cable floppy drive. must make changes system BIOS enable this floppy disk. Chapter "BIOS Quick Reference" more information. Make sure SDRAM DIMM installed socket labeled J18. Connect PS/2 mouse keyboard (see Figure connector locations). Note: baseboard) stacked PS/2 connector. bottom connector mouse keyboard. Make sure fansink's power connector plugged into Jumper J12. Install Chips Technologies video adapter into available slots. Connect monitor cable port card.
Pentium® Processor Low-Power Module
Getting Started
Connect power supply: You'll need standard power supply. Make sure power supply unplugged turned off), then connect power supply cable power header (J11). Note: Some power supplies have on/off switch. this case remove jumper before plugging power connector. controls internal power supply on/off switch. When ready apply power, insert jumper pins 2-3. want wire this header toggle switch convenience. Turn power monitor evaluation board.When power should power-indicator LEDs light (located next power connector upper right corner board; Figure 2-1). Check that fansink thermal transfer plate processor module operating.
Configuring BIOS
General Software's BIOS software pre-loaded evaluation board. will have make changes BIOS enable hard disks, floppy disks other supported features Setup program modify BIOS settings control special features system. Setup options configured through menu-driven user interface. Chapter "BIOS Quick Reference" contains description BIOS options. BIOS updates periodically posted Intel's Developers' site http://developer.intel.com/.
Pentium® Processor Low-Power Module
Theory Operation
Block Diagram
Figure 3-1. Evaluation Board Block Diagram
Processor Assembly
(includes interposer card)
Voltage Regulator
Pentium® Processor Power
Cache
72-Bit DIMM 72-Bit DIMM
Front Side
Back Side
82443BX Host Bridge/Controller Level Shifters Clock Generator
Memory Connector
Connectors
APIC
PIIX4E
Master
Boot Flash PS/2 Mouse
Connectors
IEEE 1284 Parallel Port FDC37B78X SuperI/O* COM1 COM2
PS/2 Keyboard Floppy Drive
Pentium® Processor Low-Power Module
Theory Operation
Mechanical Design
extra protection development environment users want install evaluation board chassis. evaluation board connectors, three connectors DRAM DIMM connectors. connectors rear board defined window. Note: evaluation board does conform form factor. exceeds length requirement slightly. board into standard chassis.
System Operation
266-MHz Pentium® Processor Power Module evaluation board full-featured system board processor assembly that includes 266-MHz Pentium processor Low-Power Module with Kbytes cache Intel 82443 Host BridgeController. evaluation board contains Intel 82371EB PCI-to-ISA/IDE Xcelerator (PIIX4E) other system peripherals.
3.3.1
Pentium Processor Power
processor module processor assembly contains Pentium Processor Low-Power Module running 66/266 with 32-Kbyte code data caches.
3.3.1.1
Cache
Pentium Processor Power core's internal cache complimented with second-level cache using high-performance pipeline burst SRAM which uses dedicated high speed into processor core. cache support Mbytes system memory, while maximum amount cacheable system memory supported 443BX Host Bridge/Controller Mbytes with 16-Mbit DRAMs. Pentium Processor Low-Power Module 100-pin TQFP footprints Kbyte direct-mapped, write-back cache.
3.3.2
82443BX Host Bridge/Controller
Intel® 440BX AGPset supports Pentium processor architecture. interfaces with Pentium Processor Power system MHz. Along with Host-to-PCI bridge interface, 82443BX Host Bridge/Controller been optimized with SDRAM memory controller data path unit. 82443BX also features Accelerated Graphics Port (AGP) interface. 82443BX component includes following functions capabilities:
64-bit Power GTL+ based system data interface 32-bit system address support 64/72-bit main memory interface with optimized support SDRAM 32-bit interface with integrated arbiter interface with data transfer capability Extensive data buffering between interfaces high throughput concurrent operations
Pentium® Processor Low-Power Module
Theory Operation
3.3.2.1
System Interface
82443BX supports maximum Gbytes memory address space from processor perspective. largest address size bits. 82443BX provides control signals address paths transfers between processor bus, bus, Accelerated Graphics Port main memory. 82443BX supports 4-deep-in-order queue, which provides support pipelining four outstanding transaction requests system bus. Pentium Processor Power supports second-level cache size Kbytes with ECC. cachecontrol logic provided processor. system bus-to-PCI transfers, addresses either translated directly forwarded bus, depending address space being accessed. When access configuration space, processor cycle mapped configuration space cycle. When access memory space, processor address passed without modification bus. Certain memory address ranges dedicated graphics memory address space. When this space portion mapped main DRAM, address translated address remapping mechanism request forwarded DRAM subsystem. portion graphics aperture mapped AGP, corresponding system cycles accessing that range forwarded without translation. address defines other system cycles that forwarded AGP.
3.3.2.2
Accelerated Graphics Port (AGP) Interface
82443BX supports interface. interface maximum theoretical transfer rate ~532 Mbytes/s.
3.3.2.3
System Clocking
82443BX operates system interface MHz, transfer rate 66/133 MHz. 82443BX clocking scheme uses external clock synthesizer that produces reference clocks system interfaces. 82443BX generates DRAM clock signals. Please refer CK97 Clock Synthesizer/Driver Specification (order number 243867).
3.3.3
evaluation board populated with debugger port. port provides path debugger tools like emulators, in-target probes, logic analyzers gain access Pentium Processor Power registers signals without affecting high speed operation. This allows system operate full speed with debugger attached.
Pentium® Processor Low-Power Module
Theory Operation
3.3.4
82371EB ISA/IDE Xcelerator (PIIX4E)
82443BX designed support PIIX4E bridge. PIIX4E highly-integrated multifunctional component that supports following functions capabilities:
Revision compliant PCI-to-ISA bridge with support operations ACPI Power Management support Enhanced controller, interrupt controller timer functions Integrated controller with Ultra DMA/33 support host interface with support ports System Management (SMB) with support DIMM Serial Presence Detect
3.3.5
DRAM
evaluation board provides 168-pin DIMM module connectors. DRAM interface 64-bit data path that supports Synchronous DRAM (SDRAM). DRAM interface supports Mbytes Mbytes 4-Mbit, 16-Mbit 64-Mbit DRAM SRAM technology (both symmetrical asymmetrical). Parity supported. 32-Mbyte SDRAM DIMM included kit.
3.3.6
Power
evaluation board uses industry standard ATX-style power supply with 20-pin connector. 230-watt (minimum) supply recommended. Note that power connector keyed prevent incorrect insertion. "ATX Power Connector" page detailed description power connector. Make sure that power supply plugged into wall when connecting disconnecting from evaluation board.
3.3.7
Boot
system boot installed 2-Mbit 28F002BC flash device. system in-circuit reprogramming BIOS, flash device also socketed. This device addressable extension bus.
3.3.8
RTC/NVRAM
NVRAM contained within 82371EB PIIX4E device. CMOS NVRAM backup provided lithium-ion battery.
3.3.9
Legacy
Support legacy functions provided Intel 82371EB PIIX4E FDC37B8X SuperI/O* device.
Pentium® Processor Low-Power Module
Theory Operation
3.3.10
Support
evaluation board supports both primary secondary interface 40-pin connectors. connector labeled IDE1 primary interface. IDE2 secondary interface.
3.3.11
Floppy Disk Support
Floppy disk support provided FDC37B78X SuperI/O device. 34-pin floppy connector provided evaluation board.
3.3.12
Keyboard/Mouse
Keyboard mouse support provided FDC37B8X SuperI/O device. keyboard mouse connectors (J1) PS/2 style, 6-pin stacked miniature connectors. connector keyboard bottom connector mouse.
3.3.13
support provided through PIIX4E used through connector
3.3.14
RS232 Ports
serial ports provided FDC37B78X SuperI/O device. 9-pin RS232 connectors provided single stacked connector (J4).
3.3.15
IEEE 1284 Parallel Port
25-pin IEEE 1284 parallel port connector controlled FDC37B78X SuperI/O device provided (J3).
3.3.16
Connectors
Three industry standard 32-bit, connectors provided evaluation board. connectors designed handle either only card universal card. 3.3-V cards supported.
3.3.17
Connectors
16-bit connectors provided evaluation board.
3.3.18
Connector
support provided through 82443BX Host Bridge/Controller. industry standard connector (J13) provided evaluation board.
Pentium® Processor Low-Power Module
Theory Operation
3.3.19
Post Code Debugger
evaluation board on-board Post Code Debugger. Data from program that does write 0080H latched displayed LEDs (U12 U13). During BIOS startup, codes posted these LEDs indicate what BIOS doing. Application programs post their data these LEDs writing address 0080H.
3.3.20
Clock Generation
There three devices baseboard which generate distribute clocks used entire system. These CY2280 clock synthesizer, CY2318NZ clock buffer CY23009 zero delay buffer. these devices used this version evaluation board. CY2280 generates clocks Pentium Processor Power Module, Host Bridge/Controller, cache, PCI, bus. processor clock runs MHz. clocks MHz. This device capable spread spectrum clocking. spread spectrum clocking enabled, 0.5% down spread will introduced processor clocks. CY2318NZ clock buffer used buffer clock signals sent SDRAM DIMMS. SDRAM interface operates MHz. CY2309 Zero Delay Buffer used evaluation board.
3.3.21
Interrupt
Table 3-1. Interrupts
System Resources Channel Check Reserved, Interval Timer Reserved, Keyboard buffer full Reserved, Cascade interrupt from slave Serial Port Serial Port Parallel Port (PNP0 option) Floppy Parallel Port Real Time Clock IRQ2 Redirect Reserved. supported. Reserved. supported. Onboard Mouse Port present, else user available Reserved, Math coprocessor Primary present, else user available Reserved. supported.
Pentium® Processor Low-Power Module
Theory Operation
3.3.22
Memory
Table 3-2. Memory
Address Range (Hex) 100000-8000000 E0000-FFFFF C8000-DFFFF A0000-C7FFF 9FC00-9FFFF 80000-9FBFF 00000-7FFFF 127K 512K Size 127.25M 128K Extended Memory BIOS Available expansion BIOS area (Flash disk memory window) Off-board video memory BIOS Extended BIOS Data (movable QEMM, 386MAX) Extended conventional Conventional Description
Pentium® Processor Low-Power Module
Hardware Reference
This section provides reference information system design. Included this section connector pinout information, jumper settings, other system design information.
Processor Assembly
processor assembly contains host devices such Pentium® Processor Low-Power Module, 82443BX Host Bridge/Controller, cache, RAM. processor assembly also includes interposer card with level shifters bus, voltage regulator debugger connector. assembly connects baseboard 400-pin connector.
Warning:
processor assembly attached baseboard factory. remove processor assembly from baseboard. Intel will support processor assembly baseboard portion assembly (including processor module) removed customer.
4.1.1
Thermal Management
objective thermal management ensure that temperature each component maintained within specified functional limits. functional temperature limit range within which electrical circuits expected meet their specified performance requirements. Operation outside functional limit degrade system performance cause reliability problems. processor module contains thermal transfer plate (TTP). thermal solution should mounted this plate.
Important: evaluation contains sink attached above Pentium Processor Power. This thermal solution been tested open environment room temperature sufficient evaluation purposes only. designer provide adequate thermal management customer-derived designs. 266-MHz Pentium Processor Low-Power Module with Intel 443BX Host Bridge/Controller, cache, voltage regulator dissipates thermal design power maximum (TDP max) 13.4 when case temperature approximately maintained. processor core dissipates majority thermal power. thermal solution must designed ensure that maximum case temperature never exceeded. specified maximum ambient temperature module operation However, thermal solutions targeted operation ambient temperature range 50-70° Refer Pentium® Processor Mobile Module: Embedded Module Connector-2 Thermal Design Guide (order number 273216) more details.
4.1.2
Debugger Port
evaluation platform populated with debugger port. port provides path debugger tools like emulators, in-target probes, logic analyzers gain access Pentium processor's registers signals without affecting high speed operation. This allows system operate full speed with debugger attached.
Pentium® Processor Low-Power Module
Hardware Reference
Post Code Debugger
evaluation board on-board Post Code Debugger. Data from code that does write latched displays (U12/U13). During BIOS startup, code posted these LEDs indicate what BIOS doing. Application code post data these LEDs doing write address 80H. 22V10 code used implement this function included Appendix "PLD Code Listing."
Expansion Slots
evaluation platform three expansion slots slots.
Device Mapping
evaluation platform devices mapped device numbers connecting address line IDSEL signal each device. Table shows mapping devices.
Table 4-1. Device Mapping
Device PIIX4E Slot (J7) Slot (J8) Slot (J9) Address Line AD18 AD28 AD29 AD30 Device Number
Pentium® Processor Low-Power Module
Hardware Reference
4.5.1
Connector Pinouts
Power Connector
Table shows signals assigned style power connector.
Table 4-2. Primary Power Connector (J11)
Name PWRGD 5VSB PS_ON# Ground Ground Ground Power Good Standby Ground Soft-off control Ground Ground Ground Volts Function
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4.5.2
Debugger Connector
Table 4-3. Connector Assignment Interposer Card)
Signal RESET# DBRESET# POWERON DBINST# TRST# BSEN# Signal PREQ0# PRDY0# PREQ1# PRDY1# PREQ2# PRDY2# PREQ3# BCLK PRDY3#
4.5.3
Stacked
bottom connector. top.
Table 4-4. Connector Pinout (J2)
VCC0 D0D0+ GND0 Signals VCC1 D1D1+ GND1 Signals
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4.5.4
Mouse Keyboard Connectors
keyboard port top. mouse port bottom.
Table 4-5. Keyboard Mouse Connector Pinouts Baseboard)
Data Connect Ground (fused) Clock Connect Signal Name
4.5.5
Parallel Port
Table 4-6. DB25 Parallel Port Connector Pinout (J3)
Signal Name Strobe# Data Data Data Data Data Data Data Data ACK# Busy Paper SLCT Signal Name Auto Feed# Fault# INIT# SLCT Ground Ground Ground Ground Ground Ground Ground Ground
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4.5.6
Serial Ports
COM1 connector. COM2 bottom connector.
Table 4-7. Serial Port Connector Pinout (J4)
Serial (SIN) Serial (SOUT) Signal Name
4.5.7
Connector
Table 4-8. IDE1 (JP3) IDE2 (JP4) Connector
Signal Name Reset Host Data Host Data Host Data Host Data Host Data Host Data Host Data Host Data Ground DRQ3 Write# Read# IOCHRDY DACK3# IRQ14 Addr Addr Chip Select Activity Signal Name Ground Host Data Host Data Host Data Host Data Host Data Host Data Host Data Host Data Ground Ground Ground BALE Ground IOCS16# Ground Addr Chip Select Ground
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4.5.8
Floppy Drive Connector
Table 4-9. Diskette Drive Header Connector (JP1)
Signal Name Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Signal Name FDHDIN Reserved FDEDIN Index Motor Enable Drive Select Drive Select Motor Enable DIR# STEP# Write Data# Write Gate# Track Write Protect# Read Data# Side Select# Diskette Change#
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4.5.9
Slot Connector
Table 4-10. Slots (J7,
Signal Name PIRQ1# PIRQ3# Connect Connect Connect RST# GNT1# Reserved AD30 3.3V AD28 AD26 AD24 IDSEL 3.3V AD22 AD20 AD18 Signal Name Connect PIRQ2# PIRQ0 PRSNT1B# Connect PRSNT2B# Connect PCLK3 REQ# AD31 AD29 AD27 AD25 CBE3# AD23 AD21 AD19 Signal Name AD16 3.3V FRAME# TRDY# STOP# SDONE SBO# AD15 3.3V AD13 AD11 CBEO# REQ64# Signal Name AD17 CBE2# IRDY# DEVSEL# LOCK# PERR# SERR# 3.3V CBE1# AD14 AD12 AD10 ACK64#
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4.5.10
Slot Connector
Table 4-11. Slots (J5,
Signal Name IOCHK# IOCHRDY SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 Signal Name RSTSLOT IRQB9 Signal Name SBHE# LA23 LA22 LA21 LA20 LA19 LA18 LA17 MEMR# MEMW# SD10 SD11 SD12 SD13 SD14 SD15 Signal Name DACK2# BALE MEMCS16# IOCS16# IRQB10 IRQB11 IRQB11 IRQ15 IRQ14 DACK0 DREQ0 DACK5 DREQ5 DACK6# DREQ6 DACK7# DREQ7# MASTER#
DREQ2
-12V
ZEROWS# +12V SMEMW# SMEMR# IOW# IOR# DACK3# DREQ3 DACK1# DREQ1 REFRESH# SYSCLK IRQA7 IRQA6 IRQA5 IRQA4 IRQA3
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Connector
Table 4-12. Slot (J13)
Pin# OVRCNT# 5.0V 5.0V USB+ INTB# REQ# VCC3.3 RBF# Reserved SBA0 VCC3.3 SBA2 SB_STB SBA4 SBA6 AD31 AD29 VCC3.3 AD27 AD25 AD_STB1 AD23 TYPEDET# Reserved USBGND INTA# RST# GNT# VCC3.3 Reserved PIPE# Reserved SBA1 VCC3.3 SBA3 Reserved SBA5 SBA7 AD30 AD28 VCC3.3 AD26 AD24 Reserved C/BE3# Pin# Vddq3.3 AD21 AD19 AD17 C/BE2# Vddq3.3 IRDY# 3.3Vaux Reserved VCC3.3 DEVSEL# Vddq3.3 PERR# SERR# C/BE1# Vddq3.3 AD14 AD12 AD10 Vddq3.3 AD_STB0 Vddq3.3 Reserved Vddq3.3 AD22 AD20 AD18 AD16 Vddq3.3 FRAME# Reserved Reserved VCC3.3 TRDY# STOP# PME# AD15 Vddq3.3 AD13 AD11 C/BE0# Vddq3.3 Reserved Vddq3.3 Reserved
NOTES: Reserved pins only future A.G.P interface specification. IDSEL# A.G.P. connector. A.G.P. graphics components should connect AD16 signal volt IDSEL# function internal component. volt cards leave TYPEDET signal open. volt cards this signal hard ground.
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Jumpers
Table 4-13 shows default Jumper settings.
Table 4-13. Default Jumper Settings
Jumper Function Enable Spread Spectrum Clocking Clock Frequency Selection Settings Enable Spread Spectrum Disable Spread Spectrum (Default) Processor Clock (Default) Reserved Reserved On/Off (Default) Jumper Installed Flash BIOS Select Flash BIOS boot block control SMI# Source CMOS Clear (Default) (Default) SMI# controlled IOAPIC SMI# controlled PIIX4E (Default) Normal Operation (Default) Clear CMOS
4.7.1
Enable Spread Spectrum Clocking (J14)
This jumper used enable disable spread spectrum clocking clock synthesizer. When this jumper 0.5% down spread will introduced into clocks. default setting jumper installed, which disables spread spectrum clocking.
4.7.2
Clock Frequency Selection (J15)
This jumper controls frequency processor clock. When jumper operation supported. This only setting supported this evaluation kit.
Caution:
Leave this jumper installed. When jumper out, processor clocks will generated. This position supported cause damage processor.
4.7.3
On/Off (J20)
This jumper used control state power supply. When this jumper removed, power supply will turned off. Placing jumper position will turn power supply position reserved should used.
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4.7.4
Flash BIOS Select (J21)
This jumper controls voltage presented flash BIOS pin. position supplies default normal operation. This position inhibits programming erasing flash BIOS. position supplies should only used directed utility that used reprogram BIOS.
4.7.5
Flash BIOS Boot Block Control (J22)
This jumper controls Boot Block protection Flash BIOS. When this jumper position, boot block locked cannot programmed. This default position this jumper. position unlocks boot block that erased reprogrammed. This position should only used under direction utility that designed reprogram boot block flash device.
4.7.6
SMI# Source Control (J23)
This jumper selects source SMI# interrupt processor. Only position which selects PIIX4E supported. position reserved future use.
4.7.7
CMOS Clear (J24)
This jumper controls power battery backed-up CMOS RAM. This used store information about system configuration that required BIOS. position normal operation. position allows cleared. clear perform following steps: Remove power from evaluation platform removing jumper Move 2-3. Disconnect power supply (J11). Install position. Reconnect power supply (J11). Reboot system enter BIOS setup screen configure system.
4.7.8
Push Button Switches
There push button switches evaluation board labeled
non-functional reserved future use. reset button. Press force hardware reset system.
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In-Circuit BIOS Update
BIOS upgraded in-circuit. BIOS updates periodically posted Intel's Developers' site http://www.intel.com/design/. reprogram BIOS: Jumper Jumper position evaluation platform. Download BIOS upgrade file from Intel's Developers' site. Extract BIOS upgrade file onto bootable floppy. Insert floppy disk into floppy drive attached evaluation board. Reboot evaluation board that boots from floppy. Follow on-screen instructions. When BIOS update program finished, power down board reset jumpers position.
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BIOS Quick Reference
Pentium® Processor Low-Power Module evaluation board licensed with single copy Embedded BIOS Embedded software from General Software, Inc.1 This software provided demonstration purposes only must licensed directly from General Software, Inc. integration with designs. General Software reached (800) 850-5755, http://www.gensw.com, email sales@gensw.com. BIOS updates periodically posted Intel Developers' site http://developer.intel.com/.
BIOS Pre-Boot Features
system's pre-boot environment managed with adaptation Embedded BIOS from General Software. pre-boot environment includes POST, Setup Screen System, Manufacturing Mode, Console Redirection, Windows Loader Ready), Integrated BIOS Debugger. REFLASH tool also available update BIOS image with builds Embedded BIOS that obtained from General Software. Before using system, please read following properly configure CMOS settings, learn embedded features pre-boot firmware, Embedded BIOS. last sections this chapter provide BIOS POST Codes Beep codes.
Power-On Self-Test (POST)
When system powered Embedded BIOS tests initializes hardware programs chipset other peripheral components. During this time, POST progress codes written system BIOS port 80H, allowing user monitor progress with special monitor. "Embedded BIOS POST Codes" page 5-12 lists POST codes their meanings. During early POST, video available display error messages should critical error encountered; therefore, POST uses beeps speaker indicate failure critical system component during this time. Consult "Embedded BIOS Beep Codes" page 5-15 list Beep codes used system's BIOS. POST displays progress system video device, which video screen card used, terminal emulation program's screen output redirected over serial port.
General SoftwareTM, Logo, Embedded BIOSTM, BIOStartTM, CE-ReadyTM, Embedded DOSare trademarks registered trademarks General Software, Inc.
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Figure 5-1. BIOS POST Pre-Boot Environment
When system powered first time, you'll need configure system through Setup Screen System (described later) before peripherals, such disk drives, recognized BIOS. information written battery-backed CMOS board's Real Time Clock. Should board's battery fail, this information will lost board will need reconfigured. OEMs modify look-and-feel POST with Embedded BIOS adaptation kit. While demonstration BIOS looks feels like desktop possible eliminate messages, sounds, delays, make POST effectively invisible.
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Setup Screen System
system configured from within Setup Screen System, which series menus that invoked from POST pressing <DEL> main keyboard being used, pressing console being redirected terminal program.
Figure 5-2. Embedded BIOS Setup Screen Menu
Once Setup Screen System (Figure 5-2), user navigate with DOWN arrow keys from main console, keys from remote terminal program accomplish same thing. ENTER used advance next field, keys cycle through values, such those Basic Setup Screen, Diagnostics Setup Screen.
5.3.1
Basic CMOS Configuration Screen
system's drive types, boot activities, POST optimizations configured from Basic Setup Screen (Figure 5-3). order disk drives with your system, must select appropriate assignments drive types left-hand column. Then, using true floppy drives (not memory disks that emulate these drives), need configure drive types themselves Floppy Drive Types Drive Geometry sections. Finally, you'll need configure boot sequence middle screen. Once these selections have been made, your system ready use.
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Figure 5-3. Embedded BIOS Basic Setup Screen
5.3.2
Configuring Drive Assignments
Embedded BIOS allows user different file system each drive letter. BIOS allows file systems each floppy (Floppy0 Floppy1), each drive (Ide0, Ide1, Ide2, Ide3), memory disks when configured (Flash0, ROM0, RAM0, etc.) Figure shows first floppy drive (Floppy0) assigned drive system, then first drive (Ide0) assigned drive system. switch floppy disks around hard disks around, just Floppy0 Floppy1 hard disks Ide0 Ide1
Caution:
Take care skip drive when making floppy disk assignments, well drive when making hard disk assignments. first floppy should first hard drive should Also, assign same file system more than drive letter. Thus, Floppy0 should used both BIOS permits this allow embedded devices alias drives, desktop operating systems able maintain cache coherency with such mapping place. special field this section entitled "Boot Method: (Windows CE/Boot Sector)" used configure Ready feature BIOS. normal booting (DOS, Windows etc.), select "Boot Sector" "Unused".
5.3.2.1
Configuring Floppy Drive Types
true floppy drive file systems (and their emulators, such ROM, RAM, flash disks) mapped drive letters, then floppy drives themselves must configured this section. Floppy0 refers first floppy disk drive drive ribbon cable (normally drive A:), Floppy1 refers second drive (drive B:).
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5.3.3
Configuring Drive Types
true disk file systems (and their emulators, such ROM, RAM, flash disks) mapped drive letters, then drives themselves must configured this section. following table shows drive assignments Ide0-Ide3:
Table 5-1. IDE0-IDE3 Drive Assignments
File System Name Ide0 Ide1 Ide2 Ide3 Controller Primary (1f0h) Primary (1f0h) Secondary (170h) Secondary (170h) Master/Slave Master Slave Master Slave
primary master drive your system (the typical case), just configure Ide0 this section, Ide0 drive Configuring Drive Assignments section. Drive Types section lets select type each four drives: None, User, Physical, LBA, CHS. User This type allows user select maximum cylinders, heads, sectors track associated with drive. This method rarely used since common use. This type instructs BIOS query drive's geometry from controller each POST. translation drive's geometry performed, this type limited drives Mbytes less. Commonly, this used with embedded Cards. This type instructs BIOS query drive's geometry from controller each POST, then translate geometry according industrystandard convention. This supports 16-Gbyte drives. this method drives. This type instructs BIOS query drive's geometry from controller each POST, then translate geometry according Phoenix convention. Using this type drive previously formatted with Physical geometry might show data being missing corrupted.
Physical
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Configuring Boot Actions
Embedded BIOS supports different user-defined steps boot sequence. When entire system been initialized, POST executes these steps order until operating system successfully loads. addition, other pre-boot features before, after, between operating system load attempts. following actions used: Drive Boot operating system from specified drive. "Loader" "BootRecord" "Unused", then standard boot record will invoked, causing DOS, Windows95/98, Windows other industry-standard operating systems load. "Boot Method" "Windows CE", then boot drive's boot record will used, instead BIOS will attempt load execute Windows Kernel file, NK.BIN, from root directory each boot device. Launch Integrated BIOS Debugger. return boot process from debugger environment, type debugger prompt press ENTER. Initiate Manufacturing Mode, allowing system configured remotely RS232 connect host computer. Execute ROM-resident copy Windows available. This feature applicable unless properly configured BIOS adaptation. Execute ROM-resident copy DOS, available. This feature applicable unless copy DOS, such Embedded DOS-ROM, been stored BIOS boot ROM. Copies Embedded DOS-ROM obtained from General Software. action; POST proceeds next activity sequence.
Debugger MFGMODE WindowsCE
None
Custom Configuration Setup Screen
system's hardware-specific features configured with Custom Setup Screen (Figure 5-4). features straightforward except Redirect Debugger option, which extra embedded feature that allows user select whether Integrated BIOS Debugger should standard keyboard video RS232 console redirection interaction with user. video available, debugger always redirected.
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Figure 5-4. Embedded BIOS Custom Setup Screen
Shadow Configuration Setup Screen
system's Shadow Configuration Setup Screen (Figure 5-5) allows selective enabling disabling shadowing Kbyte sections, except Kbytes BIOS ROM, which shadowed unit. Normally, shadowing should enabled C000/C400 enhance BIOS performance), then E000-F000 should shadowed maximize system BIOS performance.
Figure 5-5. Embedded BIOS Shadow Setup Screen
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Standard Diagnostics Routines Setup Screen
Embedded systems require automated burn-in testing development cycle. This facility provided directly system's system BIOS through Standard Diagnostics Routines Setup Screen (Figure 5-6). system, selectively enable disable features tested, then enable "Tests Begin ESC?" option cause system test suite invoked. repeat system test battery continuously, should also enable "Continuous Testing" option. When continuous testing started, system will continue until error encountered.
Caution:
disk diagnostics perform write operations those drives; therefore, only spare drives should used which contain data that could harmed test. keyboard test fail when fact hardware operating within reasonable limits. This because although device produce occasional errors, BIOS retries operations when failures occur during normal operation system.
Caution:
Figure 5-6. Standard Diagnostic Routines Setup Screen
Start System BIOS Debugger Setup Screen
Embedded BIOS Integrated Debugger invoked from Setup Screen main menu, well boot activity. Once invoked, debugger will display debugger prompt: EB42DBG: await debugger commands. resume back Setup Screen main menu, type following command, which instructs debugger "go": EB42DBG: <ENTER>
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Start RS232 Manufacturing Link Setup Screen
Embedded BIOS Manufacturing Mode invoked from Setup Screen main menu, well boot activity. Once invoked, Manufacturing Mode takes over system freezes console system (Figure 5-7). host resume operation system give control back system Setup Screen system with special control software.
Figure 5-7. Start RS232 Manufacturing Link Setup Screen
5.10
Manufacturing Mode
system's BIOS provides special mode, called Manufacturing Mode, that allows target controlled host computer such laptop desktop Running special software supplied General Software, host access target's drives manage file systems target, reprogram flash memories, test target hardware. full discussion uses Manufacturing Mode beyond scope this chapter. Complete documentation host-side software available directly from General Software. more information, visit General Software site http://www.gensw.com.
5.10.1
Console Redirection
system operate either with standard PC/AT PS/2 keyboard video monitor, with special emulation console over RS232 cable connected host computer running terminal program. example session with HYPERTERMINAL, debugger section's screen display (Figure 5-9). Console Redirection feature, simply remove video display card from system that video available BIOS detect. absence video support, BIOS automatically switches keyboard screen functions serial over COM1 board. hardware connection host computer requires null modem cable.
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software target terminal emulation program that supports ANSI terminal mode, using 9600 baud, parity, stop (Note: This modified during BIOS adaptation.) program must flow control, console seem stall accept input. Caution: HYPERTERMINAL's default setting flow control, which will render console inoperative. change this, create session, change flow control setting "none", save session, exit HYPERTERMINAL. Then reinvoke HYPERTERMINAL with session will operate with flow control setting.
5.10.2
CE-Ready Windows Loader
Your system's BIOS "CE-Ready" directly boot Windows without loading intermediate operating system such LOADCEPC. Instead, NK.BIN file placed disk drive drive emulator, then BIOS configured through Basic CMOS Configuration Setup Screen boot NK.BIN file from boot drives instead boot records those drives. configure your system boot Windows natively from disk drive, "Boot Method" field "Windows Basic CMOS Configuration Setup Screen. Then, place copy NK.BIN suitable execution LOADCEPC root directory your normal boot drive, such drive Then, reboot system. configuration should displayed (Figure 5-8), immediately following should message "Loading Windows CE." followed series dots, indicating that loading process continuing. Once fully loaded, Windows takes over system runs using standard keyboard, screen, PS/2 mouse.
Figure 5-8. CE-Ready Boot Feature
5.10.3
Integrated BIOS Debugger
system's BIOS contains built-in debugger that valuable tool board bringup process designs similar evaluation board. supports SYMDEB-style command line interface, used main console's keyboard screen, over redirected connection terminal program (see "Console Redirection" page 5-9).
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activate debugger time from main console, press left shift control keys together. display similar HYPERTERMINAL session below (Figure 5-9) will appear, containing title, "Embedded BIOS Debugger Breakpoint Trap" snapshot processor general registers. Figure 5-9. Integrated BIOS Debugger Running Over Remote Terminal
leave debugger resume interrupted activity (whether POST, BIOS, DOS, Windows, application program), enter command (short "go") press ENTER. were prompt when entered debugger, then will still waiting command, will prompt again until press ENTER again. debugger also entered from Setup Screen System, boot activity (see "Basic CMOS Configuration Screen" page 5-3), last ditch effort during board bring-up development bootable device available. your version DOS, application, OEM-supplied BIOS extensions have debugging code (i.e., "INT instructions) remaining, then these will invoke debugger automatically, although this error. continue, command. When Embedded BIOS adapted OEM, debugger removed from final production BIOS, superfluous debugging code application will cause debugger invoked.
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BIOS Quick Reference
complete discussion debugger beyond scope this chapter; however, complete documentation available from General Software http://www.gensw.com.
5.11
Embedded BIOS POST Codes
Embedded BIOS writes progress codes, also known POST codes, port during POST, order provide information developers about system faults. These POST codes monitored on-board Post Code Debugger located U13. They displayed screen. more information about POST codes, contact General Software.
Mnemonic Code POST_STATUS_START POST_STATUS_CPUTEST POST_STATUS_DELAY POST_STATUS_DELAYDONE POST_STATUS_KBDBATRDY POST_STATUS_DISABSHADOW POST_STATUS_CALCCKSUM POST_STATUS_CKSUMGOOD POST_STATUS_BATVRFY POST_STATUS_KBDCMD POST_STATUS_KBDDATA POST_STATUS_BLKUNBLK POST_STATUS_KBDNOP POST_STATUS_SHUTTEST POST_STATUS_CMOSDIAG POST_STATUS_CMOSINIT POST_STATUS_CMOSSTATUS POST_STATUS_DISABDMAINT POST_STATUS_DISABPORTB POST_STATUS_BOARD POST_STATUS_TESTTIMER POST_STATUS_TESTTIMER2 POST_STATUS_TESTTIMER1 POST_STATUS_TESTTIMER0 POST_STATUS_MEMREFRESH POST_STATUS_TESTREFRESH POST_STATUS_TEST15US POST_STATUS_TEST64KB POST_STATUS_TESTDATA POST_STATUS_TESTADDR POST_STATUS_TESTPARITY POST_STATUS_TESTMEMRDWR POST_STATUS_SYSINIT POST_STATUS_INITVECTORS POST_STATUS_8042TURBO POST_STATUS_POSTTURBO POST_STATUS_POSTVECTORS POST_STATUS_MONOMODE POST_STATUS_COLORMODE POST_STATUS_TOGGLEPARITY POST_STATUS_INITBEFOREVIDEO
Code
System Progress Report Start POST (BIOS executing). Start register test. Start power-on delay. Power-on delay finished. Keyboard finished. Disable shadowing cache. Compute CRC, wait KBC. okay, ready. Verifying command Start command. Start data. Start 23,24 blocking unblocking. Start command. Test CMOS shutdown register. Check CMOS checksum. Initialize CMOS contents. Initialize CMOS status date/time. Disable DMA, PICs. Disable Port video display. Initialize board, start memory bank detection. Start timer tests. Test 8254 speaker, port Test 8254 refresh. Test 8254 18.2Hz. Start memory refresh. Test memory refresh. Test 15usec refresh ON/OFF time. Test base 64KB memory. Test data lines. Test address lines. Test parity (toggling). Test Base 64KB memory. Prepare system initialization. Initialize vector table. Read 8042 turbo switch setting. Initialize turbo data. Modification IVT. Video monochrome mode verified. Video color mode verified. Toggle parity before video test. Initialize before video check.
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POST_STATUS_VIDEOROM POST_STATUS_POSTVIDEO POST_STATUS_CHECKEGAVGA POST_STATUS_TESTVIDEOMEMORY POST_STATUS_RETRACE POST_STATUS_ALTDISPLAY POST_STATUS_ALTRETRACE POST_STATUS_VRFYSWADAPTER POST_STATUS_SETDISPMODE POST_STATUS_CHECKSEG40A POST_STATUS_SETCURSOR POST_STATUS_PWRONDISPLAY POST_STATUS_SAVECURSOR POST_STATUS_BIOSIDENT POST_STATUS_HITDEL POST_STATUS_VIRTUAL POST_STATUS_DESCR POST_STATUS_ENTERVM POST_STATUS_ENABINT POST_STATUS_CHECKWRAP1 POST_STATUS_CHECKWRAP2 POST_STATUS_HIGHPATTERNS POST_STATUS_LOWPATTERNS POST_STATUS_FINDLOWMEM POST_STATUS_FINDHIMEM POST_STATUS_CHECKSEG40B POST_STATUS_CHECKDEL POST_STATUS_CLREXTMEM POST_STATUS_SAVEMEMSIZE POST_STATUS_COLD64TEST POST_STATUS_COLDLOWTEST POST_STATUS_ADJUSTLOW POST_STATUS_COLDHITEST POST_STATUS_REALMODETEST POST_STATUS_ENTERREAL POST_STATUS_SHUTDOWN POST_STATUS_DISABA20 POST_STATUS_CHECKSEG40C POST_STATUS_CHECKSEG40D POST_STATUS_CLRHITDEL POST_STATUS_TESTDMAPAGE POST_STATUS_VRFYDISPMEM POST_STATUS_TESTDMA0BASE POST_STATUS_TESTDMA1BASE POST_STATUS_CHECKSEG40E POST_STATUS_CHECKSEG40F POST_STATUS_PROGDMA POST_STATUS_INITINTCTRL POST_STATUS_STARTKBDTEST POST_STATUS_KBDRESET POST_STATUS_CHECKSTUCKKEYS POST_STATUS_INITCIRCBUFFER POST_STATUS_CHECKLOCKEDKEYS POST_STATUS_MEMSIZEMISMATCH POST_STATUS_PASSWORD
Passing control video ROM. Control returned from video ROM. Check EGA/VGA adapter. EGA/VGA found, test video memory. Scan video retrace signal. Primary retrace failed. Alternate found. Verify video switches. Establish display mode. Initialize BIOS data area. cursor power-on msg. Display power-on message. Save cursor position. Display BIOS identification string. Display "Hit <DEL> message. Prepare protected mode test. Prepare descriptor tables. Enter virtual mode memory test. Enable interrupts diagnostics mode. Initialize data memory wrap test. Test wrap, find total memory size. Write extended memory test patterns. Write conventional memory test patterns. Find memory size from patterns. Find high memory size from patterns. Verify BIOS data area again. Check <DEL> pressed. Clear extended memory soft reset. Save memory size. Cold boot: Display 64KB memtest. Cold boot: Test memory. Adjust memory size EBDA usage. Cold boot: Test high memory. Prepare shutdown real mode. Return real mode. Shutdown successful. Disable line. Check BIOS data area again. Check BIOS data area again. Clear "Hit <DEL>" message. Test page register file. Verify from display memory. Test DMA0 base register. Test DMA1 base register. Checking BIOS data area again. Checking BIOS data area again. Program controllers. Initialize PICs. Start keyboard test. Issue reset command. Check stuck keys. Initialize circular buffer. Check locked keys. Check memory size mismatch. Check password bypass setup.
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BIOS Quick Reference
POST_STATUS_BEFORESETUP POST_STATUS_CALLSETUP POST_STATUS_POSTSETUP POST_STATUS_DISPPWRON POST_STATUS_DISPWAIT POST_STATUS_ENABSHADOW POST_STATUS_STDCMOSSETUP POST_STATUS_MOUSE POST_STATUS_FLOPPY POST_STATUS_CONFIGFLOPPY POST_STATUS_IDE POST_STATUS_CONFIGIDE POST_STATUS_CHECKSEG40G POST_STATUS_CHECKSEG40H POST_STATUS_SETMEMSIZE POST_STATUS_SIZEADJUST POST_STATUS_INITC8000 POST_STATUS_CALLC8000 POST_STATUS_POSTC8000 POST_STATUS_TIMERPRNBASE POST_STATUS_SERIALBASE POST_STATUS_INITBEFORENPX POST_STATUS_INITNPX POST_STATUS_POSTNPX POST_STATUS_CHECKLOCKS POST_STATUS_ISSUEKBDID POST_STATUS_RESETID POST_STATUS_TESTCACHE POST_STATUS_DISPSOFTERR POST_STATUS_TYPEMATIC POST_STATUS_MEMWAIT POST_STATUS_CLRSCR POST_STATUS_ENABPTYNMI POST_STATUS_INITE000 POST_STATUS_CALLE000 POST_STATUS_POSTE000 POST_STATUS_DISPCONFIG POST_STATUS_INT19BOOT POST_STATUS_LOWMEMEXH POST_STATUS_EXTMEMEXH POST_STATUS_PCIENUM
0a0h 0a1h 0a2h 0a3h 0a4h 0a5h 0a6h 0a7h 0a8h 0a9h 0b0h 0b1h 0b2h 0b3h
Password accepted. Entering setup system. Setup system exited. Display power-on screen message. Display "Wait." message. Shadow system video BIOS. Load standard setup values from CMOS. Test initialize mouse. Test floppy disks. Configure floppy drives. Test hard disks. Configure drives. Checking BIOS data area. Checking BIOS data area. base extended memory sizes. Adjust memory size EBDA. Initialize before calling C800h ROM. Call BIOS extension C800h. C800h extension returned. Configure timer/printer data. Configure serial port base addresses. Prepare initialize coprocessor. Initialize numeric coprocessor. Numeric coprocessor initialized. Check settings. Issue keyboard command. flag reset. Test cache memory. Display soft errors. keyboard typematic rate. Program memory wait states. Clear screen. Enable parity NMIs. Initialize before calling E000h. Call BIOS extension E000h. extension returned. Display system configuration box. Call bootstrap loader. Test memory exhaustively. Test extended memory exhaustively. Enumerate busses.
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5.12
Embedded BIOS Beep Codes
Embedded BIOS tests much system hardware early POST before messages displayed screen. When system failures encountered these early stages, POST uses beep codes sequence tones speaker) identify source error. following comprehensive list POST beep codes system BIOS. BIOS extensions, such ROMs SCSI adapter ROMs, their beep codes, including short/long sequences, possibly beep codes that sound like ones below. When diagnosing system failure, remove these adapters possible before making final determination actual POST test that failed.
Mnemonic Code POST_BEEP_REFRESH POST_BEEP_PARITY POST_BEEP_BASE64KB POST_BEEP_TIMER POST_BEEP_CPU POST_BEEP_GATEA20 POST_BEEP_DMA POST_BEEP_VIDEO POST_BEEP_KEYBOARD POST_BEEP_SHUTDOWN POST_BEEP_CACHE POST_BEEP_BOARD POST_BEEP_LOWMEM POST_BEEP_EXTMEM POST_BEEP_CMOS POST_BEEP_ADDRESS_LINE POST_BEEP_DATA_LINE POST_BEEP_INTERRUPT POST_BEEP_PASSWORD
Beep CountDescription Problem Memory refresh working. Parity error found 64KB memory. Memory test 64KB failed. timer test failed. test failed. Gate test failed. page/base register test failed. Video controller test failed. Keyboard test failed. CMOS shutdown register test failed. External cache test failed. General board initialization failed. Exhaustive memory test failed. Exhaustive extended memory test failed. CMOS restart byte test failed. Address line test failed. Data line test failed. Interrupt controller test failed. Incorrect password used access SETUP.
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Code Listing
code listing below 22V10 PLD.
TITLE PATTERN REVISION AUTHOR COMPANY DATE
22V10 PORT ADDRESS DECODER FLASH DECODE CHRIS BANYAI INTEL CORPORATION 10/1/97
OPTIONS SECURITY
part 22V10FN before conversion CHIP P80B iPLD22V10N [6:7] [9:13] [5:4] [26:23] [21:20] IOWR_BAR SA[0:1] SA[2:6] SA[8:9] SA[19:16] SA[15:14] /CS_BAR /CS_DOC
EQUATIONS CS_BAR /IOWR_BAR /AEN /SA0 /SA1 /SA2 /SA3 /SA4 /SA5 /SA6 /SA8 /SA9 CS_BAR.TRST CS_DOC /SEL /AEN SA19 SA18 /SA17 /SA16 SA15 /SA14 /AEN SA19 SA18 /SA17 SA16 /SA15 /SA14 CS_DOC.TRST /IOWR_BAR OX.TRST SIMULATION SETF SETF SETF SETF /AEN /SA0 /SA1 /SA2 /SA3 /SA4 /SA5 /SA6 /SA7 /SA8 /SA9 IOWR_BAR IOWR_BAR /IOWR_BAR IOWR_BAR
Pentium® Processor Low-Power Module
Code Listing
SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF SETF
/IOWR_BAR /AEN IOWR_BAR /IOWR_BAR /SA0 /IOWR_BAR IOWR_BAR /SA0 /SA1 /SA2 /SA3 /SA4 /SA5 /SA6 /SA7 /SA8 /SA9 /SA19 /SA18 /SA17 /SA16 /SA15 /SA14 /SEL SA19 SA18 /SA17 /SA16 SA15 /SA14 /SEL /AEN /SA19 SA19 /SA18 SA18 SA17 /SA17 SA16 /SA16 /SA15 SA15 SA14 /SA14 /SEL SA19 SA18 /SA17 SA16 /SA15 /SA14 /SEL /AEN /SA19 SA19 /SA18 SA18 SA17 /SA17 /SA16 SA16 SA15 /SA15 SA14 /SA14 /SEL
Pentium® Processor Low-Power Module
Index
defined 440BX AGPset 82371EB Xcelerator (PIIX4E) 2-1, 82443BX Host Bridge/Controller
DIMM installing Documents online DRAM Drive assignments
Address size connector 3-5, 4-10 support 2-1, 3-2, power connector
Embedded BIOS 2-3, Embedded BIOS Integrated Debugger Embedded BIOS Manufacturing Mode Expansion slots
Beep codes 5-1, 5-15 BIOS Basic Setup Screen configuring Configuring floppy drives Configuring drives console redirection Custom Setup Screen Drive assignments Integrated BIOS debugger 5-10 Setup Screen System Shadow Configuration Setup Screen Standard Diagnostics Routines Setup Screen BIOS updates 4-13 Block diagram Boot
Floppy connector Floppy drive 2-4, installing
General Software, Inc.
Hard disk installing
CD-ROM drive Clock synthesizer Clocking Connectors connector keyboard mouse J11, power connector J13, connector 4-10 connector parallel port serial ports JP1, floppy connector JP4/JP3, connector I/O, legacy support connectors (JP3, JP4) interface Installation Instructions, notational conventions Interposer card connectors connector Debugger connector debugger port
Jumpers default settings 4-11
Pentium® Processor Low-Power Module
Index-1
J14, enable spread spectrum clocking 4-11 J15, clock frequency selection 4-11 J20, on/off 4-11 J21, flash BIOS select 4-12 J22, flash BIOS boot block control 4-12 J23, SMI# source control 4-12 J24, CMOS clear 4-12
Serial ports 3-5, Setup instructions Signals, notational conventions Software Features
Keyboard 2-4, 3-5, contents
Technical support
Measurements, defined Mechanical Design Memory address space Memory interface Memory Mouse 2-4, 3-5,
Units measure, defined connector support
Notational conventions NVRAM
Video Adapter
Online help
Windows 5-10 World Wide www.intel.com
Parallel port 3-5, connectors Pentium® Processor Mobile Module Post Code Debugger 3-6, POST codes 5-1, 5-12 Power connector Power LEDs Power supply 2-4, connecting Power-on Self Test (POST) Product literature, ordering
Real-Time Operating System Software Systems, Ltd.
Index-2
Pentium® Processor Low-Power Module
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