Notice: 8xC51FX 8xC51 contain design defects errors known errata which

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8xC51FX 8xC51
Notice: 8xC51FX 8xC51 contain design defects errors known errata which cause product deviate from published specifications. Current characterized errata documented this specification update. Order Number: 272871-002
Information this document provided connection with Intel products. license, express implied, estoppel otherwise, intellectual property rights granted this document. Except provided Intel's Terms Conditions Sale such products, Intel assumes liability whatsoever, Intel disclaims express implied warranty, relating sale and/or Intel products including liability warranties relating fitness particular purpose, merchantability, infringement patent, copyright other intellectual property right. Intel products intended medical, life saving, life sustaining applications. Intel make changes specifications product descriptions time, without notice. 8xC51FX 8xC51 contain design defects errors known errata which cause product deviate from published specifications. Current characterized errata available request. Contact your local Intel sales office your distributor obtain latest specifications before placing your product order. Copies documents which have ordering number referenced this document, other Intel literature obtained calling 1-800-548-4725 visiting Intel's website http://www.intel.com. Copyright© Intel Corporation, 2000 *Other brands names property their respective owners.
8xC51FX 8xC51 Specification Update
Contents
Revision History Preface. Summary Table Changes. Identification Information. Errata Specification Changes Specification Clarifications Documentation Changes
8xC51FX 8xC51 Specification Update
8xC51FX 8xC51 Specification Update
Revision History
Date 11/09/2000 07/01/96 Version Description Removed 83C51FB 83C51FC from list core products page This Specification Update document. contains identified errata published prior this date.
Title Specification Update
Preface
Preface
July, 1996, Intel's Computing Enhancement Group consolidated available historical device documentation errata into this document type called Specification Update. have endeavored include documented errata consolidation process, however, make representations warranties concerning completeness Specification Update. This document update specifications contained Affected Documents/Related Documents table below. This document compilation device documentation errata, specification clarifications changes. intended hardware system manufacturers software developers applications, operating systems, tools. Information types defined Nomenclature consolidated into specification update longer published other documents. This document also contain information that previously published.
Affected Documents/Related Documents
Title Order 270646 272383
Embedded Microcontrollers MCS®51 Microcontroller Family User's Manual
Nomenclature
Errata design defects errors. These cause Product Name's behavior deviate from published specifications. Hardware software designed used with given stepping must assume that errata documented that stepping present devices. Specification Changes modifications current published specifications. These changes will incorporated release specification. Specification Clarifications describe specification greater detail further highlight specification's impact complex design situation. These clarifications will incorporated release specification. Documentation Changes include typos, errors, omissions from current published specifications. These will incorporated release specification. Note: Errata remain specification update throughout product's lifecycle, until particular stepping longer commercially available. Under these circumstances, errata removed from specification update archived available upon request. Specification changes, specification clarifications documentation changes removed from specification update when appropriate changes made appropriate product specification user documentation (datasheets, manuals, etc.).
Title Specification Update
Summary Table Changes
Summary Table Changes
following table indicates errata, specification changes, specification clarifications, documentation changes which apply Product Name product. Intel some errata future stepping component, account other outstanding issues through documentation specification changes noted. This table uses following notations:
Codes Used Summary Table
Stepping
mark) (Blank box): Errata exists stepping indicated. Specification Change Clarification that applies this stepping. This erratum fixed listed stepping specification change does apply listed stepping. Page location item this document. Document change update will implemented. This erratum intended fixed future step component. This erratum been previously fixed. There plans this erratum. Plans this erratum under evaluation. Change left table indicates this erratum either modified from previous version document.
Page
(Page):
Status
Doc: Fix: Fixed: NoFix: Eval:
Title Specification Update
Summary Table Changes
Errata
Steppings None this revision this specification update. Page Status Errata
Specification Changes
Steppings None this revision this specification update. Page Status Specification Changes
Specification Clarifications
Steppings FX-Core ROM/EPROM Program Lock Differences Programming Differences between FX-Core FX-Core Change Proper 8XC51FX Encryption Array Usage Page Status Specification Clarifications
Documentation Changes
Document Revision Page Status Documentation Changes None this revision this specification update.
Title Specification Update
Identification Information
Identification Information
Markings
Marked with identifier FPO# core material. Example: LxxxxxxxA
Title Specification Update
Errata
Errata
None this revision this specification update.
Title Specification Update
Specification Changes
Specification Changes
None this revision this specification update.
Title Specification Update
Specification Clarifications
Specification Clarifications
Problem:
FX-Core ROM/EPROM Program Lock Differences
There have been number questions regarding differences between EPROM program lock schemes FX-core devices. ROM/EPROM products have program lock 64-byte encryption array. Line
table below indicates degree code protection available with enabled. features lines three four available ROM/EPROM devices.
invoke lock features, customer must submit encryption table along with code, lock programmed factory. following file naming convention should used: Program Code filename.HEX Encryption Array filename.KEY encryption array must bytes. customer submits encryption file, lock will
automatically programmed factory. lock feature available without encryption array file.
EPROM/OTP devices have three program lock bits 64-byte encryption array. table below describes security features each bit. features enabled programming appropriate bit. customer responsible programming array well lock bits invoke protection desired. Erasing EPROM also erases encryption array program lock bits, returning part full functionality.
Program Lock Bits program lock features enabled. (Code verify will still encrypted encryption array programmed.) MOVC instructions executed from external program memory disabled from fetching code bytes from internal memory, sampled latched reset, further programming EPROM disabled. Same also verify disabled. Same also external execution disabled Protection Type
Title Specification Update
Specification Clarifications
Problem:
Programming Differences between FX-Core FX-Core
From programming perspective, FX-core products incompatible with FX-core products.
There reasons this. First, wanted take advantage FX-cores advanced micron process technology's ability program EPROM cells faster. This process allows floating gate EPROM cell charged same potential fifth time. customers reduce programming time while maintaining same quality level. Second, increased protection EPROM array doubling encryption array adding third lockbit. Below summary differences between FX-core FX-core products.
Extended Encryption Array
FX-core 64-byte encryption array (0-3FH); non-FX byte encryption array (0-1FH). Additional Lockbit FX-core program lockbits; non-FX only two. When third programmed, external execution disabled.
Modified Quick Pulse
FX-core programmed with only five 100-us pulses; non-FX needs pulses. Additional Signature Byte FX-core signature bytes, located 30H, 31H, 60H; non-FX only signature bytes, located 31H.
Mode
FX-core control (P3.3); this required FX-core devices.
Quick Pulse Modified Quick Pulse Quick Pulse programming algorithm developed several years permit EPROM programming with lower voltage (12.75 volts), shorter programming pulse. Quick Pulse algorithm requires each location programmed have ALE/PROG# pulsed times with each pulse being 100us duration. This allows Intel MCS(R) controller with 8-Kbyte EPROM programmed approximately seconds. Modified Quick Pulse algorithm improvement, cutting programming time significantly. Rather than pulsing ALE/PROG# times each location, pulsed only five times. Since pulse width remains same, programming time Intel 8-Kbyte EPROM controller five seconds. following table identifies correct algorithm used each product. FX-core device cannot reliably programmed using Modified Quick Pulse algorithm because number programming pulses reduced. addition, FX-core devices using Modified Quick Pulse algorithm require additional control signal P3.3 mentioned above. MCS(R) CHMOS Programming Algorithm Table
Product Name 87C51 87C54 87C58 87C51FA 87C51FB 87C51FC 87C51GB Memory Prgm Core Quick Pulse non-FX Modified Quick Pulse non-FX
Title Specification Update
Specification Clarifications
Program Lock Bits Encryption Array Program memory protected varying degrees from software piracy using program lock bits encryption array features. FX-core contains lock bits rather than two. lock gives device added level protection restricting external execution. There different levels protection available FX-core products. When LB1, LB2, programmed, maximum lockbit protection achieved. important note that user program these lockbits. encryption array also been expanded bytes giving added protection. array byte password EPROM; therefore, user must know encryption code order correctly read devices memory contents. additional information, refer Embedded Microcontrollers (literature order number 270646). following table lists lockbits encryption array available various products.
Device 83C51FA 83C51FB 83C51FC 87C51FA 87C51FB 87C51FC Third Party programming Support Lockbits None LB1,2,3 LB1,2,3 LB1,2,3 None Bytes Bytes Bytes Bytes Bytes Encrypt Array
Title Specification Update
Specification Clarifications
Problem:
Change
Non-FX devices that currently offer package show "NC" connect).
internally tied Vss. device connected anything other than Vss, problems will occur. this reason strongly recommend that connections made labeled "NC".
Several products have converted core. FX-core devices available (QFP) package. Customers planning devices non-FX designs should special attention change. following list FX-core products date: 87C51 80C32 80C52 87C52 80C54 87C54 80C58 87C58 87C51FA 87C51FB 87C51FC products below available package non-FX: 80C31BH 80C51BH 80C51FA 83C51FA
Title Specification Update
Specification Clarifications
Problem:
Proper 8XC51FX Encryption Array Usage
Customers using program lock features devices should same value bytes Encryption Array, leave large blocks code memory unprogrammed. enable QROM) lock features, customers must submit 64-byte encryption file along with their program code. factory then programs device encryption array sets Lock before device shipped. Those customers using EPROM devices must program encryption array themselves. There important factor that needs considered before using encryption array means program protection. encryption feature exclusively NORs each code byte with encryption bytes. unprogrammed encryption bytes have value OFFH. encryption array left unprogrammed, code byte XNORed with OFFH leaves byte unchanged. Similarly, code byte value OFFH, verification byte will produce encryption byte value. large block (>64 bytes) code left unprogrammed unprogrammed byte value OFFH), verification routine will, essentially, display contents encryption array. this reason, strongly recommended that unused code bytes programmed with some value other than OFFH, them same value. This practice will ensure maximum possible program protection this feature.
Title Specification Update
Documentation Changes
Documentation Changes
None this revision this specification update.
Title Specification Update

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