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16-Bit D-Type Flip-Flop with 3-STATE Outputs PI74VCX Family desig
Top Searches for this datasheetPI74VCX16374 16-Bit D-Type Flip-Flop with 3-STATE Outputs PI74VCX Family designed voltage operation, 1.8V 3.6V 3.6V Tolerant Inputs Outputs Supports Live Insertion Balanced Drive, ±24mA Uses patented Noise Reduction Circuitry Typical VOLP (Output Ground Bounce) 0.6V 2.5V, Typical VOHV (Output Undershoot) -0.6V 2.5V, Power-Off high impedance inputs outputs Industrial operation 40°C +85°C Packages available: 48-pin mil. wide plastic TSSOP 48-pin mil. wide plastic SSOP Product Description Pericom Semiconductor's PI74VCX series logic circuits produced Company's advanced 0.35 micron CMOS technology, achieving industry leading speed. PI74VCX16374 particularly suitable implementing buffer registers, ports, bidirectional drivers, working registers. This device used 8-bit Flip-Flops 16-bit flip-flop. positive transition clock (CLK) input, outputs flip-flop take logic levels date inputs. buffered Output Enable (OE) input used place eight outputs either normal logic state (high logic levels) high-impedance state which outputs neither load drive lines significantly. high-impedance state increased drive provide capability drive lines without need interface pullup components. does affect internal operations flip-flop. data retained data entered while outputs high impedance state. ensure high-impedance state during power power down, should tied through pullup resistor; minimum value resistor determined currentsinking capability driver. PI74VCX family Tolerant, allowing operate mixed 1.8V/3.6V systems. Logic Block Diagram 1CLK Seven Other Channels 2CLK Seven Other Channels PS8327 09/14/98 Product Description Name Description Output Enable Input (Active LOW) Clock Input Data Inputs 3-State Outputs Ground Power PI74VCX16374 16-Bit D-Type Flip-Flop with 3-State Outputs Truth Table(1) Inputs Outputs Product Configuration Notes: High Signal Level Signal Level Don't Care Irrelevant High Impedance 1CLK 2CLK 48-PIN PS8327 09/14/98 PI74VCX16374 16-Bit D-Type Flip-Flop with 3-State Outputs Maximum Ratings (Above which useful life impaired. user guidelines, tested.) Supply Voltage Range, -0.5V 4.6V Input Voltage Range, -0.5V 4.6V Output Voltage Range, (3-Stated) -0.5V 4.6V Output Voltage Range, VO(1) (Active) -0.5V 0.5V Input Diode Current (IIK) -50mA Output Diode Current (IOK) -50mA -50mA Output Source/Sink Current (IOH/IOL) ±50mA Current Supply (ICC GND) ±100mA Storage Temperature Range, TSTG -65°C to150°C Note: Stresses greater than those listed under MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. Recommended Operating Conditions(2) Parame cription Supply voltage High- level input voltage Low- level input voltage Input voltage Output voltage Active State State 3.0V 3.6V 2.3V 2.7V 1.8V Conditions Operating Data Retention Only 2.7V 3.6V 2.7V 3.6V ns/V Units Output current IOH/IOL Dt/Dv Input transistion rise fall rate(3) Operating free- temperature Notes: Absolute maximum must observed. Unused control inputs must held HIGH prevent them from floating. measured between 0.8V 2.0V, 3.0V. PS8327 09/14/98 PI74VCX16374 16-Bit D-Type Flip-Flop with 3-State Outputs Electrical Characteristics over Recommended Operating Free-Air Temperature Range (unless otherwise noted) Characteristics (2.7V 3.6V) Parame cription HIGH Level Input Voltage Level Input Voltage -100mA HIGH Level Output Voltage -12mA -18mA -24mA 100mA Level Output Voltage 12mA 18mA 24mA IOFF DIDD Input Leakage Current STATE Output Leakage Power- Leakage Current Quiescent Supply Current Increase input 0.0V, 3.6V 3.6V (VI,VO) 3.6V (VI,VO) 3.6V 0.6V, Other inputs ±5.0 Conditions Typ. Units PS8327 09/14/98 PI74VCX16374 16-Bit D-Type Flip-Flop with 3-State Outputs ±5.0 Typ. Units Characteristics (2.3V 2.7V) Parame cription HIGH Level Input Voltage Level Input Voltage 100mA HIGH Level Output Voltage 12mA 18mA 100mA IOFF Level Output Voltage 12mA 18mA Input Leakage Current STATE Output Leakage 0.0V, 2.7V 3.6V Conditions Power- Leakage Current (VI,VO) 3.6V Quiescent Supply Current (VI,VO) 3.6V Characteristics (1.8V 2.3V) Parame IOFF cription HIGH Level Input Voltage Level Input Voltage HIGH Level utput Voltage 100mA Level utput Voltage 100mA Input Leakage Current STATE utput Leakage Power- Leakage Current uiescent Supply Current 0.0V, 1.8V 3.6V (VI,VO) 3.6V (VI,VO) 3.6V Conditions ±5.0 Typ. Units Note: guaranteed PS8327 09/14/98 PI74VCX16374 16-Bit D-Type Flip-Flop with 3-State Outputs Electrical Characteristics -40°C +85°C, 30pF, 3.3V 0.3V Symbol fMAX tPLH, tPHL tPZH, tPZL tPHZ, tPLZ Parame Maximum Clock Frequency Prop Delay, Output Enable Time Output Disable Time 2.5V 0.2V 1.8V Units tOSHL, tOSLH Output Output Skew(2) Notes: 50pF approximatly 300ps maximum specification. Skew defined absolute value difference between actual propagation delay separate outputs same device. specification applies outputs switching same direction, either HIGH (tOSHL) HIGH (tOSLH). Setup Requirements 30pF, Symbol Parame 3.3V 0.3V 2.5V 0.2V Setup Time Hold Time Pulse Width Typ. Typ. 1.8V Typ. Units Dynamic Switching Characteristics Symbol VOLP Parame Quiet Output Dynamic Peak 50pF 50pF Conditions +25°C Typical 0.25 0.25 Units VOLP Quiet Output Dynamic Valley VOLP 50pF Quiet Output Dynamic Valley Capacitance Symbol COUT Parame Input Capacitance Output Capacitance Power Dissipation Capacitance Conditions 1.8, 2.5V 3.3V, VDD, 1.8V, 2.5V 3.3V VDD, 1.8V, 2.5V 3.3V +25°C Typical Units PS8327 09/14/98 PI74VCX16374 16-Bit D-Type Flip-Flop with 3-State Outputs Switch Position tPLZ/tPZL Open Test Circuits Switching Waveforms Parameter Measurement Information (VDD 1.8V 3.6V) Open 30pF (See Note From Output Under Test tPHZ/tPZH Pulse Width Low-High-Low Pulse VDD/2 Setup, Hold, Release Timing Data Input Timing Input VDD/2 High-Low-High Pulse VDD/2 Propagaton Delay VDD/2 Input tPLH tPHL VDD/2 Output tPHL Opposite Phase Input Transition tPLH VDD/2 VDD/2 Notes: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output HIGH except when disabled output control. input pulses supplied generators having follow characteristics: MHz, 2ns, 2ns, measured from 90%, unless otherwise specified. outputs measured time with transition measurement. Enable Disable Timing Output Control (Active LOW) VDD/2 tPZL VDD/2 +0.15V tPZH VDD/2 tPHZ -0.15V tPLZ Output Waveform 2xVDD (see Note Output Waveform (see Note Pericom Semiconductor Corporation 2380 Bering Drive Jose, 95131 1-800-435-2336 (408) 435-1100 http://www.pericom.com PS8327 09/14/98 Other recent searchesZFL-1000VH - ZFL-1000VH ZFL-1000VH Datasheet SNC26040 - SNC26040 SNC26040 Datasheet MVM202P06 - MVM202P06 MVM202P06 Datasheet EE-272 - EE-272 EE-272 Datasheet 2SJ450 - 2SJ450 2SJ450 Datasheet 2SA1774 - 2SA1774 2SA1774 Datasheet
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