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High-Efficiency Inverter Controller Single-stage power conversion


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OZ965
High-Efficiency Inverter Controller
Single-stage power conversion, requiring only voltage source Reduces number components board size compared with conventional design Supports both floating grounded secondary designs efficiency typical efficiency conventional designs Internal open-lamp short-circuit protections Wide dimming range Supports multiple CCFLs Simple reliable 2-winding transformer design Eliminates leakage current when used floating secondary design Constant-frequency design eliminates interference with LCDs dimming function with analog voltage frequency Pulse Width Modulation (PWM) control. Operating Principle: CCFL tube, transformer secondary, capacitor form resonant circuit. OZ965 utilizes energy loss resonate mode principle deliver very high efficiency inverter. OZ965 drives transformer primary with variable pulse width voltage directly from supply. resultant primary drive current alternately reversing with zero-voltage-switching. Because transformer leakage inductance secondary resonant circuit, secondary voltage current approximately sinusoidal. This sinusoid results very little harmonic emi/rfi emissions. OZ965 operates single, constant frequency mode. Typical operating frequency ranges between KHz, dependent upon CCFL transformer characteristics. Intelligent open-lamp protection provides design flexibility various transformer models/manufacturers used. high driving capability allows OZ965 drive high power MOSFETs. single stage design results cost, reliable transformer without expensive, less reliable secondary fold-back treatment. transformer does require more expensive center tapped primary. OZ965 available 16-pin TSSOP packages. specified over commercial temperature range +70°C, industrial temperature range -40°C +85°C.
ORDERING INFORMATION
OZ965G 16-pin plastic OZ965R 16-pin plastic TSSOP OZ965IG 16-pin plastic OZ965IR 16-pin plastic TSSOP
GENERAL DESCRIPTION
OZ965 single chip, high-efficiency, Cold Cathode Fluorescent Lamp (CCFL) backlight inverter controller whose primary function convert volt power approximately VAC. Additionally, OZ965 performs lamp
Figure Typical Application Circuit
100k 0.1u 150k 0.1u
0.01u 0.1u HCLMP LCLMP OZ965 2.2u 59.0k 470p Si4532 17:2200
0.1u 510k
BAV99L
4.3k 100k
0.1u
1.02k
06/20/00 Copyright 2000 O2Micro
OZ965-SF-3.0 Rights Reserved
Page U.S. Patent #5,619,402
OZ965
FUNCTIONAL BLOCK DIAGRAM
Refer functional block diagram Figure below, Description Table page Power transferred transformer primary N-MOSFET, driven MOSFET gate driver NDR. P-MOSFET resets primary field, driven PDR. usual design results approximately duty cycle full lamp intensity. Terminating signal earlier than full brightness lamp pulse width performs lamp dimming, using analog dimming. voltages pins HCLMP LCLMP threshold voltage ramp comparator setting maximum duty cycle NDR. pulse generator circuit creates clock signal with frequency determined external, constant current setting resistor (RT) timing capacitor (CT). "soft-start" circuit ensures reliable long lamp life starting condition.
2.50V IBIAS REFERENCE POFF
"Soft start" gradually increases energy delivered secondary. When OZ965 enabled ENA, capacitor determines duration "soft-start" period, gradually increasing pulse width regulated brightness. "soft-start" period provides sufficient time lamp ignite. system reliability there several circuit protections provided. ensure controlled output, secondary current monitored compared reference voltage ADJ. signal shortened lengthened dependent upon this feedback. Protection provided resultant signal, CMP, monitoring lamp removal condition. Short circuit protection provided SCP. signal selects either HCLMP LCLMP providing current protection against "Open Lamp" condition start-up. signal also allows adjustment different transformer models. reduce power dissipation, switch (MOSFET) drive signals "break-before-make" with short, fixed time between activation PDR.
HCLMP Vset
Vmax=2.6V-Vset
Vmax V>Vmax Vmax Vmin<V<Vmax V<Vmin ->Vmin
RAMP COMP. RAMP COMP. PULSE
LCLMP
COMP
2.5V
PULSE
Vmin (fix value)
COMP
0.5V
COMP
0.6V LAMP ON/OFF
RESET
UNDER VOLTAGE UVLO LOCKOUT ENABLE COMP
300k ACTIVE "HIGH"
(slow start)
CONTROLLER
1.5V
Pgate PDRV
Ngate COMP OLPROT PROTECTION NDRV
2.5V 630k
POFF I=12uA I=2.5uA
V_SS2 t1+t2 (slow start)
Note: Over Voltage Protection Short-Circuit Protection Under Voltage Lockout
POFF
Figure Functional Block Diagram
OZ965-SF-3.0 Page
OZ965
DESCRIPTION
Names HCLMP LCLMP Description Reference voltage output. Nominal voltage Clamping maximum duty cycle under normal operation. Clamping maximum duty cycle under open-lamp condition. Short-circuit protection input (VTH=0.6V) Reference voltage input dimming control. Current sense feedback. Compensation current sense feedback. Ground. Soft-start ensures lamp current pulses gradually increases normal value Gate drive output P-MOSFET. Gate drive output N-MOSFET. Enable input, active high (VTH=1.5V) Output current sense (VTH=0.6V) Timing capacitor. clock frequency. Timing resistor. Fosc 1.91 Supply voltage input.
ABSOLUTE MAXIMUM RATINGS
Logic inputs 5.5V 0.3V -0.3 VDD+0.3V Power dissipation 16-pin 16-pin TSSOP Thermal Impedance 16-pin 16-pin TSSOP OZ965 .720W .690W
OZ965I .580W .550W
OZ965 Operating temp.
OZ965I
Operating junction temp. Storage temp.
RECOMMENDED OPERATING RANGE
Fosc Rosc
OZ965-SF-3.0
Page
OZ965
FUNCTIONAL SPECIFICATIONS
Parameter Symbol Test Conditions 4.75 5.25 Reference Voltage Nominal voltage Line regulation Load regulation Oscillator Initial accuracy Ramp peak Ramp valley Temp. stability Error Amplifier Input bias current Input offset voltage Input voltage range Open loop voltage gain Unity gain bandwidth Power supply rejection Under-Voltage Lockout Positive-going threshold voltage Negative-going threshold voltage Supply Supply current Enable Supply current Enable High output Output high voltage Output voltage Output resistance output Output high voltage Output voltage Output resistance Break-Before-Make delay delay High Clamp Duty cycle HCLMP OPS=1 VHCLMP=0V OPS=1 VHCLMP=1.8V Clamp Duty cycle LCLMP OPS=0 VLCLMP=0V OPS=0 VLCLMP=1.8V Max. Min. Duty cycle Duty cycle ROUT Isource Isink ROUT Isource Isink 4.75 0.25 IOFF Table page Table page ADJ=FB=2.0 0.25 VDD1.5 -40oC 85oC fosc 49.9 2.54 0.48 ppm/ Iload Vref Iload 2.37 2.50 2.63 mV/V mV/mA Limits Unit
OZ965-SF-3.0
Page
OZ965
OZ965
Parameter Test Conditions 4.75V 5.25V Under-Voltage Lockout Positive-going threshold voltage Negative-going threshold voltage Limits Unit
OZ965I
Limits Unit
Table Under-Voltage Lockout OZ965 OZ965I
OZ965-SF-3.0
Page
OZ965
PACKAGE INFORMATION
TSSOP-16 PACKAGE
Gauge Plane
INCHES 0.043 0.002 0.006 0.031 0.041 0.020 0.030 0.169 0.177 0.252BSC 0.004 0.004 0.007 0.012 0.007 0.010 0.004 0.008 0.004 0.006 0.039REF 0.026BSC 12°REF 12°REF
Lead Cross Section
MILLIMETERS 1.20 0.05 0.15 0.80 1.05 0.45 0.75 4.90 5.10 4.30 4.50 6.40BSC 0.09 0.09 0.19 0.30 0.19 0.25 0.09 0.20 0.09 0.16 1.0REF 0.65BSC 12°REF 12°REF
OZ965-SF-3.0
Page
OZ965
SOP-16 PACKAGE
INCHES 0.0532 0.0688 0.0040 0.0098 0.013 0.020 0.0075 0.0098 0.3859 0.3937 0.1497 0.1574 0.050 BCS. 0.2284 0.244 0.016 0.050
MILLIMETERS 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 9.80 10.00 3.80 4.00 1.27 BCS. 5.80 6.20 0.40 1.27
OZ965-SF-3.0
Page

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