1048576-BIT(65536-WORD 16-BIT)CMOS STATIC 1048576-BIT(65536-WORD 16-BI
|
|
|
Top Searches for this datasheet
MITSUBISHI LSIs MITSUBISHI LSIs
1048576-BIT(65536-WORD 16-BIT)CMOS STATIC 1048576-BIT(65536-WORD 16-BIT)CMOS STATIC
M5M51016BTP,RT-70L,-10L, -70LL,-10LL
DESCRIPTION
M5M51016BTP, 1048576-bit CMOS static organized 65536 word 16-bit which fabricated using highperformance triple polysilicon CMOS technology. resistive load NMOS cells CMOS periphery result high density power static RAM. They stand-by current operation current ideal battery back-up application. M5M51016BTP,RT packaged 44-pin thin small outline package which high reliability high density surface mount device (SMD). types devices available. M5M510 16BTP(normal lead bend type package), M5M51016BRT (reverse lead bend type package). Using both types devices, becomes very easy design printed circuit board.
CONFIGURATION (TOP VIEW)
CHIP SELECT INPUT
BYTE CONTROL INPUTS ADDRESS INPUTS WRITE CONTROL INPUTS ADDRESS INPUTS
ADDRESS INPUTS
M5M51016BTP
FEATURES
Power supply current Type name M5M51016BTP,RT-70L M5M51016BTP,RT-10L M5M51016BTP,RT-70LL M5M51016BTP,RT-10LL
Access time (max)
(0V)GND
OUTPUT ENABLE INPUT
GND(0V) DQ16 DQ15 DQ14 DQ13 DATA INPUTS/ DQ12 OUTPUTS DQ11 DQ10 VCC(5V)
Active (max)
stand-by (max) 100µA 5.5V)
70ns 100ns 30mA (1MHz)
70ns 100ns
20µA (VCC 5.5V) 0.3µA (VCC 3.0V, typ)
DATA INPUTS/ OUTPUTS
Single +5.0V power supply stand-by current 0.3µA (typ.) Directly compatible inputs outputs Easy memory expansion power down Data hold power supply Three-state outputs OR-tie capability prevents data contention Common data Package M5M51016BTP,RT 44pin 400mil TSOP(II)
Outline 44P3W (400mil TSOP Normal Bend)
BYTE CONTROL INPUTS
CHIP SELECT INPUT GND(0V) OUTPUT ENABLE INPUT
DATA INPUTS/ OUTPUTS
APPLICATION
Small capacity memory units
WRITE CONTROL INPUTS ADDRESS INPUTS
ADDRESS INPUTS
ADDRESS INPUTS
M5M51016BRT
(0V)GND DQ16 DQ15 DQ14
DATA INPUTS/ OUTPUTS
DQ13 DQ12 DQ11 DQ10
(5V)VCC
Outline 44P3W (400mil TSOP Reverse Bend)
CONNECTION
MITSUBISHI ELECTRIC
MITSUBISHI LSIs
,1997
1048576-BIT(65536-WORD 16-BIT)CMOS STATIC
FUNCTION
operation mode M5M51016B series determined combination device control inputs BC2, Each mode summarized function table. write cycle executed whenever level overlaps with level and/or high level address must before write cycle must stable during entire cycle. data latched into cell trailing edge whichever occurs first, requiring set-up hold time relative these edge maintained. output enable input directly controls output stage. Setting high level, output stage high-impedance state, databus contention problem write cycle eliminated. read cycle executed setting high level level while and/or active state. and/or 2=L,CS=H) When setting high level other pins active state, upper-Byte selectable mode which both reading writing enabled, lower-Byte nonselectable mode.And when setting high level other pins active state, lower-Byte selectable mode upper -Byte non-selectable mode.
M5M51016BTP,RT-70L,-10L, -70LL,-10LL
When setting high level level, chips non-selectable mode which both reading writing disabled. this mode, output stage high-impedance state, allowing OR-tie with other chips memory expansion power supply current reduced stand-by current which specified ICC4, memory data held power supply, enabling battery back-up operation during powerfailure power-down operation nonselected mode.
Mode selection selection Upper-Byte Write Upper-Byte Read
Lower-Byte Write Lower-Byte Read
DQ1~8 DQ9~16 High-Z High-Z High-Z High-Z High-Z Dout High-Z Dout High-Z
High-Z Stand-by High-Z Stand-by Active Dout High-Z High-Z High-Z High-Z Dout High-Z Active Active Active Active Active Active Active Active
Word Write Word Read
(High-Z=High-impedance)
BLOCK DIAGRAM
OUTPUT BUFFER ADDRESS INPUT BUFFER A1540 ADDRESS INPUTS SENSE AMP. SENSE AMP. OUTPUT BUFFER DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 ADDRESS INPUT BUFFER BLOCK DECODER INPUT DATA CONTROL DATA INPUTS/ OUTPUTS
DECODER
65536 WORDS BITS 1024 ROWS COLUMNS BLOCKS
ADDRESS INPUT BUFFER
CHIP SELECT INPUT BYTE CONTROL INPUTS
COLUMN DECODER
CLOCK GENERATOR INPUT DATA CONTROL
GND(0V) (0V)
WRITE CONTROL INPUT
OUTPUT ENABLE INPUT
MITSUBISHI ELECTRIC
MITSUBISHI LSIs
,1997
1048576-BIT(65536-WORD 16-BIT)CMOS STATIC
ABSOLUTE MAXIMUM RATINGS
Symbol Topr Tstg Supply voltage Input voltage Output voltage Power dissipation Operating temperature Storage temperature With respect Ta=25
M5M51016BTP,RT-70L,-10L, -70LL,-10LL
Parameter
Conditions
Ratings 0.3*
Unit
-3.0V case Pulse width 50ns
ELECTRICAL CHARACTERISTICS (Ta=0 Vcc=5.0V unless otherwise noted)
Symbol VOH1 VOH2
Parameter High-level input voltage Low-level input voltage High-level output voltage High-level output voltage Low-level output voltage Input current Output current off-state Word operation (16bit) Active supply current (AC,MOS level) Word operation (16bit) Active supply current (AC,TTL level) Byte operation (8bit) Active supply current (AC,MOS level) Byte operation (8bit) Active supply current (AC,TTL level)
Test conditions
0.3*
Vcc-0.5V
Limits
Vcc+0.3V
Unit
0.1mA VI/O 0.2V, 0.2V other inputs 0.2V 0.2V
Output-open(duty 100%) VIL, other inputs Output-open(duty 100%) (BC1 0.2V 0.2V) 0.2V >Vcc 0.2V), 0.2V other inputs 0.2V 0.2V Output-open(duty 100%) (BC1 VIL) (BC1 other inputs Output-open(duty 100%) 0.2V, other inputs ~Vcc 1,BC2 0.2V, 0.2V other inputs 0~Vcc other inputs ~Vcc
cycle 1MHz cycle 1MHz cycle 1MHz cycle 1MHz
ICC1W
ICC2W
ICC1B
ICC2B
ICC3
Stand-by current
ICC4
Stand-by current
-3.0V case Pulse width 30ns
CAPACITANCE (Ta=0 Vcc=5.0V unless otherwise noted)
Symbol CIBC
Parameter Input capacitance except 1,BC2) Input capacitance 1,BC2 Output capacitance
Test conditions VI=GND, I=25mVrms, f=1MHz VI=GND, I=25mVrms, f=1MHz VO=GND,V O=25mVrms, f=1MHz
Limits
Unit
Note Direction current flowing into positive mark). Typical value 5.0V,
MITSUBISHI ELECTRIC
MITSUBISHI LSIs
,1997
1048576-BIT(65536-WORD 16-BIT)CMOS STATIC
ELECTRICAL CHARACTERISTICS 5.0V unless otherwise noted
M5M51016BTP,RT-70L,-10L, -70LL,-10LL
MEASUREMENT CONDITIONS
Input pulse level 2.4V, 0.6V Input rise fall time Reference level 1.5V, 1.5V Output loads Fig.1,CL =100pF(-10L,-10LL) 30pF (-70L,-70LL) tdis Transition measured 500mV from steady state voltage. tdis
1.8k Including scope
Fig.1 Output load READ CYCLE
Limits Symbol Parameter M5M51016B -70L,-70LL ta(A) ta(BC1) ta(BC2) ta(CS) ta(OE) tdis(BC1) tdis(BC2) tdis(CS) tdis(OE) ten(BC1) ten(BC2) ten(CS) ten(OE) tv(A) Read cycle time Address access time Byte control access time Byte control access time Chip select access time Output enable access time Output disable time after high Output disable time after high Output disable time after Output disable time after high Output enable time after Output enable time after Output enable time after high Output enable time after Data valid time after address M5M51016B -10L,-10LL Unit
WRITE CYCLE
Limits Symbol Parameter M5M51016B -70L,-70LL tw(W) tsu(A) tsu(A-WH) tsu(BC1) tsu(BC2 tsu(CS) tsu(D) th(D) trec(W) tdis(W) tdis(OE) ten(W) ten(OE) Write cycle time Write pulse width Address time Address time with respect Byte control setup time Byte control setup time Chip select time Data time Data hold time Write recovery time Output disable time from Output disable time from high Output enable time from high Output enable time from M5M51016B -10L,-10LL Unit
MITSUBISHI ELECTRIC
MITSUBISHI LSIs
,1997
1048576-BIT(65536-WORD 16-BIT)CMOS STATIC
TIMING DIAGRAMS Read cycle
A0~15 ta(A) (BC1) (BC2) and/or
(Note (Note
M5M51016BTP,RT-70L,-10L, -70LL,-10LL
tdis (BC1) tdis (BC2) (CS)
(Note
(OE) (OE)
tdis (CS)
(Note
(Note
(BC1) (BC2) (CS)
tdis (OE)
(Note
DQ1~16
level
DATA VALID
Write cycle control mode)
A0~15
(BC1) (BC2) and/or
(Note (Note
(Note
(CS)
(Note
(A-WH)
trec
tdis tdis (OE) DQ1~16 DATA STABLE
ten(OE)
MITSUBISHI ELECTRIC
MITSUBISHI LSIs
,1997
1048576-BIT(65536-WORD 16-BIT)CMOS STATIC
Write cycle control mode)
A0~15 (BC1) (BC2)
M5M51016BTP,RT-70L,-10L, -70LL,-10LL
and/or
trec
(Note (Note (Note
(Note (Note (Note
DATA STABLE
DQ1~16
Write cycle control mode)
A0~15
and/or
(Note (Note
(CS)
trec
(Note
(Note
(Note (Note
DATA STABLE
DQ1~16
Note Hatching indicates state "don't care". Writing executed while high overlaps and/or low. When falling edge simultaneously prior falling edge and/or rising edge outputs maintained high impedance state. Don't apply inverted phase signal externally when output mode.
MITSUBISHI ELECTRIC
MITSUBISHI LSIs
,1997
1048576-BIT(65536-WORD 16-BIT)CMOS STATIC
POWER DOWN CHARACTERISTICS ELECTRICAL CHARACTERISTICS unless otherwise noted)
Symbol (PD) (BC) (CS) Parameter Power down supply voltage Byte control input Chip select input 2.2V CC(PD) 2.0V CC(PD) 2.2V 4.5V CC(PD) VCC(PD) 4.5V
0.2V other inputs 0.2V, 0.2V,other inputs=0
M5M51016BTP,RT-70L,-10L, -70LL,-10LL
Test conditions
Limits
Unit
VCC(PD)
(PD)
Power down supply current
(Note
Note7. (PD) case
TIMING REQUIREMENTS unless otherwise noted
Symbol (PD) trec (PD) Parameter Power down time Power down recovery time Test conditions Limits Unit
POWER DOWN CHARACTERISTICS control mode
(PD) 4.5V 4.5V (PD)
2.2V 0.2V
2.2V
control mode
4.5V 4.5V
(PD)
(PD)
0.2V 0.2V
0.2V
MITSUBISHI ELECTRIC
Other recent searches
TLP2095 - TLP2095 TLP2095 Datasheet
ROS-3100C+ - ROS-3100C+ ROS-3100C+ Datasheet
NTE1618 - NTE1618 NTE1618 Datasheet
MES50A - MES50A MES50A Datasheet
MA-306 - MA-306 MA-306 Datasheet
LM185BY-1 - LM185BY-1 LM185BY-1 Datasheet
DS4585 - DS4585 DS4585 Datasheet
CCRS-33 - CCRS-33 CCRS-33 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
