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LT1764A Series 3A, Fast Transient Response, Low Noise, LDO Regulators

DESCRIPTIO

LT1764A Series 3A, Fast Transient Response, Low Noise, LDO Regulators
FEATURES
DESCRIPTIO
APPLICATIO S
3.3V to 2.5V Logic Power Supply Post Regulator for Switching Supplies
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
3.3VIN to 2.5VOUT Regulator
DROPOUT VOLTAGE (mV)
2.5V 3A 10µF LT1764A-2.5 SHDN SENSE GND
1764 TA01
350 300 250 200 150 100 50 0 0 0.5 1.0 1.5 2.0 LOAD CURRENT (A) 2.5 3.0
1764 TA02
TANTALUM, CERAMIC OR ALUMINUM ELECTROLYTIC
Dropout Voltage
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LT1764A Series
ABSOLUTE MAXIMUM RATINGS (Note 1)
PACKAGE / ORDER INFORMATION
FRONT VIEW 5 4 TAB IS GND 3 2 1 Q PACKAGE 5-LEAD PLASTIC DD SENSE / ADJ OUT GND IN SHDN
ORDER PART NUMBER LT1764AEQ LT1764AEQ-1.5 LT1764AEQ-1.8 LT1764AEQ-2.5 LT1764AEQ-3.3
TAB IS GND
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
LT1764A-1.5 LT1764A-1.8 LT1764A-2.5 LT1764A-3.3 LT1764A (Note 3)
FRONT VIEW 5 4 3 2 1 T PACKAGE 5-LEAD PLASTIC TO-220 GND IN SHDN SENSE / ADJ OUT
ORDER PART NUMBER LT1764AET LT1764AET-1.5 LT1764AET-1.8 LT1764AET-2.5 LT1764AET-3.3
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LT1764A Series
ELECTRICAL CHARACTERISTICS
MAX 7 23 8 25 10 30 12 40 5 20 0.05 0.10 0.13 0.18 0.20 0.27 0.33 0.40 0.45 0.66 1.5 1.6 5 18 75 200 10 2 1 30 1
Output Voltage Noise ADJ Pin Bias Current Shutdown Threshold SHDN Pin Current (Note 9) Quiescent Current in Shutdown Ripple Rejection Current Limit
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LT1764A Series
ELECTRICAL CHARACTERISTICS
TYP 600 600 600 600 300
MAX 1 1200 1200 1200 1200 600
UNITS mA µA µA µA µA µA
TYPICAL PERFOR A CE CHARACTERISTICS
Typical Dropout Voltage
GUARANTEED DROPOUT VOLTAGE (mV)
500 TJ 125°C 400 300 TJ 25°C 200 100 0 0 0.5
DROPOUT VOLTAGE (mV)
1.0 1.5 2.0 OUTPUT CURRENT (A)
1764 G01
Guaranteed Dropout Voltage
Dropout Voltage
2.0 1.5 1.0 OUTPUT CURRENT (A)
1764 G02
50 25 75 0 TEMPERATURE (°C)
1764 G03
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LT1764A Series TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current
QUIESCENT CURRENT (mA)
LT1764A-1.5 / 1.8 / 2.5 / 3.3
OUTPUT VOLTAGE (V)
1.0 LT1764A 0.8 0.6 0.4 0.2
OUTPUT VOLTAGE (V)
LT1764A-2.5 Output Voltage
OUTPUT VOLTAGE (V)
2.52 2.50 2.48 2.46 2.44 2.42 - 50 - 25 0 75 50 25 TEMPERATURE (°C) 100 125
3.32 3.30 3.28 3.26 3.24 3.22 - 50 - 25 0 75 50 25 TEMPERATURE (°C) 100 125
ADJ PIN VOLTAGE (V)
LT1764A-1.5 Quiescent Current
QUIESCENT CURRENT (mA)
1764 G04 1756 G06 1764 G41
LT1764A-1.5 Output Voltage
LT1764A-1.8 Output Voltage
75 50 25 TEMPERATURE (°C)
1764A G40
1756 G05
LT1764A-3.3 Output Voltage
LT1764A ADJ Pin Voltage
75 50 25 TEMPERATURE (°C)
1756 G07
1756 G08
LT1764A-1.8 Quiescent Current
LT1764A-2.5 Quiescent Current
3 4 5 6 7 INPUT VOLTAGE (V)
1764 G09
1764 G10
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LT1764A Series TYPICAL PERFOR A CE CHARACTERISTICS
LT1764A-3.3 Quiescent Current
QUIESCENT CURRENT (mA)
GND PIN CURRENT (mA)
QUIESCENT CURRENT (mA)
LT1764A-1.8 GND Pin Current
GND PIN CURRENT (mA)
LT1764A GND Pin Current
GND PIN CURRENT (mA)
3 4 5 6 7 INPUT VOLTAGE (V)
1764 G11 1764 G13
LT1764A Quiescent Current
1764 G12
LT1764A-1.5 GND Pin Current
1764 G42
LT1764A-2.5 GND Pin Current
LT1764A-3.3 GND Pin Current
3 4 5 6 7 INPUT VOLTAGE (V)
1764 G14
1764 G15
LT1764A-1.5 GND Pin Current
LT1764A-1.8 GND Pin Current
3 4 5 6 7 INPUT VOLTAGE (V)
1764 G16
1764A G43
1764 G17
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LT1764A Series TYPICAL PERFOR A CE CHARACTERISTICS
LT1764A-2.5 GND Pin Current
GND PIN CURRENT (mA)
3 4 5 6 7 INPUT VOLTAGE (V)
GND Pin Current vs ILOAD
SHDN PIN THRESHOLD (V)
120 100 80 60 40 20 0 0 0.5 2.0 1.5 OUTPUT CURRENT (A) 1.0 2.5 3.0
1764 G21
0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 -25 50 25 0 75 TEMPERATURE (°C) 100 125
SHDN PIN THRESHOLD (V)
GND PIN CURRENT (mA)
SHDN Pin Input Current
SHDN PIN INPUT CURRENT (µA)
ADJ PIN BIAS CURRENT (µA)
1764 G24
1764 G18
LT1764A-3.3 GND Pin Current
LT1764A GND Pin Current
3 4 5 6 7 INPUT VOLTAGE (V)
1764 G19
1764 G20
SHDN Pin Threshold (On-to-Off)
SHDN Pin Threshold (Off-to-On)
50 25 0 75 TEMPERATURE (°C)
1764 G22
1764 G23
SHDN Pin Input Current
ADJ Pin Bias Current
75 50 25 TEMPERATURE (°C)
1764 G25
1756 G26
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LT1764A Series TYPICAL PERFOR A CE CHARACTERISTICS
Current Limit
CURRENT LIMIT (A) 6 5
CURRENT LIMIT (A)
REVERSE OUTPUT CURRENT (mA)
4 3 2 1 0 0 2 4 6 8 10 12 14 16 18 20 INPUT / OUTPUT DIFFERENTIAL (V)
1764 G27
Reverse Output Current
REVERSE OUTPUT CURRENT (mA)
RIPPLE REJECTION (dB)
LT1764A-1.5 / 1.8 / -2.5 / -3.3
RIPPLE REJECTION (dB)
LT1764A
50 25 0 75 TEMPERATURE (°C)
LT1764A Minimum Input Voltage
OUTPUT NOISE SPECTRAL DENSITY (µV / Hz)
MINIMUM INPUT VOLTAGE (V)
LOAD REGULATION (mV)
50 25 75 0 TEMPERATURE (°C)
1764 G30
Current Limit
Reverse Output Current
1764 G28
1764 G29
Ripple Rejection
50 25 0 75 TEMPERATURE (°C)
1764 G31
1764 G32
Load Regulation
Output Noise Spectral Density
LT1764A
LT1764A-3.3 0.1
LT1764A-2.5
LT1764A
LT1764A-1.8 LT1764A-1.5
1k 10k FREQUENCY (Hz)
1764 G35
1764 G33
1764 G34
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LT1764A Series TYPICAL PERFOR A CE CHARACTERISTICS
RMS Output Noise vs Load Current (10Hz to 100kHz)
OUTPUT NOISE (µVRMS)
20 15 LT1764A-1.5 10 5 0 0.0001 0.001 0.01 0.1 LOAD CURRENT (A) 1 10
1764 G36
LT1764A-3.3 Transient Response
OUTPUT VOLTAGE DEVIATION (V) OUTPUT VOLTAGE DEVIATION (V)
0.2 0.1 0 -0.1 -0.2 1.00 0.75 0.50 0.25 0 0 2 4 6 8 10 12 14 16 18 20 TIME (µs)
1764 G38
LOAD CURRENT (A)
PI FU CTIO S
SHDN (Pin 1): Shutdown. The SHDN pin is used to put the LT1764A regulators into a low power shutdown state. The output will be off when the SHDN pin is pulled low. The SHDN pin can be driven either by 5V logic or opencollector logic with a pull-up resistor. The pull-up resistor is required to supply the pull-up current of the opencollector gate, normally several microamperes, and the SHDN pin current, typically 7µA. If unused, the SHDN pin must be connected to VIN. The device will be in the low power shutdown state if the SHDN pin is not connected. IN (Pin 2): Input. Power is supplied to the device through the IN pin. A bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. A bypass capacitor in the range of 1µF to 10µF is sufficient. The LT1764A regulators are designed to withstand reverse voltages on the IN pin with respect to ground and the OUT pin. In the case of a reverse input, which can happen if a battery is plugged in backwards, the device will act as if there is a diode in series with its input. There will be no reverse current flow into the regulator and no reverse voltage will appear at the load. The device will protect both itself and the load.
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LT1764A-3.3 10Hz to 100kHz Output Noise
LT1764A-2.5
LT1764A-1.8
VOUT 100µV / DIV
LT1764A
1ms / DIV
1764A G37
LT1764A-3.3 Transient Response
1764 G39
LT1764A Series
PI FU CTIO S
2 IN OUT LT1764A 4 RP
APPLICATIO S I FOR ATIO
The LT1764A series are 3A low dropout regulators optimized for fast transient response. The devices are capable of supplying 3A at a dropout voltage of 340mV. The low operating quiescent current (1mA) drops to less than 1µA in shutdown. In addition to the low quiescent current, the LT1764A regulators incorporate several protection features which make them ideal for use in battery-powered systems. The devices are protected against both reverse input and reverse output voltages. In battery backup applications where the output can be held up by a backup battery when the input is pulled to ground, the LT1764A-X acts like it has a diode in series with its output and prevents reverse current flow. Additionally, in dual supply applications where the regulator load is returned to a negative supply, the output can be pulled below ground by as much as 20V and still allow the device to start and operate. Adjustable Operation
The adjustable version of the LT1764A has an output voltage range of 1.21V to 20V. The output voltage is set by
SENSE GND 3
1764 F01
Figure 1. Kelvin Sense Connection
the ratio of two external resistors as shown in Figure 2. The device servos the output to maintain the voltage at the ADJ pin at 1.21V referenced to ground. The current in R1 is then equal to 1.21V / R1 and the current in R2 is the current in R1 plus the ADJ pin bias current. The ADJ pin bias current, 3µA at 25°C, flows through R2 into the ADJ pin. The output voltage can be calculated using the formula in Figure 2. The value of R1 should be less than 4.17k to minimize errors in the output voltage caused by the ADJ pin bias current. Note that in shutdown the output is turned off and the divider current will be zero.
IN VIN OUT VOUT
LT1764A ADJ GND R1
1764 F02
Figure 2. Adjustable Operation
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APPLICATIO S I FOR ATIO
20 0 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF
X5R -20 -40 -60 Y5V -80
8 6 4 10 12 DC BIAS VOLTAGE (V)
1764 F03
Figure 3. Ceramic Capacitor DC Bias Characteristics
an effective value as low as 1µF to 2µF over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values. Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. Overload Recovery Like many IC power regulators, the LT1764A-X has safe operating area protection. The safe area protection decreases the current limit as input-to-output voltage increases and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. The protection is designed to provide some output current at all values of input-to-output voltage up to the device breakdown. When power is first turned on, as the input voltage rises, the output follows the input, allowing the regulator to start up into very heavy loads. During the start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. With a high input voltage, a problem can occur
40 20 0 -20 -40 -60 -80 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF 50 25 75 0 TEMPERATURE (°C) 100 125 Y5V X5R -100 -50 -25
1764 F04
Figure 4. Ceramic Capacitor Temperature Characteristics
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LT1764A Series
APPLICATIO S I FOR ATIO
wherein removal of an output short will not allow the output voltage to recover. Other regulators, such as the LT1085, also exhibit this phenomenon, so it is not unique to the LT1764A series. The problem occurs with a heavy output load when the input voltage is high and the output voltage is low. Common situations are immediately after the removal of a short circuit or when the SHDN pin is pulled high after the input voltage has already been turned on. The load line for such a load may intersect the output current curve at two points. If this happens, there are two stable output operating points for the regulator. With this double intersection, the input power supply may need to be cycled down to zero and brought up again to make the output recover. Output Voltage Noise The LT1764A regulators have been designed to provide low output voltage noise over the 10Hz to 100kHz bandwidth while operating at full load. Output voltage noise is typically 50nVHz over this frequency bandwidth for the LT1764A (adjustable version). For higher output voltages (generated by using a resistor divider), the output voltage noise will be gained up accordingly. This results in RMS noise over the 10Hz to 100kHz bandwidth of 15µVRMS for the LT1764A increasing to 37µVRMS for the LT1764A-3.3. Higher values of output voltage noise may be measured when care is not exercised with regards to circuit layout and testing. Crosstalk from nearby traces can induce unwanted noise onto the output of the LT1764A-X. Power supply ripple rejection must also be considered the LT1764A regulators do not have unlimited power supply rejection and will pass a small portion of the input noise through to the output. Thermal Considerations The power handling capability of the device is limited by the maximum rated junction temperature (125°C). The power dissipated by the device is made up of two components: 1. Output current multiplied by the input / output voltage differential: (IOUT)(VIN - VOUT), and
2. GND pin current multiplied by the input voltage: (IGND)(VIN). The GND pin current can be found using the GND Pin Current curves in the Typical Performance Characteristics. Power dissipation will be equal to the sum of the two components listed above. The LT1764A series regulators have internal thermal limiting designed to protect the device during overload conditions. For continuous normal conditions, the maximum junction temperature rating of 125°C must not be exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered. For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Surface mount heatsinks and plated through-holes can also be used to spread the heat generated by power devices. The following table lists thermal resistance for several different board sizes and copper areas. All measurements were taken in still air on 1 / 16" FR-4 board with one ounce copper.
Table 1. Q Package, 5-Lead DD
COPPER AREA TOPSIDE 2500mm2 1000mm 125mm
BACKSIDE 2500mm2 2500mm 2500mm
BOARD AREA 2500mm2 2500mm 2500mm
THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 23°C / W 25°C / W 33°C / W
Device is mounted on topside.
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LT1764A Series
APPLICATIONS INFORMATION
REVERSE OUTPUT CURRENT (mA)
LT1764A-1.5 LT1764A-1.8
1764 F05
Figure 5. Reverse Output Current
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LT1764A Series
APPLICATIONS INFORMATION
When the IN pin of the LT1764A-X is forced below the OUT pin or the OUT pin is pulled above the IN pin, input current will typically drop to less than 2µA. This can happen if the input of the device is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. The state of the SHDN pin will have no effect on the reverse output current when the output is pulled above the input.
TYPICAL APPLICATIO S
SCR Preregulator Provides Efficiency Over Line Variations
NTE5437 L2 10V AC AT 115VIN 10V AC AT 115VIN 12.1k NTE5437 1N4002 "SYNC" 1N4002 TO ALL "V +" POINTS 2.4k 1N4002 V+ 1N4148 1k L1 500µH LT1764A-3.3 VOUT 3.3V 3A 22µF IN SHDN GND 34k OUT FB
90V AC TO 140V AC
22µF 750
C1 10µF
LT1004-1.2
ADJUST R1 FOR 0A TO 3A CONSTANT CURRENT
C2 3.3µF
10000µF
C1A 1 / 2 LT1018
1N4148
200k 0.1µF
V+ 0.033µF 750
C1B 1 / 2 LT1018 1N4148
A1 LT1006 10k 10k V+
10k 1µF
LT1004 1.2V
1764 TA03
Adjustable Current Source
R5 0.01 IN R1 1k R4 2.2k R6 2.2k OUT LOAD R8 100k LT1764A-1.8 SHDN FB GND
R2 40.2k
C3 1µF
R7 470
1764 TA04
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LT1764A Series
PACKAGE DESCRIPTION
Q Package 5-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1461)
0.060 (1.524) TYP
0.075 (1.905) 0.300 (7.620) BOTTOM VIEW OF DD PAK HATCHED AREA IS SOLDER PLATED COPPER HEAT SINK +0.012 0.143 -0.020 0.067 (1.70) 0.028 - 0.038 BSC (0.711 - 0.965) 0.013 - 0.023 (0.330 - 0.584)
0.230 - 0.270 (5.842 - 6.858) 0.460 - 0.500 (11.684 - 12.700) 0.570 - 0.620 (14.478 - 15.748) 0.330 - 0.370 (8.382 - 9.398) 0.700 - 0.728 (17.78 - 18.491) 0.620 (15.75) TYP
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
0.390 - 0.415 (9.906 - 10.541) 15° TYP
0.059 (1.499) TYP
Q(DD5) 1098
T Package 5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)
0.147 - 0.155 (3.734 - 3.937) DIA
SEATING PLANE 0.152 - 0.202 0.260 - 0.320 (3.861 - 5.131) (6.60 - 8.13)
MEASURED AT THE SEATING PLANE
T5 (TO-220) 0399
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LT1764A Series
TYPICAL APPLICATIO U
Paralleling of Regulators for Higher Output Current
R1 0.01
C1 100µF
IN OUT LT1764A-3.3 SHDN FB GND R2 0.01 IN OUT LT1764A ADJ GND
3.3V 6A C2 22µF
R6 6.65k R7 4.12k
R3 2.2k
R4 2.2k
8 1 C3 0.01µF
1764 TA05
RELATED PARTS
PART NUMBER LT1120 LT1121 LT1129 LT1175 LT1374 LT1521 LT1529 LT1573 LT1575 LTC1735 LT1761 Series LT1762 Series LT1763 Series LT1962 LT1963A LT1964 DESCRIPTION 125mA Low Dropout Regulator with 20µA IQ 150mA Micropower Low Dropout Regulator 700mA Micropower Low Dropout Regulator 500mA Negative Low Dropout Micropower Regulator 4.5A, 500kHz Step-Down Converter 300mA Low Dropout Micropower Regulator with Shutdown 3A Low Dropout Regulator with 50µA IQ UltraFast Transient Response Low Dropout Regulator UltraFast Transient Response Low Dropout Regulator Synchronous Step-Down Converter 100mA, Low Noise, Low Dropout Micropower Regulators in SOT-23 150mA, Low Noise, LDO Micropower Regulators 500mA, Low Noise, LDO Micropower Regulators 300mA, Low Noise, LDO Micropower Regulator 1.5A, Low Noise, Fast Transient Response LDO 200mA, Low Noise, Negative LDO Micropower Regulator COMMENTS Includes 2.5V Reference and Comparator 30µA IQ, SOT-223 Package 50µA Quiescent Current 45µA IQ, 0.26V Dropout Voltage, SOT-223 Package 4.5A, 0.07 Internal Switch, SO-8 Package 15µA IQ, Reverse Battery Protection 500mV Dropout Voltage Drives External PNP Drives External N-Channel MOSFET High Efficiency, OPTI-LOOP® Compensation 20µA Quiescent Current, 20µVRMS Noise, ThinSOT Package 25µA Quiescent Current, 20µVRMS Noise, MSOP Package 30µA Quiescent Current, 20µVRMS Noise, SO-8 Package 20µVRMS Noise, MSOP Package 40µVRMS Noise, SOT-223 Package 30µVRMS Noise, ThinSOT Package
OPTI-LOOP is a registered trademark of Linear Technology Corporation. UltraFast and ThinSOT are trademarks of Linear Technology Corporation.
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
LT / TP 0602 2K · PRINTED IN USA
www.linear.com