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EV80C196Kx Evaluation Board
Developer's Manual
Order Number: 270738-002
Information this document provided connection with Intel® products. license, express implied, estoppel otherwise, intellectual property rights granted this document. Except provided Intel's Terms Conditions Sale such products, Intel assumes liability whatsoever, Intel disclaims express implied warranty, relating sale and/or Intel products including liability warranties relating fitness particular purpose, merchantability, infringement patent, copyright other intellectual property right. Intel products intended medical, life saving, life sustaining applications. Intel make changes specifications product descriptions time, without notice. Designers must rely absence characteristics features instructions marked "reserved" "undefined." Intel reserves these future definition shall have responsibility whatsoever conflicts incompatibilities arising from future changes them. EV80C196Kx contain design defects errors known errata which cause product deviate from published specifications. Current characterized errata available request.
Contact your local Intel sales office your distributor obtain latest specifications before placing your product order. Copies documents which have ordering number referenced this document, other Intel literature obtained calling 1-800-548-4725 visiting Intel's website http://www.intel.com. Copyright Intel Corporation, 2000 *Other brands names property their respective owners.
EV80C196Kx Developer's Manual
Contents
Introduction .1-1
Getting Started with EV80C196Kx .1-2 1.1.1 Powering Board .1-2 1.1.2 Connecting your .1-2 1.1.3 Starting Host Software .1-2
Hardware Overview .2-1
Hardware Overview EV80C196Kx .2-1 2.1.1 Processor .2-1 2.1.2 Memory .2-2 2.1.3 Host Interface .2-2 2.1.4 Digital I/O.2-2 2.1.5 Analog Inputs .2-2 2.1.6 Decoding .2-3
iRISM-iECM Software .3-1
Introduction iRISM-iECM Software .3-1 3.1.1 Features .3-1 3.1.2 Restrictions.3-2 Embedded Controller Monitor (ECM) .3-2 User Interface .3-3 3.3.1 Numeric Symbolic Input .3-3 3.3.2 Symbolic Output .3-3 3.3.3 Control Lengthy Commands .3-3 3.3.4 Aborting From iECM-96.3-4 3.3.5 Initiating Termination iECM-96 .3-4 3.3.5.1 ECM96.3-4 3.3.5.2 COM2 COM1 .3-4 3.3.5.3 DIAG .3-4 3.3.5.4 8096, 8096BH, C196KB .3-5 3.3.5.5 NOTYPES.3-5 3.3.5.6 POLL, SIGNAL .3-5 3.3.5.7 RESET SYSTEM, SYSTEM, RESET, .3-5 3.3.5.8 .3-6 3.3.5.9 QUIT .3-6
wFile Operations.4-1
Loading Saving Object Code.4-1 4.1.1 LOAD <filename> .4-1 4.1.2 LOADSYM <filename> .4-1 4.1.3 SAVE <addr> <addr> <filename>.4-2 Other File Operations .4-2 4.2.1 INCLUDE <filename> .4-3 4.2.2 PAUSE .4-3 4.2.3 LIST .4-3 4.2.4 LIST <filename> .4-3 4.2.5 .4-3
EV80C196Kx Developer's Manual
4.2.6 4.2.7 4.2.8
<filename>.4-3 LISTON LISTOFF.4-4 LOGON LOGOFF.4-4
Program Control .5-1
Resetting Target.5-1 Breakpoints .5-1 5.2.1 .5-2 5.2.2 [<bp_number>].5-2 5.2.3 [<bp_number>] <code_addr>.5-2 Program Execution.5-2 5.3.1 GO.5-3 5.3.2 FOREVER .5-3 5.3.3 FROM <code_addr> .5-3 5.3.4 FROM <code_addr> FOREVER.5-3 5.3.5 FROM <code_addr> TILL <code_addr>.5-3 5.3.6 FROM <code_addr> TILL <code_addr> <code_addr> .5-3 5.3.7 TILL <code_addr> .5-3 5.3.8 TILL <code_addr> <code_addr>.5-4 5.3.9 HALT .5-4 Program Stepping .5-4 5.4.1 {STEP SS}.5-5 5.4.2 {STEP <count>.5-5 5.4.3 {STEP FROM <code_addr> .5-5 5.4.4 {STEP FROM <code_addr> <count> .5-5
Displaying Modifying Program Variables.6-1
Supported Data Types .6-1 6.1.1 BYTE .6-1 6.1.2 CHAR .6-1 6.1.3 WORD .6-1 6.1.4 DWORD .6-1 6.1.5 REAL .6-1 6.1.6 STACK .6-2 6.1.7 STRING.6-2 BYTE Commands .6-2 6.2.1 BYTE <byte_address> .6-2 6.2.2 BYTE <byte_address> <byte_value> .6-2 6.2.3 BYTE <byte_address> <byte_address> .6-3 6.2.4 BYTE <byte_address> <byte_address> <byte_value>.6-3 WORD Commands .6-3 6.3.1 WORD <word_address> .6-3 6.3.2 WORD <word_address> <word_value> .6-4 6.3.3 WORD <word_address> <word_address> .6-4 6.3.4 WORD <word_address> <word_address> <word_value>.6-4 DWORD Commands .6-4 6.4.1 DWORD <dword_address>.6-4 6.4.2 DWORD <dword_address> <dword_value>.6-5 6.4.3 DWORD <dword_address> <dword_address>.6-5 6.4.4 DWORD <dword_address> <dword_address> <dword_value>.6-5
EV80C196Kx Developer's Manual
REAL Commands.6-5 6.5.1 REAL <real_address> .6-6 6.5.2 REAL <real_address> <real_value> .6-6 6.5.3 REAL <real_address> <real_address> .6-6 6.5.4 REAL <real_address> <real_address> <real_value> .6-6 STACK Commands .6-6 6.6.1 STACK <stack_address> .6-7 6.6.2 STACK <stack_address> <stack_address>.6-7 STRING Commands .6-7 Processor Variables .6-7
Assembly Disassembly .7-1
(Single Line Assembly) Commands .7-1 7.1.1 <code_addr> .7-1 7.1.2 ASM.7-1 Disassembly Commands.7-2 7.2.1 DASM .7-2 7.2.2 DASM <count> .7-2 7.2.3 DASM <code_addr>.7-2 7.2.4 DASM <code_addr>, <count> .7-2 7.2.5 DASM <code_addr> <code_addr>.7-2
Symbol Operations .8-1
SYMBOLS .8-1 SYMBOLS OFF.8-1 SYMBOLS ON.8-1 FLUSH.8-1
RISM.9-1
RISM Variables .9-1 9.1.1 RISM_DATA .9-1 9.1.2 RISM_ADDR .9-1 9.1.3 RISM_STAT .9-1 9.1.3.1 DLE_FLAG .9-1 9.1.3.2 RUN_FLAG.9-1 9.1.3.3 TRAP_FLAG.9-1 9.1.3.4 DIAGNOSTIC_FLAG .9-1 9.1.4 USER_PC .9-2 9.1.5 USER_PSW .9-2 9.1.6 Other Variables .9-2 RISM Structure .9-2 9.2.1 DLE_FLAG .9-2 9.2.2 RUN_FLAG .9-2 9.2.3 TRAP_FLAG .9-2 Receiving Data from Host .9-3 Sending Data Host .9-3 RISM Commands .9-3 9.5.1 SET_DLE_FLAG (Code 00H) .9-3 9.5.2 TRANSMIT (Code 02H) .9-3 9.5.3 READ_BYTE (Code 04H) .9-3 9.5.4 READ_WORD (Code 05H) .9-4
EV80C196Kx Developer's Manual
9.5.5 9.5.6 9.5.7 9.5.8 9.5.9 9.5.10 9.5.11 9.5.12 9.5.13 9.5.14 9.5.15 9.5.16 9.5.17 9.5.18 9.5.19 9.5.20 9.5.21 9.5.22
READ_DOUBLE (Code 06H) .9-4 WRITE_BYTE (Code 07H).9-4 WRITE_WORD (Code 08H).9-4 WRITE_DOUBLE (Code 09H) .9-4 LOAD_ADDRESS (Code 0AH) .9-4 INDIRECT_ADDRESS (Code 0BH) .9-4 READ_PSW (Code 0CH) .9-4 WRITE_PSW (Code 0x0D) .9-5 READ_SP (Code 0x0E) .9-5 WRITE_SP (Code 0x0F) .9-5 READ_PC (Code 0x10).9-5 WRITE_PC (Code 0x11) .9-5 START_USER (Code 0x12).9-5 STOP_USER (Code 0x13).9-5 TRAP_ISR.9-6 REPORT_STATUS (Code 0x14) .9-6 MONITOR_ESCAPE (Code 0x15) .9-6 Start Commands.9-6
Parts List Schematics Specific iRISM Information.
Reserved Functions Reserved Memory
Listing iRISM. Timing Analysis
Timing Analysis EV80C196Kx Board EV80C196Kx A.C. Characteristics
Programmable Logic Equations Memory Connector .F-1 Sample Session
EV80C196Kx Developer's Manual
Figures
2-10 2-11 EV80C196Kx Evaluation Board .1-1 Block Diagram 80C196Kx Board.2-1 Configuration Jumper Locations.2-5 Memory Configuration Jumper Locations.2-6 Expansion Ports, Connectors, LEDs .2-7 Host Serial Connector RS232.2-9 Host Serial Connector RS232.2-9 Analog Input Connector .2-10 Expansion Connector .2-11 Expansion Connector .2-12 Power Supply Connector .2-13 25-Pin 9-Pin Adaptor .2-13 Standard Memory Connector
Tables
Memory Configuration .2-2 Decoding .2-3 EPLD Factory Configuration.2-4 Default Jumper Settings .2-8 Parts List
EV80C196Kx Developer's Manual
Introduction
Intel® EV80C196Kx next-generation version EV80C196KB/KC/KD. HOLD/HLDA feature EV80C196Kx supported. EV80C196Kx designed software evaluation tool ROMless 80C196KB/KC 16-bit microcontroller. such, ports available ports unless offboard latches/buffers decoding logic used. unreserved functions EV80C196Kx available except Non-Maskable Interrupt (NMI), TRAP instruction, bytes address space. Chip Configuration Byte also used monitor, most functions provided external logic. Figure 1-1. EV80C196Kx Evaluation Board
128Kx8 JEDEC Memory
128Kx8 JEDEC Memory
PA28F200B5
80C196Kx
128Kx8 JEDEC Memory
16550
A7968-01
EV80C196Kx Developer's Manual
Introduction
1.1.1
Getting Started with EV80C196Kx
Powering Board
Power (+5, +/-12 Volts) must connected shown board's silk-screen next Figure 2-10. Included with board packet containing Molex connector crimp terminals your convenience. Power supply requirements EV80C196Kx board follows: (150 LED's disabled removing jumper shunt +12VDC+/-20%@ 15mA -12VDC+/-20%@ 15mA Upon power-up after reset) board goes through initialization shifting-pattern displayed Port LEDs when initialization completed properly.
1.1.2
Connecting your
Once have applied power board, need attach connector serial port. Connector configured interface pin-to-pin with standard nine-pin AT-type serial connector. Refer Figure pinout configuration. Make certain that cable providing nine signals, they needed proper operation host interface. When have connected cable, observe that EV80C196Kx held reset, LEDs turn This because host signals used reset part, signal often reset condition prior invoking host software your Note: have 25-pin serial port, will necessary make 25-pin 9-pin adaptor. Refer Figure 2-11 configuration adaptor.
1.1.3
Starting Host Software
After have made both connections board, invoke host interface. Install disk drive your system. prompt type "A:ECM96" <CR>. Your should eventually display iECM-96 monitor screen. have problems initiating terminating iECM-96, please refer Section 3.3.5 this manual. details using monitor, please refer Section this manual.
EV80C196Kx Developer's Manual
Hardware Overview
Hardware Overview EV80C196Kx
Intel® EV80C196Kx Microcontroller evaluation board delivered with EV80C196Kx, K-words K-bytes user code/data memory, UART host communications analog-input filtering with precision voltage reference. Also included programmable chip-select, bus-width wait-state-counter logic form integrated circuit proms, allowing configure board your system. board's physical dimensions l/2" 3/4" with overall height 3/4". There main sections EV80C196Kx board: Processor, Memory, Host Interface, Digital I/O, Analog Inputs Decoding. Figure 2-1. Block Diagram 80C196Kx Board
RS-232 Buffers
80C196Kx
Chip Select Buswidth READY Logic
Analog Input Digital
Analog Digital
Port0 Port1,2 HBO,
Address Data Control
256K FLASH
RAM/ EPROM
RAM/ EPROM
16650 UART
A7956-01
2.1.1
Processor
EV80C196Kx 16-bit embedded microcontroller. Being member Intel® MCS®96 family, EV80C196Kx uses same powerful instruction same architecture existing MCS®96 products. EV80C196Kx enhanced CMOS version 8097BH. Enhancements include up/down capture modes Timer2, multiplying speeds almost three times fast, overall execution nearly twice fast, Hold/Hold Acknowledge logic, power-down idle modes save power.
EV80C196Kx Developer's Manual
Hardware Overview
2.1.2
Memory
There three 32-pin memory sockets FLASH memory site provided EV80C196Kx board: 32-pin sockets designed support byte-wide, JEDEC-pinout memory devices various types sizes (i.e., SRAM EPROM). Ul/U3 connected 16-bit memory banks, connected 8-bit memory bank.
Table 2-1.
Memory Configuration
Bank Number Even Bytes I.C. Bytes I.C. Enable Signal Memory Type 256K 16-bit Monitor FLASH from 0-FFH 1D00-1DFFH ROMsim/RAM from 2000H-5FFFH ROMsim/RAM from 6000H-7FFFH
NOTE: Appendix Appendix details reserved areas memory.
2.1.3
Host Interface
host interface accomplished with 16550 UART (U20) connected RS-232 drivers. UART resides address range 1E00H 1EFFH. Therefore, register UART would address 1E00H EV80C196Kx, register would 1E0lH, register would 1E02H, etc., register 1E07H. registers will repeat again with register 1E08H limited decoding granularity EPLD. UART, OUTl#, used tell host when EV80C196Kx executing user code true level Ring Indicator input host serial port.
2.1.4
Digital
With exception input, which used Host Interface, Digital functions EV80C196Kx available. There eight LEDs on-board along with buffer/drivers that allow observe state Port HSO.0 Port 2.5/PWM. Refer Figure schematics Appendix location LEDs. pins EV80C196Kx (Port Port 2.1) connected RS-232 buffer/drivers, which connected signals available JP3. Refer Figure schematics Appendix pinout. Note: Since connected RS-232 receiver (U12 attempt digital input will result contention. would like digital input, remove jumper shunt disconnect receiver.
2.1.5
Analog Inputs
Port inputs EV80C196Kx double both digital analog inputs. EV80C196Kx board includes circuitry make analog inputs easier use. voltage source Vref provided board which carefully adjusted trimming RPl. Jumper shunt allows Vref connected instead output removing entirely, offboard reference connected JPl. removing jumper shunt ANGND isolated from Vss. Protective clamping diodes installed each channel. networks provided
EV80C196Kx Developer's Manual
Hardware Overview
sockets (allowing change input impedance match your application) analog input channels. Port used digital input, recommended that capacitors removed, resistors replaced with wires. ground power planes beneath analog circuitry (Dl, analog connections EV80C196Kx) isolated from digital power ground planes board keep noise from analog inputs. additional connection information, refer Figure schematics Appendix
2.1.6
Decoding
decoding logic EV80C196Kx board serves three purposes; provide Chip-Enable signals memory peripheral devices, select buswidth device(s) being accessed provide wait-states slow devices. This section provided case need modify memory configuration EV80C196Kx board. necessary understand this section normal usage board. heart decoding logic U11, 24-pin C22Vl0 programmable logic array which socketed allow easy changes. sake convenience will referred "the EPLD" throughout this text. EPLD uses latched addresses A8-Al5 along with CLKOUT, HLDA#, RESET# STALE (STretched ALE) from EV80C196Kx decode inputs. There enable outputs from EPLD, which low-level true; however, only should true time avoid contention. They decoded from address lines, internally-latched signal called MAP. Signal cleared when RESET# input true, when Monitor EPROMs accessed address range 1D00H-1DFFH. Signal will always when board USER mode.
Table 2-2.
Decoding
Assignment Description Enables memory (monitor FLASH shipped). (ADDRESS RANGE 2000H 27FF MAP) ADDRESS RANGE ADDRESS RANGE 1D00H 1DFFH CS510 CS510 Enables memory (user 16-bit ROMsim/RAM shipped). (ADDRESS RANGE 2000H 27FFH ADDRESS RANGE 2800H 5FFFH Enables memory (user 8-bit ROMsim/RAM shipped). ADDRESS RANGE 6000H 7FFFH Enables (16550 UART), used host communications. CS510 ADDRESS RANGE 1E00H 1EFFH
BUSWIDTH output EPLD, into buswidth EV80C196Kx. Therefore, driven accesses 8-bit memory high accesses 16-bit memory. shipped, goes simultaneously with CS510 these only areas memory mapped 8-bit. Programmed into EPLD 3-bit wait-state machine clocked rising edge CLKOUT from EV80C196Kx. transition sequence wait-state machine controlled current state machine inputs EPLD. Refer Appendix further details. While EV80C196Kx idle wait-state machine locked state which
EV80C196Kx Developer's Manual
Hardware Overview
called async-start. conditions leaving async_start being asserted, HLDA# being asserted value requiring wait-states. Because falling edge occur before next rising edge CLKOUT clock wait-state machine, signal called STALE (for Stretched ALE) used. Signal STALE does until after rising edge CLKOUT. During async_start, output WAIT# from EPLD asserted asynchronously based upon value A8-A15 requiring wait-states. wait-states required, WAIT# will asserted wait-state machine will remain async_start. However, more wait-states needed WAIT# will asserted wait-state machine will transition async_start next rising edge CLKOUT. next state entered depends many wait-states needed. only required next state remove_old, where WAIT# deasserted regardless inputs EPLD. wait-states needed next state hold_2, where WAIT# always asserted, then state after that remove-hold. additional states, hold_3 hold_7, work just like hold_2 with WAIT# always asserted. wait-state machine will count through from hold_2 hold_n generate wait-states before jumping remove_hold deassert WAIT#. maximum number wait-states seven. previous paragraph described signal WAIT# generated based rising edge CLKOUT. However, EV80C196Kx needs have valid signal it's READY input until falling edge CLKOUT. Therefore, necessary clock WAIT# through negative-edge-triggered-JK flip-flop (U15A) falling edge CLKOUT generate signal called WAITN#. EPLD, WAITN# asserted asynchronously while high WAIT# asserted. After goes low, WAITN# will remain asserted until WAIT# deasserted flip-flop clocked. Besides WAIT# signal, WAITN# signal asserted USEREADY signal from expansion bus. shipped, EPLD following configuration: Table 2-3. EPLD Factory Configuration
Memory Type ROMsim/RAM ROMsim/RAM Monitor FLASH 16550 UART Unimplemented Unimplemented Wait States Enable Signal CSUART Memory Region User Mode 2000H 5FFFH 6000H 7FFFH 0-FFH, 1D00H 1DFFH 1E00H 1EFFH 100H 1CFFH, C000H FFFFH 8000H BFFFH
EV80C196Kx Developer's Manual
Hardware Overview
Figure 2-2.
Configuration Jumper Locations
Analog Ground A-B: AVSS AVSS Analog Voltage Reference Source A-B: AVREF B-C: AVREF U4/U6 AVREF
Enable RESET from Host A-B: RESET from B-C: RESET from HLDA# A-B: HOLD/HLDA HOLD/HLA used
80C196KB A-B: B-C: UART Interrupt A-B: UART EXTINT B-C: UART
2000H 3FFFH Memory A-B: External B-C: Internal
from A-B: driven driven Select Wait State A-B: STALE B-C:
Enable A-B: Enabled Disabled
Note: asterisk indicates default setting.
A7947-01
EV80C196Kx Developer's Manual
Hardware Overview
Figure 2-3.
Memory Configuration Jumper Locations
FLASH Write Protect A-B: FLASH Write Enabled B-C: FLASH Write Protected Reset FLASH A-B: FLASH RESET B-C: FLASH
A-B: B-C:
U1/U3 A-B: B-C: Enable U1/U3 A-B: U1/U3 U1/U3 U1/U3 A-B: B-C:
Enable FLASH A-B: Enable VPPactive B-C: FLASH
E15, FLASH Page page E25, Stroke Select A-B: WRH#, WRL# from B-C: WRH#, WRL# from
A-B: B-C:
A-B: B-C: A-B: B-C:
A-B: TB-C:
Note: asterisk indicates default setting.
A7948-01
EV80C196Kx Developer's Manual
Hardware Overview
Figure 2-4.
Expansion Ports, Connectors, LEDs
Input Output Expansion Analog Input
External 16550 UART Memory Expansion
ANALOG INPUTS
DIGITAL
HOST INTERFACE
ON-CHIP UART
Power
Array
Internal 80196 UART
Note: asterisk indicates default setting.
A7949-01
EV80C196Kx Developer's Manual
SYSTEM
Hardware Overview
Table 2-4.
Default Jumper Settings
Jumper Pins none none none
EV80C196Kx Developer's Manual
Hardware Overview
Figure 2-5.
Host Serial Connector RS232
DB-9S RS232
Numbers (AB) (CD) (BA) (BB) (CF)
Host RS-232 Signal Name Signal Ground Data Terminal Ready Transmit Data Receive Data Data Carrier Detect
Connection Evaluation Board Digital Ground INIT thru E20-C 82510 82510 P1-pin
Numbers (CC) (CA) (CB) (CE) Host RS-232 Signal Name Data Ready Request Send Clear Send Ring Indicator Connection Evaluation Board Indicator
A7957-01
Figure 2-6.
Host Serial Connector RS232
DB-9S RS232
Numbers (AB) (CD) (BA) (BB) (CF)
Host RS-232 Signal Name Signal Ground Data Terminal Ready Transmit Data Receive Data Data Carrier Detect
Connection Evaluation Board Digital Ground INIT thru E20-A 80C196Kx 80C196Kx P2-pin
Numbers (CC) (CA) (CB) (CE) Host RS-232 Signal Name Data Ready Request Send Clear Send Ring Indicator Connection Evaluation Board Connection
A7958-01
EV80C196Kx Developer's Manual
Hardware Overview
Figure 2-7.
Analog Input Connector
2x13-Pin MOLEX 39-51-2604 Equivalent
ANGND VREF ANGND ANGND VREF ANGND ANGND VREF ANGND ANGND VREF ANGND VREF
Analog Channel VREF Analog Channel Analog Channel VREF Analog Channel Analog Channel VREF Analog Channel Analog Channel VREF Analog Channel ANGND
A7961-01
2-10
EV80C196Kx Developer's Manual
Hardware Overview
Figure 2-8.
Expansion Connector
2x25-Pin MOLEX 39-51-5004 Equivalent
P1.0 Bi-directional P1.1 Bi-directional P1.2 Bi-directional P1.3 Bi-directional P1.4 Bi-directional P1.5 BREQ# Bi-directional P1.6 HLDA# Bi-directional P1.7 HOLD# Bi-directional P2.0 Output P2.1 Bi-directional P2.2 Extint Input P2.3 T2CLK Input P2.4 T2RST Input P2.5 Output P2.6 T2UPDN Bi-directional P2.7 T2Capture Bi-directional HSO.0 Output HSO.1 Output HSO.2 Output HSO.3 Output HSI.0 Input HSI.1 Input HSI.2 HSO.4 Bi-directional HSI.3 HSO.5 Bi-directional
A7960-01
EV80C196Kx Developer's Manual
2-11
Hardware Overview
Figure 2-9.
Expansion Connector
2x30-Pin MOLEX 39-51-6004 Equivalent
Output Output Output Output
Bi-directional Bi-directional Bi-directional
Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Bi-directional Output BHE# Output UserReady Input INST Output P2.2 EXINT Bi-Directional Connection HOLD# Input +12VDC
Output Output Output Output Output Output Output Output Output Output Output Output CLKOUT Output Output BREQ# Output Output Input RESET# Output Connection HLDA# Output -12VDC
A7959-01
2-12
EV80C196Kx Developer's Manual
Hardware Overview
Figure 2-10. Power Supply Connector
6-Pin MOLEX 26-03-3041 Equivalent
Flag
-12VDC +12VDC +5VDC
Ground
A7962-01
Figure 2-11. 25-Pin 9-Pin Adaptor
25-Pin-to-pin Adapter
Shield Ground
Eval Board
Host
Note: Signal mneumonics reference host.
A7963-01
EV80C196Kx Developer's Manual
2-13
iRISM-iECM Software
Introduction iRISM-iECM Software
Intel® EV80C196Kx evaluation board uses Embedded Controller Monitor (ECM) written Intel® MCS®96 family 16-bit microcontrollers. This monitor supports basic debug facilities (LOAD, STEP etc.) user's target system. broken into independent programs, these executes EV80C196Kx (iRISM-96KB) other executes BIOS compatible clone (iECM-96). These programs communicate asynchronous serial channel using binary protocol defined specifically this application. partitioning into separate programs supports number goals development this system:
system easy adapt target because code which runs target very
simple small.
feature user interface limited resources target since user
interface implemented host
Concurrent operation target system easily achieved. This allows
interrogate (carefully) modify state target system while running. This manual section describes user interface provided iECM-96, interface between this resident software target resident software, structure software target. Appendix lists resources EV80C196Kx that reserved this RISM implementation. iECM-96 designed implemented Intel support users MCS®96 architecture, placed public domain with restrictions warranties kind.
3.1.1
Features
Host system BIOS-compatible clone. (Interfaces COMl
COM2 9600 baud.)
Sixteen software execution breakpoints Concurrent interrogation target memory registers Supports BYTE, CHARACTER, WORD, STRING, DOUBLE-WORD FPAL-96 REAL
variable types.
Single-Line Assembler/Disassembler Symbolic information compatible with Intel's debug records Supports LOAD, SAVE, LIST, LOG, command INCLUDE files.
EV80C196Kx Developer's Manual
iRISM-iECM Software
3.1.2
Restrictions
words user stack reserved iRISM-96 software. Other memory and/or registers target memory will used iRISM-96 software. exact number location this memory implementation dependent. Appendix Appendix further details. asynchronous serial port capable operation 9600 baud must available target system. RISM described this document uses Intel 82510 UART. This version also uses (Non-Maskable Interrupt) signal that received data character available. TRAP instruction reserved. Breakpoints program stepping will operate user's code EPROM other changeable memory.
Embedded Controller Monitor (ECM)
(Embedded Controller Monitor) provides basic debug capability installed your target system. Capabilities include loading object files into system RAM, examining modifying variables, executing code, stepping through code. past, most these monitors have been configured with standard "dumb" with some form auxiliary port loading saving object code from host system. common personal computer host program translation also emulate dumb during user interaction with ECM. developed MCS®96 family makes assumption that user interface will always personal computer; provision made interface dumb CRT. making this assumption possible reduce size complexity code that must installed target system. term been coined this code resident target RISM. term RISM stands Reduced Instruction Monitor obvious takeoff term RISC (Reduced Instruction Computer) used describe class computer architectures. RISM consists about bytes MCS®96 code which provide primitive operations. Software running host uses RISM commands provide complete user interface target system. advantage this approach that readily adapted different target systems requires only small part available target memory space. disadvantage that user interface must provided personal computer. structure RISM short section initialization code interrupt service routine (ISR) that processes interrupts from host system. RISM consists short prologue then case-jump command executors. These executors simple short; flow though entire (including prologue) 15-20 instructions. serial communication occurs 9600 baud, which limits frequency these interrupts KHz. worst case EV80C196Kx board will slowed execution fairly short RISM every millisecond while executing user code. possible operate EV80C196Kx board that real-time lost iECM-96 unless user actively interrogating target. Refer Section 3.3.5 description RISM REPORT_STATUS command details.
EV80C196Kx Developer's Manual
iRISM-iECM Software
User Interface
user interface iECM-96 supports commands initiate configure ECM-96, perform operations involving files, execute user programs, interrogate variables target system. Interrogation done number formats most cases done concurrently with user code execution. single line assembler disassembler also provided. Note: disk included with EV80C196Kx file called DEMO.LOG. DEMO.LOG sample iECM-96 session invoke become more familiar with features iECM-96. Appendix lists printout DEMO.LST which created turning list feature invoking DEMO.LOG typing "include demo.log" <CR> iECM-96 prompt.
3.3.1
Numeric Symbolic Input
command parser used iECM-96 software requires that numeric inputs always start with digits 0-9. hexadecimal numbers entered that start with they must preceded "0". example, enter "0AA55" instead "AA55". This requirement similar ASM-96. symbolic information been downloaded part object file (see "Loading Saving Object Code") then enter valid symbol name whenever number expected. symbol name must preceded period (".") that parser knows searching symbol table. symbol ambiguous then will accepted parser. probability ambiguous references reduced specifying module name along with symbol name. module name must preceded with colon ("."). variable TEMP declared both MODULE1 MODULE2, then reference TEMP declared MODULE1 would ":MODULEl.TEMP". PLM-96 C-96 line numbers called pound sign ("#") followed line number.
3.3.2
Symbolic Output
symbolic output routines, general, deal only with address information. They will convert data values into symbolic form. When symbol table searched symbol name associate with given value routines also perform type checking. one, only one, symbol matches both type value address being displayed then output routines will display symbol name along with numeric value address. more than label been assigned given address then symbolic output routines will ignore them. exception this rule occurs when disassembler finds multiple labels assigned given code address. disassembler will display known symbolic labels attached code address. symbols table gets very large, symbolic output routines will become slow, particularly 8088 based This problem avoided using modular programming translating subset modules debug mode. Another alternative "SYMBOLS OFF" command suppress symbolic output Symbolic input affected this command.
3.3.3
Control Lengthy Commands
Most commands supported iECM-96 appear complete without delay. Some commands (e.g., displaying filling large area memory) take appreciable length time complete. general these commands aborted entering CARRIAGE-RETURN. Commands that display large amount information paused hitting SPACE bar. After check data currently screen depress SPACE again resume output.
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3.3.4
Aborting From iECM-96
Entering control-C will cause iECM-96 close open files return DOS.
3.3.5
Initiating Termination iECM-96
This section describes commands invoking iECM-96 from exiting back DOS.
3.3.5.1
ECM96
This command, entered prompt, loads iECM-96 software executes Several options available with this command. Option strings always start with hyphen ("-") entered upper lower case. operation these options described below. these options entered order, options contradictory then actual option accepted last entered.
3.3.5.2
COM2 COM1
These options tell iECM-96 software which serial communication port used. neither these options entered then COMl will used default. iECM-96 detects valid (Clear Send) (Data Ready) signals from appropriate port will sign display command prompt. target stopped command prompt will asterisk ("*"). target already running prompt will greater-than sign (">").
3.3.5.3
DIAG
present, iECM-96 will complain about want proceed exit. possible, likely, that iECM-96 will operate properly even after complaining. more likely that there problem with serial port cabling which will prevent proper operation. problem obvious (e.g., disconnected cable power target hardware) then -DIAG invocation option used help isolate problem. -DIAG option puts iECM-96 system special mode which allows many tests used find interfacing problems, target bugs. diagnostic mode intended support debugging boards which iECM-96. particularly useful systems which have multiple address decoding modes, such EV80C196Kx. Upon reset this board EPROM location 2080H, address where EV80C196Kx starts execution. After executing some initialization code, board change address decoding that ROMsim/RAM available partition which contains 2080H RISM relocated another area. This allows download code which designed operate on-chip MSC96 family parts (2000H 3FFFH). diagnostic mode allows diagnostic routines which disappear from memory space when mapped into system. also provides simple routine check communications interface between host target. EV80C196Kx board, there serial port loop-back mode which allows debugging host/board interface. Upon reset board echo mode. Until receives ASCII slash ("/") reverse-slash ("\") will increment every character receives from host send incremented value back host. will also display binary code character board received Port LED. reverse slash received RISM will leave echo mode (set USER_MAP flag true), remap memory start normal operation. slash received, will stop echoing incremented received data start responding RISM commands with
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diagnostic flag set. this mode there diagnostic routines resident EPROM which useful debugging board. Initially after invoking diagnostic mode, Program Counter points beginning test 2200H. Refer Rismkb30.lst file diskette further details. Note: Note: target hardware will have reset before using DIAG command option. When executing diagnostic routines from EPROM, certain commands such Breakpoints Stepping will work they need modify code work properly. When host software invoked diagnostic mode will tell enter characters keyboard. These characters will sent target response from target will displayed screen. This simple confidence check serial communication channel. told enter slash reverse-slash terminate this mode proceed either diagnostic mode normal user's mode. user interface invoked without -DIAG option will immediately transmit reverse-slash which should target normal mode. Systems which implement diagnostic mode will load reverse slash into RISM_DATA register where will languish till more useful data sent host.
3.3.5.4
8096, 8096BH, C196KB
These three options control single line assembler disassembler iECM-96. 8096 (8x9x-90) 8096BH (8x9xBH) options selected then additional instructions EV80C196Kx will considered invalid both single line assembler disassembler. none these options selected then iECM-96 will default 96KB mode.
3.3.5.5
NOTYPES
This option will cause object file loader ignore type definition records object module. this invoked then symbolic routines will only recognize basic data types such BYTES, WORDS, LONGS. More complex data types such arrays structures will recognized. This option included because early versions host software confused while loading certain type definition records generated C-96. These problems have been fixed option left case similar problems remain.
3.3.5.6
POLL, SIGNAL
These options control host software detects whether user's code running. poll mode selected then host will periodically poll target with REPORT_STATUS command. This takes additional hardware forces target waste instruction cycles responding poll. signaling mode avoids this overhead requires that target Ring Indicator modem control line whenever running user code. user interface will then check this line before issues REPORT_STATUS command. neither these options selected then signal mode selected default. EV80C196Kx OUT1 82510 used generate this running signal. Therefore, signal mode recommend.
3.3.5.7
RESET SYSTEM, SYSTEM, RESET,
This command abbreviations will reset entire target hardware system target system implemented support this operation. EV80C196Kx jumper shunt must installed from this command work properly. This command operates dropping modem control line. This comes into target DSR. After dropping iECM-96 software
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will wait about second allow target complete initialization routines. iECM-96 will politely warn this time delay then ignore user until expires. Unless special precautions taken design target system, data (including downloaded object code) corrupted reset. EV80C196Kx, contents should affected RESET.
3.3.5.8
This command enables temporarily leave iECM-96 return DOS. Once have suspended iECM, perform other functions DOS, including using other software programs, such ASM-96, long there sufficient memory reenter iECM, type EXIT prompt. iECM will return with conditions effect time suspended.
3.3.5.9
QUIT
This command will close files that iECM-96 opened exit DOS. Note that this command used even target running. iECM-96 sets selected port 9600 baud, bits, parity, STOP bit. port will left this state iECM-96 when control returned DOS.
EV80C196Kx Developer's Manual
wFile Operations
iECM-96 uses files host system load save object code, enter predefined strings commands, keep commands that entered user, keep record entire debug session. debug session will include both characters entered user response generated iECM-96 host screen. commands that operate with files described following sections.
Loading Saving Object Code
iECM-96 accepts object files which generated Intel's development tools. iECM-96 will accept files which contain unresolved externals files which contain relocatable records. These files must passed through RL-96 order resolve externals and/or absolutely locate relocatable segments. iECM-96 will also accept format files. There utility disk (HEXOBJ.EXE) converting format files Intel object format files that loaded iECM-96. While still type "HEXOBJ <filename>.hex <filename>.obj" <CR> convert <filename>.hex usable format iECM-96. HEXOBJ does attempt convert symbolic information contained file. iECM-96 commands which operate object files are: LOAD <filename> LOADSYM <filename> SAVE <addr> <addr> <filename> metasymbol <filename> means that valid MS-DOS file name must entered that position command string.
4.1.1
LOAD <filename>
This command loads content records object file <filename> into target memory loads associated symbolic information into symbol table maintained host system's memory.
4.1.2
LOADSYM <filename>
This command loads symbolic information from <filename> into symbol table maintained host system does load content records into target's memory. This command useful when have left debug session with target still running program that been loaded. later time invoke iECM-96 interrogate running program without stopping LOADSYM command allows symbolic information contained object file without reloading content records. Content records cannot loaded while target running.
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wFile Operations
4.1.3
SAVE <addr> <addr> <filename>
This command saves region memory object file which reloaded into target memory some latter time. attempt made include symbolic information which have been symbol table maintained host system.
Other File Operations
addition object files, iECM-96 makes include files, files, list files. INCLUDE files contain commands executed iECM-96, they must contain exact sequence ASCII characters that would enter from keyboard execute command. INCLUDE files tedious generate with text editor iECM-96 generate files which stored characters entered user. intent that files used later include files recreate command sequences. List files keep running record both commands entered user response generated iECM-96. Comments included list files make them easier understand. comment starts with semicolon (";") ends with CARRIAGE-RETURN (CR) ESC. semicolon considered part comment ESC. command parser will ignore comments will them list files. Note: software disk included with EV80C196Kx file called DEMO.LOG. DEMO.LOG sample iECM-96 session invoke become more familiar with features iECM-96. Appendix lists printout DEMO.LST which created turning list feature invoking DEMO.LOG typing "include demo.log" <CR> iECM-96 prompt. list files commands allow default filenames allow either overwriting existing data file appending data file. This allows gather list data default files which avoids creation management large number separate files. list files stamped with date time whenever they opened make easier this capability then back sort data from several debug sessions with text editor. commands involved include, log, list operations are: INCLUDE <filename> PAUSE LIST LIST <filename> <filename> LISTON LOGOFF LOGON Three these commands require supply valid file name, rest appropriate file name that already been entered.
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wFile Operations
4.2.1
INCLUDE <filename>
This command will attempt open <filename> read only file. file opened then command parser will take commands from that file until file reached. include file will then closed. Only include file will opened time.
4.2.2
PAUSE
This command documented this section because intended used part INCLUDE files. really file oriented command itself. When this command entered iECM-96 will stop parsing commands until SPACE character entered from keyboard; can't come from INCLUDE file. This provides method pausing middle INCLUDE file operation until have chance what's going acknowledge pause condition depressing SPACE bar.
4.2.3
LIST
This command behaves like LIST <filename> command described below except that uses last <filename> that entered part LIST <filename> command. such command been entered then default filename "LIST.ECM" will used.
4.2.4
LIST <filename>
This command will attempt open <filename> writable file. file with <filename> already exists then iECM-96 will file overwritten data should appended existing file. will then open file stamp with current date time from system clock. After this, commands entered user responses generated iECM-96 will recorded file.
4.2.5
This command behaves like <filename> command described below except that uses last <filename> that entered part <filename> command. such command been entered then default filename "LOG.ECM" will used.
4.2.6
<filename>
This command will attempt open <filename> writable file. file with <filename> already exists then iECM-96 will file overwritten data should appended file. will then open file stamp with current date time. After this, commands entered user will recorded file. Note that this file contain printable characters (e.g., ESC).
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4.2.7
LISTON LISTOFF
LISTOFF closes LIST file that been specified LIST command. This stops list information from being recorded. LISTON re-opens list file append mode that recording start again. LISTON also stamps list file with current date time from system clock.
4.2.8
LOGON LOGOFF
LOGOFF closes file that been specified command. This stops list information from being recorded. LOGON re-opens file append mode that recording start again. LOGON also stamps list file with current date time from system clock.
EV80C196Kx Developer's Manual
Program Control
Commands which control program execution allow reset processor, execution breakpoints, start execution, stop execution, step, super step. this section, commands will grouped their major function.
Resetting Target
processor reset executing iECM-96 command: RESET CHIP This command physically resets processor setting RISM-DATA register 0XXXX0001 issuing MONITOR_ESC RISM command, causing target perform instruction.
Breakpoints
iECM-96 provides sixteen program execution breakpoints. given breakpoint inactive zero, active then address first byte instruction. Breakpoints addresses that first byte instruction will cause unpredictable errors execution user's code. When execution started, iECM-96 saves user code byte active breakpoint substitutes TRAP instruction that byte. Executing TRAP instruction will cause iECM-96 restore user code bytes where TRAP instructions were substituted then decrement user's program counter that points original instruction. user's program will appear stop execution immediately before executing instruction with breakpoint TRAPS will removed from user's code original code restored. Note: Most monitor programs similar iECM-96 display message console when break occurs (e.g., "Program break 1234H"). This done iECM-96 because system supports concurrent interrogation target which user's code running; possible that break will occur while middle displaying modifying state target. special break message would have interrupt execution command. Because this, iECM-96 does output special break message. There ways find that break occurred: prompt will change from greater-than (">") asterisk ("*"). status processor shown "control panel" console screen will change from "running" "stopped". Commands which breakpoint array are: [<bp_number>] [<bp_number>] <code_addr>
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square brackets latter commands part command syntax must entered user, angle brackets part "meat" language used describe syntax. Breakpoints displayed while your code running they cannot modified. Note: BR[0] BR[l] also command using TILL clause; breakpoints will cleared command FOREVER clause used.
5.2.1
This command will display active breakpoints (i.e., those zero). will also informed breakpoints active.
5.2.2
[<bp_number>]
This command will display setting selected breakpoint wait input from you. enter CARRIAGE-RETURN command will terminate. enter next sequential breakpoint will displayed. enter numeric value then selected breakpoint will loaded with value iECM-96 will again wait input. this point enter either CARRIAGE-RETURN ESC. before, will cause iECM-96 display next breakpoint CARRIAGE-RETURN will terminate command. This command will wrap around from last breakpoint (15t) first breakpoint (0).
5.2.3
[<bp_number>] <code_addr>
This command sets specific breakpoint specified <bp_number> value <code_addr>.
Program Execution
These commands start stop execution user code. commands provided are: FOREVER FROM <code_addr> FROM <code_addr> FOREVER FROM <code_addr> TILL <code_addr> FROM <code_addr> TILL <code-addr> <code_addr> TILL <code_addr> TILL <code_addr> <code_addr> HALT with breakpoint command entered, user code bytes breakpoints will saved TRAPS will installed. When breakpoint reached user's software will stop before instruction which caused breakpoint IECM-96 software will restore original user code. Note that this different from operation iSBE-96 (and most modules) which stop just after instruction executes. problem associated with stopping before break instruction executes that subsequent commands into breakpoint before user code executed. iECM-96 avoids this problem skipping setting breakpoints
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instruction that current points this happens remove last breakpoint then will warned will still execute with breakpoints enabled. this happens HALT command stop program. None commands executed while user's code already running; HALT command cannot executed user's code running. commands which breakpoints BP[0] possibly BP[l]. break value already these breakpoints will overwritten destroyed these commands. possible user should reserve first breakpoints commands remaining breakpoints required) explicitly with commands.
5.3.1
This command starts execution user's code using current value user's current breakpoint array.
5.3.2
FOREVER
This command clears breakpoint array starts execution current value user's
5.3.3
FROM <code_addr>
This command loads user's with <code_addr> starts execution user's code using current breakpoint array.
5.3.4
FROM <code_addr> FOREVER
This command loads user's with <code_addr>, clears breakpoint array, starts execution user's code.
5.3.5
FROM <code_addr> TILL <code_addr>
This command loads user's with <code_addr> which follows FROM keyword, sets first breakpoint (BP[0]) <code_addr> which follows TILL keyword, then starts execution user's code.
5.3.6
FROM <code_addr> TILL <code_addr> <code_addr>
This command acts like previous command except that also sets second breakpoint (BP[l]) <code_addr> which follows keyword.
5.3.7
TILL <code_addr>
This command sets first breakpoint (BP[0]) <code_addr> then starts execution user code using current setting user's breakpoint array.
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5.3.8
TILL <code_addr> <code_addr>
This command acts like previous command except that also sets second breakpoint (BP[1]) <code_addr> that follows keyword.
5.3.9
HALT
This command stops execution user code forcing processor execute jump self instruction reserved location.
Program Stepping
These commands allow stepping through programs instruction time. Between instructions iECM-96 commands used check state variables changed instruction ensure that program operating properly. Stepping through code allows more detailed look what going program. price that paid this detail that stepping does occur real time; this makes difficult perhaps impossible code that tied real time events. Stepping while interrupts enabled would confusing since interrupt service routines will stepped through well sequential code. iECM-96 avoids this problem artificially locking interrupts while stepping, ignoring state interrupt enable (El) interrupt mask. Super-stepping similar stepping except that interrupts artificially suppressed. Also, interrupt service routine subroutine call (and body subroutine that called) treated indivisible instruction super-step command. This allows user ignore details subroutines interrupt service routines while checking code. Every time instruction "super-stepped", service routines associated with enabled pending interrupts will executed. This allow limited stepping through code while operating concurrent environment system will operate real time. better approach command execute specified breakpoint then step through code being tested looking proper operation. iECM-96 implements step operation using TRAP instruction. step over given instruction iECM-96 determines possible subsequent instructions places TRAPS these locations. After doing this allows user's program execute until runs into these TRAPS then restores user code bytes which were overwritten with TRAPS. iECM-96 step over conditional branch, possible subsequent instructions exist sequential code program. other instruction only have "next" instruction. TRAP also location 2080H case target reset during step. Super-stepping accomplished setting TRAPS like STEP except CALL instructions which treated special case. During STEP iECM-96 will TRAP target address call; during super-step TRAP will placed instruction following CALL. Interrupts suppressed during STEP (not operations saving user's bit, clearing before STEP occurs, then restoring order make sure instruction which executed does modify bit, several instructions (PUSHF, POPF, PUSHA, POPA, simulated iECM-96 software rather than being executed target processor. EV80C196Kx instruction IDLPD also simulated during STEP prevent target from locking simulation treats IDLPD byte NO-OP. Note that simulation instructions only occurs during STEP operations During command instructions executed target.
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iECM-96 commands which implement step operations are: STEP STEP <count> STEP FROM <code_addr> STEP FROM <code_addr> <count> <count> FROM <code_addr> FROM <code_addr> <count> Aside from style actual step operation, STEP commands behave same. They will described together will called single-stepping.
5.4.1
{STEP
This command single-steps time.
5.4.2
{STEP <count>
This command single-steps <count> times.
5.4.3
{STEP FROM <code_addr>
This command loads user's (PC) with <code_addr> then single-steps time.
5.4.4
{STEP FROM <code_addr> <count>
This command loads user's (PC) with <code_addr> then single-steps <count> times.
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Displaying Modifying Program Variables
iECM-96 provides commands display modify program variables several formats. addition simple variables such bytes words, more complicated variables such reals character strings supported. iECM-96 commands allow variables displayed initialized either individually regions memory which contain variables given type.
6.1.1
Supported Data Types
BYTE
BYTE eight-bit variable. alignment rules enforced BYTE variables.
6.1.2
CHAR
CHAR special case BYTE. CHAR variables displayed ASCII characters.
6.1.3
WORD
WORD 16-bit variable. address WORD address least significant byte. WORD must start even byte address.
6.1.4
DWORD
DWORD 32-bit variable. address DWORD address least significant byte. DWORD must always start even byte address. DWORD variable accessed register 8096 instruction then more restrictive alignment rule enforced: must start address which evenly divisible This more restrictive alignment rule will only apply iECM-96 commands when using single line assembler.
6.1.5
REAL
REAL 32-bit binary floating point number which conforms FPAL96 definition. bits contain sign bit, 8-bit exponent field, 23-bit fraction field. iECM-96 commands standard scientific notation deal with REAL numbers. Note that FPAL96 special representations infinity, NaN's (Not Number-used signal error conditions). iECM-96 detects these special values, will output appropriate text string instead trying display value scientific notation.
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6.1.6
STACK
STACK variable 16-bit variable which resides system stack. addresses stack variables <stack_addr> taken relative current stack pointer must word aligned.
6.1.7
STRING
STRING sequence ASCII characters which terminated character. ASCII character binary value zero. addition supporting access variables above types, iECM-96 also provides commands access special program variables (program counter), (program status word) (stack pointer). These commands discussed Section 6.8.
BYTE Commands
There four forms BYTE commands: BYTE <byte_address> BYTE <byte_address> <byte_value> BYTE <byte_address> <byte_address> BYTE <byte_address> <byte_address> <byte_value> these commands used whether user's program running.
6.2.1
BYTE <byte_address>
This form used examine then possibly change more sequential BYTE variables. When this command invoked, iECM-96 will display <byte_address> symbolically valid symbol exists that <byte_address>. Whether symbolic display occurs, iECM-96 will display <byte_address> hexadecimal notation, value BYTE default base wait input from you. respond with CARRIAGE-RETURN character, character, entering numeric value. CARRIAGE-RETURN will terminate command. will result display next sequential BYTE variable. numeric value entered then BYTE variable will this value iECM-96 will again wait input. this point respond only with CARRIAGE-RETURN. before, will display next sequential BYTE CARRIAGE-RETURN will terminate command.
6.2.2
BYTE <byte_address> <byte_value>
This form used individual BYTE variable without first checking current value. When invoked, this command sets BYTE variable <byte_address> <byte_value>.
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6.2.3
BYTE <byte_address> <byte_address>
This form used display region memory sequence BYTE variables. When this command invoked, iECM-96 will start displaying current default base then series lines showing contents selected memory region. symbol exists iECM-96's symbol table next <byte_address> then this symbol will displayed. Whether symbolic display happens, next line will start with hexadecimal display address next BYTE variable displayed followed display bytes memory BYTE variables default base. line will started whenever bytes memory have been displayed line valid symbol exists iECM-96's symbol table next <byte_address> displayed. command terminates when BYTE variables selected range have been displayed. During lengthy displays stop output console hitting SPACE bar. display resumed hitting SPACE second time. command terminated entering CARRIAGE-RETURN.
6.2.4
BYTE <byte_address> <byte_address> <byte_value>
This form used initialize region memory given <byte_value>. Note that this command will take little over millisecond 9600 baud) each BYTE loaded. This command terminated entering CARRIAGE-RETURN, this leaves only part memory region initialized.
WORD Commands
There four basic forms WORD commands: WORD <word_address> WORD <word_address> <word_value> WORD <word_address> <word_address> WORD <word_address> <word_address> <word_value> these commands used whether user's program running.
6.3.1
WORD <word_address>
This form used examine then possibly change more sequential WORD variables. When this command invoked iECM-96 will display <word_address> symbolically valid symbol exists that <word_address>. Whether symbolic display occurs, iECM-96 will display <word_address> hexadecimal notation, value WORD default base wait input from you. respond with CARRIAGE-RETURN character, character, entering numeric value. CARRIAGE-RETURN will terminate command. will result display next sequential WORD variable. numeric value entered then WORD variable will this value iECM-96 will again wait input. this point respond only with CARRIAGE-RETURN. before, will display next sequential WORD CARRIAGE-RETURN will terminate command.
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6.3.2
WORD <word_address> <word_value>
This form used individual WORD variable without first checking current value. When invoked, this command sets WORD variable <word_address> <word_value>.
6.3.3
WORD <word_address> <word_address>
This form used display region memory sequence WORD variables. When this command invoked, iECM-96 will start displaying current default base then series lines showing contents selected memory region. symbol exists iECM-96's symbol table next <word_address> then this symbol will displayed. Whether symbolic display happens, next line wild start with hexadecimal display address next WORD variable displayed followed display bytes memory WORD variables default base. line will started whenever bytes memory have been displayed line valid symbol exists iECM-96's symbol table next <word_address> displayed. command terminates when WORD variables selected range have been displayed. During lengthy displays stop output console hitting SPACE bar. display resumed hitting SPACE second time. command terminated entering CARRIAGE-RETURN.
6.3.4
WORD <word_address> <word_address> <word_value>
This form used initialize region memory given <word_value>. Note that this command will take little over millisecond 9600 baud) each WORD loaded. This command terminated entering CARRIAGE-RETURN, this leaves only part memory region initialized.
DWORD Commands
There four basic forms DWORD commands: DWORD <dword_address> DWORD <dword_address> <dword_value> DWORD <dword_address> <dword_address> DWORD <dword_address> <dword_address> <dword_value> these commands used whether user's program running.
6.4.1
DWORD <dword_address>
This form used examine then possibly change more sequential DWORD variables. When this command invoked iECM-96 will display <dword_address> symbolically valid symbol exists that <dword_address>. Whether symbolic display occurs, iECM-96 will display <dword_address> hexadecimal notation, value DWORD default base wait input from you. respond with CARRIAGE-RETURN character, character, entering numeric value. CARRIAGE-RETURN will terminate command. will result display next sequential DWORD variable. numeric
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value entered then DWORD variable will this value iECM-96 will again wait input. this point respond only with CARRIAGE-RETURN. before, will display next sequential DWORD CARRIAGE-RETURN will terminate command.
6.4.2
DWORD <dword_address> <dword_value>
This form used individual DWORD variable without first checking current value. When invoked, this command sets DWORD variable <dword_address> <dword_value>.
6.4.3
DWORD <dword_address> <dword_address>
This form used display region memory sequence DWORD variables. When this command invoked, iECM-96 will start displaying current default base then series lines showing contents selected memory region. symbol exists iECM-96's symbol table next <dword_address> then this symbol will displayed. Whether symbolic display happens, next line will start with hexadecimal display address next DWORD variable displayed followed display bytes memory DWORD variables default base. line will started whenever bytes memory have been displayed line valid symbol exists iECM-96's symbol table next <dword_address> displayed. command terminates when DWORD variables selected range have been displayed. During lengthy displays stop output console hitting SPACE bar. display resumed hitting SPACE second time. command terminated entering CARRIAGE-RETURN.
6.4.4
DWORD <dword_address> <dword_address> <dword_value>
This form used initialize region memory given <dword_value>. Note that this command will take little over millisecond 9600 baud) each DWORD loaded. This command terminated entering CARRIAGE-RETURN this leaves only part memory region initialized.
REAL Commands
There four basic forms REAL commands: REAL <real_address> REAL <real_address> <real_value> REAL <real_address> <real_address> REAL <real_address> <real_address> <real_value> these commands used whether user's program running.
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6.5.1
REAL <real_address>
This form used examine then possibly change more sequential REAL variables. When this command invoked iECM-96 will display <real_address> symbolically valid symbol exists that <real_address>. Whether symbolic display occurs, iECM-96 will display <real_address> hexadecimal notation, value REAL default base wait input from you. respond with CARRIAGE-RETURN character, character, entering numeric value. CARRIAGE-RETURN will terminate command. will result display next sequential REAL variable. numeric value entered then REAL variable will this value iECM-96 will again wait input. this point respond only with CARRIAGE-RETURN. before, will display next sequential REAL CARRIAGE-RETURN will terminate command.
6.5.2
REAL <real_address> <real_value>
This form is-used individual REAL variable without first checking current value. When invoked, this command sets REAL variable <real_address> <real_value>.
6.5.3
REAL <real_address> <real_address>
This form used display region memory sequence REAL variables. When this command invoked, iECM-96 will display series lines showing contents selected memory region. symbol exists iECM-96's symbol table next <real_address> then this symbol will displayed. Whether symbolic display happens, next line will start with hexadecimal display address next REAL variable displayed followed display bytes memory REAL variables default base. line will started whenever bytes memory have been displayed line valid symbol exists iECM-96's symbol table next <real_address> displayed. command terminates when REAL variables selected range have been displayed. During lengthy displays stop output console hitting SPACE bar. display resumed hitting SPACE second time. command terminated entering CARRIAGE-RETURN.
6.5.4
REAL <real_address> <real_address> <real_value>
This form used initialize region memory given <real_value>. Note that this command will take little over millisecond 9600 baud) each REAL loaded. This command terminated entering CARRIAGE-RETURN, this leaves only part memory region initialized.
STACK Commands
There basic forms STACK commands: STACK <stack_address> STACK <stack_address> <stack_address> Both these commands used whether user's program running.
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Displaying Modifying Program Variables
6.6.1
STACK <stack_address>
This command useful accessing 16-bit variable which known fixed offset system stack. When this command invoked, iECM-96 executes WORD <word_address> command where <word_addr> formed adding <stack_address> current value system stack pointer.
6.6.2
STACK <stack_address> <stack_address>
This command useful accessing sequence 16-bit variables which known start fixed offset system stack. When this command invoked, iECM-96 executes WORD <word_address> <word_address> command where both <word_address> fields formed adding corresponding <stack_address> current value system stack pointer. During lengthy displays stop output console hitting SPACE bar. display resumed hitting SPACE second time. command terminated entering CARRIAGE-RETURN.
STRING Commands
There only form STRING command: STRING <byte address> symbol exits <byte_address> iECM-96's symbol table, this symbol will displayed. Whether symbolic display happens, next line will start with hexadecimal display <byte_address> followed terminated ASCII string starting that address. long strings only first characters displayed. When trailing characters stripped, decimal points (".") substituted first three characters stripped.
Processor Variables
Several commands provided access variables which associated with processor rather than with program: <byte_address> <word_value> <word_address> processor variables modified only while target stopped, they read time. These commands allow display loading program counter (PC), program status word (PSW) stack pointer (SP). display default base. Note: examination will confusing don't understand following paragraphs. iECM-96 software uses words user's stack store during host interface interrupt. When user displays uses STACK command) value shown adjusted bytes compensate this overhead that becomes more less invisible user (the user must still allow extra stack space used). This convenient
EV80C196Kx Developer's Manual
Displaying Modifying Program Variables
creates confusion display using command then WORD command look location which register address stack pointer. Location will less than "SP". additional consideration what happens when attempt write into stack pointer using command. Before returning from RISM interrupt service routine (ISR) which actually updates stack pointer, RISM places stack return address associated idle loop executes while target "`stopped". This prevents target from getting lost upon return from ISR. should attempt modify stack pointer from console through register address (18H); should only modified commands execution user code target. This decreases possibility target getting confused. Specific implementations RISM actually prevent user from writing into "WORD thereby force user "SP" command.
EV80C196Kx Developer's Manual
Assembly Disassembly
iECM-96 supports examination modification code memory using standard mnemonics Intel® MCS®96 assembler (ASM-96). Although standard mnemonics used, iECM-96 does build symbol table user symbols assembly mnemonics entered. This makes single-line assembler (SLA) because references never made information entered other lines. labels generated SLA, although labels which loaded symbolic information along with object code when file translated debug mode been loaded. iECM-96 will accept mnemonics instructions which actually executed target processor. will accept "generic" instructions such CALL which processed ASM-96 into standard MCS®96 instructions. will accept SCALL LCALL which specific instructions MCS®96 processors understand.
(Single Line Assembly) Commands
commands which invoke are: <code_address> useful writing short on-line code pieces testing patching programs, intended replacement true assembler, such ASM-96. invoked whether user code running, there obvious danger modifying code that being executed.
7.1.1
<code_addr>
This command causes iECM-96 software enter mode. assembly program counter (APC) will <code_addr> lines `assembly language' entered user will converted object code loaded into target's memory. iECM-96 will complain erroneous inputs made will remain mode. This mode terminated entering only `directive' understood SLA: END.
7.1.2
This command operates identically <code_addr> command except that initialized. this first time that been used then will 2080H, then will point byte following last instruction generated SLA.
EV80C196Kx Developer's Manual
Assembly Disassembly
Disassembly Commands
disassembler converts binary object code target memory ASM-96 mnemonics. There several commands which invoke disassembler: DASM DASM <count> DASM <code_addr> DASM <code_addr>,<count> DASM <code_addr> <code_addr> These commands useful examining portion program which listings available checking program patches, used whether user code running.
7.2.1
DASM
This command disassembles instructions currently pointed user's program counter (PC).
7.2.2
DASM <count>
This command reads current value user's program counter (PC) disassembles <count> instructions starting that location. parameter <count> must less than 256T (l00H) that command parser distinguish this command from command "DASM <code_addr>. This restriction does apply DASM <code_addr>, <count> instruction. During lengthy displays stop output console hitting SPACE bar. display resumed hitting SPACE second time. command terminated entering CARRIAGE-RETURN.
7.2.3
DASM <code_addr>
This command disassembles instruction <code_addr>. parameter <code_addr> must greater equal 256T (100H) that command parser distinguish from DASM <count> instruction.
7.2.4
DASM <code_addr>, <count>
This command disassembles <count> instructions starting with <code_addr>. During lengthy displays stop output console hitting SPACE bar. display resumed hitting SPACE second time. command terminated entering CARRIAGE-RETURN.
7.2.5
DASM <code_addr> <code_addr>
This command disassembles region memory specified. instruction crosses ending address region, completely disassembled before command terminates. During lengthy displays stop output console hitting SPACE bar. display resumed hitting SPACE second time. command terminated entering CARIAGE-RETURN.
EV80C196Kx Developer's Manual
Symbol Operations
iECM-96 supports several commands dealing with symbolic information that loaded along with object code. commands are: SYMBOLS SYMBOLS SYMBOLS FLUSH additional command, "LOADSYM <filename>" used load iECM-96's symbol table without affecting target's memory. This command described Section
SYMBOLS
This command displays symbols that currently iECM-96's symbol table.
SYMBOLS
This command suppresses searching symbol table during output. does prevent symbol table during input. This command provided because symbolic output with large symbol tables very slow.
SYMBOLS
This command re-enables symbolic output.
FLUSH
This command deletes symbols currently symbol table.
EV80C196Kx Developer's Manual
RISM
This section will describe elements RISM which will common implementations. Additional documentation this implementation Appendix Appendix
9.1.1
RISM Variables
RISM_DATA
RISM_DATA 32-bit register which acts primary data interface between software running host RISM running target.
9.1.2
RISM_ADDR
RISM_ADDR 16-bit register which contains address used reading whiting target memory.
9.1.3
RISM_STAT
RISM_STAT 8-bit register used store RISM status state information. This register contains following Boolean flags:
9.1.3.1
DLE_FLAG
This flag indicates next character received RISM should treated data byte even value corresponds implemented command.
9.1.3.2
RUN_FLAG
This flag indicates that target running user code.
9.1.3.3
TRAP_FLAG
This flag indicates that target running user code that software TRAP occurred which suspended execution.
9.1.3.4
DIAGNOSTIC_FLAG
This optional flag that indicates that target operating diagnostic mode. details this implementation dependent.
EV80C196Kx Developer's Manual
RISM
9.1.4
USER_PC
USER_PC used save user program counter while user code executing.
9.1.5
USER_PSW
USER_PSW used save user program status word while user code executing.
9.1.6
Other Variables
Specific implementations RlSMs will require other variables used temporary storage.
RISM Structure
RISM resides target system provides interface between target system user interface which resides host system. design goal RISM keep compact simple. This serves purposes: RISM reside user system with minimal impact available memory. RISM easy port into target's environment. goals were keeping internal state structure RISM simple possible. There only three internal flags which change that RISM deals with character sent host.
9.2.1
DLE_FLAG
this flag then next received character assumed data byte opposed command byte.
9.2.2
RUN_FLAG
This flag target running user code. modify operation some RISM commands.
9.2.3
TRAP_FLAG
This flag user code been halted because executed TRAP instruction. TRAP_FLAG cleared whenever RISM starts execution user code.
EV80C196Kx Developer's Manual
RISM
Receiving Data from Host
When RISM receives character from host first task determine represents command data. character less than (decimal) then assumed command, then taken data. host needs send data byte which value less than then first must issue SET_DLE command. DLE_FLAG then next character received RISM will interpreted data (even less than then DLE_FLAG will cleared. Once RISM determined that received character data byte processes shifting 32-bit RISM_DATA register left eight places then placing data byte lower byte RISM_DATA register. data shifted upper byte RISM_DATA register discarded.
Sending Data Host
When host expects data returned from RISM sends TRANSMIT command byte waits response. RISM transmits lower byte 32-bit RISM_DATA register right shifts RISM_DATA register right eight bits. part this command RISM increments RISM_ADDR register. RISM only transmits data response TRANSMIT command, never initiative even response other commands from host.
RISM Commands
This section will detail operation each commands sent RISM.
9.5.1
SET_DLE_FLAG (Code 00H)
This command sets DLE_FLAG. This will force next character received RISM treated data even value corresponds RISM command. code which overrides normal selection command data also clears DLE_FLAG that applies only first character received after SET_DLE_FLAG command.
9.5.2
TRANSMIT (Code 02H)
This command will transmit lower eight bits RISM_DATA register host, right shift data register eight places, increment RISM_ADDR register. Sequential TRANSMIT commands used read RISM_DATA register RISM_ADDR register indicates address that corresponds least significant byte RISM_DATA register.
9.5.3
READ_BYTE (Code 04H)
This command will read byte memory pointed RISM_ADDR register place result least significant byte RISM_DATA register.
EV80C196Kx Developer's Manual
RISM
9.5.4
READ_WORD (Code 05H)
This command will read word memory pointed RISM_ADDR register place result least significant word RISM_DATA register.
9.5.5
READ_DOUBLE (Code 06H)
This command will read double-word memory pointed address register place result RISM_DATA register.
9.5.6
WRITE_BYTE (Code 07H)
This command stores least significant byte RISM_DATA register byte memory pointed RISM_ADDR register increments RISM_ADDR register one) point next memory byte.
9.5.7
WRITE_WORD (Code 08H)
This command stores least significant word RISM_DATA register word memory pointed RISM_ADDR register increments RISM_ADDR register two) point next memory word.
9.5.8
WRITE_DOUBLE (Code 09H)
This command stores RISM_DATA register double-word memory pointed RISM_ADDR register increments RISM_ADDR register four) point next memory double-word.
9.5.9
LOAD_ADDRESS (Code 0AH)
This command loads RISM_ADDR register with least significant word RISM_DATA register.
9.5.10
INDIRECT_ADDRESS (Code 0BH)
This command reads memory word pointed RISM_ADDR stores into RISM_ADDR register. RISM_DATA register modified this command.
9.5.11
READ_PSW (Code 0CH)
This command loads RISM_DATA register with (Program Status Word) associated with user code. Most RISM implementations will have check RUN_FLAG determine access user PSW.
EV80C196Kx Developer's Manual
RISM
9.5.12
WRITE_PSW (Code 0x0D)
This command loads (Program Status Word) associated with user code from RISM_DATA register. Host software only invokes this command while user code running.
9.5.13
READ_SP (Code 0x0E)
This command loads RISM_DATA register with (Stack Pointer) associated with user code.
9.5.14
WRITE_SP (Code 0x0F)
This command loads (Stack Pointer) from RISM_DATA register. This command must also push values into newly created stack area. These values (first) (second) associated with idle loop which executes while user code running. host software will only invoke this command while user code running.
9.5.15
READ_PC (Code 0x10)
This command loads RISM_DATA register with (Program Counter) associated with user code. Most RISM implementations will have check RUN_FLAG determine access user
9.5.16
WRITE_PC (Code 0x11)
This command loads (Program Counter) associated with user code from RISM_DATA register. host software will only invoke this command while user code running.
9.5.17
START_USER (Code 0x12)
This command responsible starting execution user code, clearing TRAP_FLAG, setting RUN_FLAG. action this command relies being executed part (interrupt service routine). start current pushed into stack. user code running which pushed into stack will associated with idle loop which RISM runs while waits interrupt. START_USER command deletes from stack replaces them with USER_PC USER_PSW. When control returns from user code will execute rather than idle loop. host software will issue command user code already running.
9.5.18
STOP_USER (Code 0x13)
This command responsible stopping execution user code clearing RUN_FLAG. action HALT command mirrors that command. case HALT command, user pushed into stack upon entry ISR. STOP_USER command saves this user information USER_PC USER_PSW replaces with values, which sorted with idle loop. When control returns from ISR, idle loop executes, rather than user code. host software will issue HALT command unless user code running.
EV80C196Kx Developer's Manual
RISM
9.5.19
TRAP_ISR
This pseudo-command. issued directly host software executed when TRAP instruction executed. TRAP instruction used iECM-96 implement software breakpoints single stepping. separate entry point into STOP_USER provided TRAP vector. Code this entry point sets TRAP_FLAG then drops into code which implements STOP_USER command.
9.5.20
REPORT_STATUS (Code 0x14)
This command loads least significant word RISM_DATA register with status information. Valid status values are: Indicates that user code stopped (RUN_FLAG TRAP_FLAG both FALSE) Indicates that user code running (RUN_FLAG TRUE) Indicates that user code executed TRAP instruction (TRAP_FLAG TRUE) host software will periodically poll target system check status this polling execution time from user program. This loss target processor cycles avoided setting Ring Indicator modem status line signal whenever RUN_FLAG set. host software will assume that target running user code whenever detects ring indicator will only issue REPORT_STATUS commands ring indicator off.
9.5.21
MONITOR_ESCAPE (Code 0x15)
This command provides addition RISM commands special purposes; uses RISM_DATA register extend command RISM. basic RISM requires only these "extended" commands; lower 16-bits RISM_DATA register (RISM_DATA 0XXXX000lH) then target processor should execute either (ReSeT) instruction software initialization routine.
9.5.22
Start Commands
Upon reset board echo mode. Until receives ASCII slash ("/") reverse-slash ("\") should increment every character receives from host send incremented value back host. will also display binary code character received Port LEDs. reverse-slash received RISM, will leave echo mode (set USER flag true), remap memory start normal operation. slash received will stop echoing incremented received data start responding RISM commands with diagnostic flag set. this mode there diagnostic routine resident EPROM which useful debugging board. Refer Section 3.3.5 additional information about Diagnostic Mode.
EV80C196Kx Developer's Manual
Parts List Schematics
Table A-1. Parts List (Sheet
Item Qty. Ref-Des C17, C22, C6-C13,C18-C21, C23, C24, C28, C30, C33, C34, C37-C39 C14, C16, C25, C32, D5-D7 E1-E8, E10-E20, E22, E21, Value/Description 1.0uF Tant. Capacitor, Std. Range 3528 Mfg. Shape/Pack 3528
Assy. Note
0.1uF Capacitor 1206
1206
33pF Capacitor 0805 Capacitor, 16-300 Socket, 16-300 0.01uF Capacitor 1206 0.001uF Capacitor 1206 10pF Capacitor 0805 40pF Capacitor 0805 22uF 6.3V Capacitor 3216 6.8uF Capacitor 7343 LTA1000 Green DIP20 1N4305 Diode DIO300-100 1N914 Diode DIO400-100 (Not populated, leave holes open) 1N270 DIO300-100 Header, Header, Header, 2X30 Header, 2X25 Header, 2X13 Power Connector, molded, wafer locking straight-up header, CN6-MLSS100. Connector, right angle, female short CRN8/CTS744 Panasonic #EVN-5CSX5 0B14 1N270 LTA1000G 1N4305
0805 16-300 16-300 1206 1206 0805 0805 3216 7343 DIP20 DIO300-100 DIO400-100 DIO300-100 HDR1X3 HDR1X2 HDR2X30 HDR2X25 HDR2X13
RP2, RP3,
CRN8/CTS7
Potentiometer P5C, Panasonic
EV80C196Kx Developer's Manual
Parts List Schematics
Table A-1.
Parts List (Sheet
Item Qty. Ref-Des R14, R21, R8-R13, R15, R17-R20, U14, XU10 XU1, XU3, XU11 XU12 Value/Description 100K Resistor 1206 4.7K Resistor 1206 Resistor 1206 1Meg Resistor 1206 Resistor network, DIP16-300 Socket, DIS16-300 resistor 1206 1.5K Resistor 1206 Reset switch, Panasonic 74AC373 SO20W 74ACA4 SO14 74AC240 SO20W 74AC74 SO14 Canned crystal oscillator XTAL14 80C196 PLCC68 PLCC Socket68,(17X17 lead pattern) 74QC32 SO14 LM358M REF02 DIP8 (Can REF02H REF02D REF02Z) 74AC00 SO14 74AC08 SO14 74AC112 SO16 PA28F200B5 SOP44 JEDEC DIP32-600 Socket, DIS32-600 22V10 DIP24-300 Socket, DIS24-300 MAX235, DIP24-600 Socket, DIS24-600 PC165500DV PLCC44 (0.050 pitch) crystal oscillator XTAL2 1.8432 SG615 PC165500DV MAX235 74AC00 74AC08 74AC112 PA28F200B5 74AC32 LM358M SO14 DIP8 SO14 SO14 SO16 SOP44 DIP32-600 DIS32-600 DIP24-300 DIS24-300 DIP24-600 DIS24-600 PLCC44 80C196 PLCC68 Panasonic #EVQP-JU05 74AC373 74AC14 74AC240 74AC74 SO20W SO14 SO20W SO14 Mfg. Shape/Pack 1206 1206 1206 1206 DIP16-300 16-300 1206 1206 Assy. Note
EV80C196Kx Developer's Manual
UNUSED GATES TRACES THIS SECTION SOLDER SIDE BOARD CONNECTIONS MADE CUTTABLE TRACES U17B 74AC00 U17C 74AC00 U17D 74AC00 U20C 74AC08 U20D 74AC08
74AC14 74AC14
EV80C196Kx Developer's Manual
CLKOUT BREQ# RESET# DISABLE HLDA# VVCC 2,3,4 CON60 DECOUPLING CAPS SHOULD PLACED CLOSE POSSIBLE DEVICE PINS INDICATED HERE 22uF JP4-4 U5-36 U5-68 U5-68 .01uF 1.0uF JP4-3 U5-1 .01uF U2-7 0.1uF U7-7 0.1uF U9-10 0.1uF U10-10 0.1uF U11-10 0.1uF U16-7 0.1uF
2,3,4 BHE# USEREADY INST P2.2
HOLD#
CON50 U17-7 U8-14 U15-8 0.1uF 0.1uF 0.1uF U1-14 0.1uF U13-14 0.1uF U6-14
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 HSO.0 HSO.1 HSO.2 HSO.3 HSI.0 HSI.1 HSI.2 HSI.3
0.1uF
0.1uF U14-14 U12-12
0.1uF U19-7
0.1uF U20-7
0.1uF
ACH0
6.8uF JP4-2 U18-14 0.1uF
ACH1 ACH2
ACH3 ACH4
0.1uF U21-7
ACH5 ACH6
CON26 6.8uF JP4-1
ACH7
VREF ANGND
EV80C196KX
0.1uF U18-1 Title 80C196KB/C/D Evaluation Board POWER CONNECTOR Size Date:
Designs
Document Number Exp. Buses, Spare Gates Dcpl. Caps Thursday, March 2000 Sheet
Parts List Schematics
RESET 1N4305 1.0uF 74AC373 74AC240 U13B
C17-2 SHOULD CLOSE E6-1 POSSIBLE E6-2 SHOULD CLOSE U5-14 POSSIBLE RDIP4 AD[0.15] 74AC373 U19B HSO0 74AC32 33pF 12MHz U19A P2.5 74AC32 74AC240 CANNED 33pF
P2.2
Enable
Parts List Schematics
INTUART
.01uF P1.[0.7] 80C196-PLCC HSO[0.3] P2.1 P2.[0.7] LM358N TRIM VOUT PMIREF02 0.1uF 0.1uF 0.1uF LM358N HSO0 HSO1 HSO2 HSO3 TEMP VREF ANGND HSO.0 HSO.1 HSO.2 HSO.3 HSO0 HSO1 HSO2 HSO3 HSI.0 HSI.1 HSI.2/HSO.4 HSI.3/HSO.5 INST CLKOUT
BUSWIDTH
WAITN#
READY BUSWIDTH RESET
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7
ACH0
ACH1
P3.0/AD0 P3.1/AD1 P3.2/AD2 P3.3/AD3 P3.4/AD4 P3.5/AD5 P3.6/AD6 P3.7/AD7
1.0uF U8-4
U8-8
STALE 100K U17A WAIT# WAIT# 74AC00 U18A WAITN# U20A
74AC08
CLKOUT
WAIT#
74AC112
U20B WAIT# 74AC08 100K
74AC14
RESPIN# RESET# RESET 1N4305 1N4305 74AC14 RESET# RDIP4 74AC14 1N4305 P1.0 P1.1 P1.2 P1.3 U13A 4.7K 100K 100K
INIT#
0.1uF 74AC74 LTA1000 RDIP4 74AC14 P1.4 P1.5 P1.6 P1.7
1,3,4 1,3,4 1,3,4
ACH2
ACH0/P0.0 ACH1/P0.1 ACH2/P0.2 ACH3/P0.3 ACH4/P0.4/PMD.0 ACH5/P0.5/PMD.1 ACH6/P0.6/PMD.2 ACH7/P0.7/PMD.3
ACH3
ACH4
P4.0/AD8 P4.1/AD9 P4.2/AD10 P4.3/AD11 P4.4/AD12 P4.5/AD13 P4.6/AD14 P4.7/AD15
ACH5
P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P2.0/TX/PVR/SAL P2.1/RXD/PALE P2.2/EXINT/PROG P2.3/T2CLK P2.4/T2RST P2.5/PWM/PDO/SP P2.6/T2UPDN P2.7/T2CAPTURE
HSI0 HSI1 HSI2 HSI3
ACH6
ACH7
CLKOUT BHE/WRH WR/WRL ALE/ADV INST
CLKOUT WRHA# WRLA# 1,3,4 1,3,4 INST P1.5 P1.7 P1.6
VREF
U5-13 1.0uF
ANGND
U5-12
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P2.0
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7
HSO.0 HSO.1 HSO.2 HSO.3
STALE STRECHED PULSE WAIT STATE GENERATOR 74AC74
STALE
U18B U19C BHE# 74AC112 U19D 74AC32 WRL#
USEREADY
74AC32 WRH#
HSI[0.3]
HSI.0 HSI.1 HSI.2 HSI.3
HSI0 HSI1 HSI2 HSI3
EV80C196KX
Designs
Title 80C196KB/C/D Evaluation Board Size Date:
Document Number Section Thursday, March 2000
Sheet
EV80C196Kx Developer's Manual
EV80C196Kx Developer's Manual
1,2,4 1,2,4
D[0.15]
CSUART
CSUART
A[0.15]
A[0.15]
D[0.15]
RESET
P2.0
SOUT 10pF 40pF 1.8432MHz 1.5K XOUT P2.1 INIT#
Female
HOST INTERFACE
R1IN R2IN R3IN R4IN R5IN R1OUT R2OUT R3OUT R4OUT R5OUT SHUTDOWN MAX235
T1OUT T2OUT T3OUT T4OUT T5OUT T1IN T2IN T3IN T4IN T5IN
Female
INTUART
INTUART
UART CHIP
RESET
EV80C196KX
INTR
RUNNING
RCLK BAUDOUT DDIS TXRDY RXRDY OUT1 OUT2 PC16550DV
Title
Designs
80C196KB/C/D Evaluation Board Size Date: Document Number External Serial Port Thursday, March 2000 Sheet
Parts List Schematics
JEDEC 32PIN PA28F200B5
1,2,3
RESPIN#
1N270 .001uF
D[0.15]
D[0.15]
1,2,3
A[0.15]
A[0.15]
Parts List Schematics
WRLA# AD10 AD11 AD12 AD13 AD14 AD15
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A(-1) A13/CE2/VCC A14/WE/VCC A15/A14/VPP A17/CE2/VCC A18/A15/VCC A19/VPP JEDEC 32PIN JEDEC 32PIN BYTE A13/CE2/VCC A14/WE/VCC A15/A14/VPP A17/CE2/VCC A18/A15/VCC A19/VPP
AD10 AD11 AD12 AD13 AD14 AD15
1,2,3
WRHA#
A13/CE2/VCC A14/WE/VCC A15/A14/VPP A17/CE2/VCC A18/A15/VCC A19/VPP
Byte-wide Memory
CLKOUT STALE
WAIT#
BUSWIDTH CSUART Title
1TP3
EV80C196KX
22V10
HLDA#
I1/CLK 100K
CE0# CE1# BIT2/DISABLE WAIT# BIT1 BIT0 BUSWIDTH CE2# CSUART#
esigns
80C196KB/C/D Evaluation Board Size Date:
DISABLE
Document Number Friday, 2000 Sheet
EV80C196Kx Developer's Manual
Specific iRISM Information
Intel® EV80C196Kx designed software evaluation tool ROMless EV80C196Kx 16-bit microcontroller. such, ports available ports unless offboard latches/buffers decoding logic used. unreserved functions EV80C196Kx available except Non-Maskable Interrupt (NMI), TRAP instruction, bytes address space. Chip Configuration Byte also used monitor, most functions provided external logic.
Reserved Functions
reserved Host Interface. order Host Interface function properly, jumper-shunt must installed from B-C. However, your application demands (available JP1), alter RISM source file (96KBRISM.A96, included your disk) EXTINT instead NMI, change jumper-shunt A-B. TRAP instruction reserved. EV80C196Kx, jumper shunt must installed from RESET SYSTEM command work properly. wish code board while connected host, should remove jumper shunt prior disconnecting board from host. left installed, board reset connection broken.
Reserved Memory
User ROMsim shipped bytes from address 2000H 7FFFH. board reconfigurable accept various memory devices. However, breakpoints program stepping will operate when your code EPROM other nonchangeable memory. Normally, should write your code begin address 2080H download ROMsim using iECM-96. words user stack space must reserved iRISM-96 software while board processing host interrupt. Register locations 30H-38H reserved iRISM monitor code. must ensure that registers this partition used code which operate with RISM. easiest doing this generate ASM-96 module which declares RSEG which nine bytes long. This module then linked into final program prevent linker from assigning these registers some other module. must alter TRAP vector 2010H vector 203EH. Memory from 2014H-202FH reserved iRISM monitor.
EV80C196Kx Developer's Manual
Listing iRISM
Listing iRISM
specific information regarding source code Intel® EV80C196Kx, please refer Rismkb30.lst file, contained diskette provided.
EV80C196Kx Developer's Manual
Timing Analysis
Timing Analysis EV80C196Kx Board
values used based Intel® EV80C196Kx operating 12MHz.
EV80C196Kx A.C. Characteristics
Tavyv MAX. Tavyv(WAIT) (AC373 Tplh MAX) (PAL/EPLD MAX) (AC08 Tplh MAX) (AC112 Tphl MAX) Tllyv irrelevant this design.
Tclyx MAX. Tclyx(WAIT) (AC112 CLOCK Tplh MAX). Tllyx irrelevant this design.
Tavgv MAX. Tclyx(BUSWIDTH) (AC373 Tplh MAX) (PAL/EPLD MAX) Tllgv irrelevant this design. Tclgx irrelevant this design.
Tavdv MAX, zero wait states. Tavdv(ROMsim) (AC373 Tplh MAX) (PAL/EPLD MAX) (RAM Tco1 MAX)
Tavdv MAX, wait state. Tavdv(EPROM) (AC373 Tplh MAX) (PAL/EPLD MAX) (EPROM MAX)
EV80C196Kx Developer's Manual
Timing Analysis
Tavdv MAX, wait states. Tavdv(UART) (AC373 Tplh MAX) (PAL/EPLD MAX) (UART Tavrl Trldv MAX)
Trldv MAX, zero wait states. Trldv(ROMsim) (RAM MAX).
Trldv MAX, wait state. Trldv(EPROM) (EPROM MAX).
Trldv MAX, wait states. Trldv(UART) (UART Trldv MAX). Tcldv irrelevant this design.
Trhdz MAX. Trhdz(ROMsim) (RAM Tohz MAX). Trhdz(EPROM) (EPROM MAX). Trhdz(UART) (UART Trhdz MAX).
Trxdx MIN. Trxdx(ROMsim) (RAM Tohz MIN). Trxdx(EPROM) (EPROM MIN). Trxdx(UART) specified. Txhch irrelevant this design.
Tclcl Tclcl(WAIT) (PAL/EPLD MIN). (AC112 1/Fmax MIN).
Tchcl MIN. Tchcl(WAIT) (PAL/EPLD MAX) (PAL/EPLD MAX) (AC112 MIN) (PAL/EPLD MAX) (PAL/EPLD MAX) (AC08 Tplh MAX) (AC112 Trem MIN) Tcllh irrelevant this design.
EV80C196Kx Developer's Manual
Timing Analysis
Tllch irrelevant this design. Tlhlh irrelevant this design.
Tlhll MIN. Tlhll(A0-A15) (AC373 MIN).
Tavll MIN. Tavll(A0-A15) (AC373 MIN). Tavll(WAIT) (AC373 Tplh MAX) (PAL/EPLD MAX) (AC00 Tphl MIN) (AC112 MIN) Tavll(BHE#) (AC14 Tplh MAX) (AC112 MIN)
Tllax MIN. Tllax(A0-A15) (AC373 MIN). Tllax(BHE#) (AC112 MIN).
Tllrl MIN. Tllrl(UART) (UART Tavrl MIN). Trlcl irrelevant this design.
Trlrh MIN, wait states. Trlrh(UART) (UART Trlrh MIN).
Trhlh MIN. Trhlh(STALE) (74AC08 Tplh MAX) (74AC112 Trem MIN)
Tllwl MIN. Tllwl(UART) (UART Tavwl MIN). Tclwl irrelevant this design.
Tqvwh MIN, zero wait states. Tqvwh(ROMsim) (RAM MIN).
EV80C196Kx Developer's Manual
Timing Analysis
Tqvwh MIN, wait states. Tqvwh(UART) (UART Tdvwh MIN). Tchwh irrelevant this design.
Twlwh MIN, zero wait states. Twlwh(ROMsim) (RAM MIN).
Twlwh MIN, wait states. Twlwh(UART) (UART Twlwh MIN).
Twhqx MIN. Twhqx(ROMsim) (74AC32 Tplh MAX) (RAM MIN) Twhqx(U14) (RAM MIN). Twhqx(UART) (UART Twhdx MIN).
Twhlh MIN. Twhlh(ROMsim) (74AC32 Tplh MAX) (RAM MIN)
Twhlh(UART) (UART Twhax MIN). Twhlh(STALE) (74AC08 Tplh MAX) (74AC112 Trem MIN) Twhbx irrelevant this design.
EV80C196Kx Developer's Manual
Programmable Logic Equations
Generates mapping signals target processor 80C196Kx evaluation board. OPTIONS: TURBO=ON PART: 5AC312 Input declarations INPUTS: CLOCKOUT, STALE@2, nHLDA@3, A8@4, A9@5, A10@6, All@7, A12@8, A13@9, A14@10, A15@11, nRESET@13 MCS®96 system CLOCKOUT
Stretched MCS®96 Address Latch Enable RESET
80C196KB HOLD Acknowledge MCS®96 latched
EV80C196Kx Developer's Manual
Programmable Logic Equations
Output declarations OUTPUTS: ncS510@14, nCE2@15, nBUSWIDTH@16, SB0@17, SB1@18, nWAIT@19 SB2@20 nCE0@21 nCE1@22 MAP@23 Architecture declarations NETWORK: MAP, nWAIT nCS510 nCE2 nCE1 nCE0 nBUSWIDTH Intermediate variable definitions EQUATIONS: RESET =!nRESET; HLDA =!nHLDA; MAPd (RANGE3 !STALE); EPROM'= (!MAP RANGE6) RANGE1 RANGE4; UART' RANGE5; OPEN0 RANGE2 RANGE10; RORF (MAPd, CLOCKOUT, RESET, GND, VCC) CONF (nWAITd, VCC) COCF (UART, VCC) COCF (EEPROM,VCC) CONF (RAM,VCC) CONF (EPROM, VCC) CONF (nBWd, VCC) 0V=> enable uart, 0V=> enable memory 0V=> processor mode wait-state counter wait-state counter 0V=> hold MCS®96 wait_state wait-state counter 0V=> enable memory 0V=> enable memory
5V=> romsim
EV80C196Kx Developer's Manual
Programmable Logic Equations
OPEN1 RANGE9; nBWd' !EEPROM !UART; WAIT_1 STALE !HLDA (WAIT_2 !EPROM OPEN1); WAIT_2 STALE !HLDA (WAIT_3 !UART); WAIT_3 WAIT_4; WAIT_4 WAIT_5; WAIT_5 WAIT_6; WAIT_6 WAIT_7; WAIT_7 GND; nWAITd !WAIT; Address Range Equations RANGE1 !A15 !A14 !A13 !A12 !A11 !A10 !A15 !A14 !A13 !A12 !A10 !A15 !A14 !A13 !A10 !A15 !A14 !A13 !A12 !A15 !A14 !A13 !A12 !A11 !A15 !A14 !A13 !A12 *A9; !A15 !A14 !A13 !A15 !A14 !A13 !A10 !A15 !A14 !A13 !A11; !A15 !A14 !A13 !A15 !A14 !A13 !A8; !A15 !A14 !A11; !A15 !A14 !A15 !A14 !A15 A13; !A15 A13; !A14; A14; 0000-00FF 0100-1CFF
RANGE2
0100-1CFF
RANGE3 RANGE4 RANGE5 RANGE6 RANGE7 RANGE8 RANGE9 RANGE10
1D00-1DFF 1E00-1EFF 2000-27FF 2800-5FFF 6000-7FFF 8000-BFFF C000-FFFF
EV80C196Kx Developer's Manual
Programmable Logic Equations
State machine MACHINE: CLOCK: CLEAR: STATES: WAIT_STATE CLOCKOUT RESET HOLD_2 HOLD_3 HOLD_4 HOLD_5 HOLD_6 HOLD_7 REMOVE HOLD ASYNC_START
ASYNC_START:
WAIT_1 !WAIT_2 WAIT_2 ASSERT: WAIT_1 WAIT_3 REMOVE_HOLD ASSERT: WAIT WAIT_4 REMOVE_HOLD ASSERT: WAIT WAIT_5 REMOVE_HOLD ASSERT: WAIT WAIT_6 REMOVE_HOLD ASSERT: WAIT WAIT_7 REMOVE_HOLD ASSERT: WAIT REMOVE_HOLD ASSERT: WAIT ASYNC_START
THEN REMOVE_HOLD THEN HOLD_2 THEN WAIT THEN HOLD_3
HOLD_2:
HOLD_3:
THEN HOLD_4
HOLD_4:
THEN HOLD_5
HOLD_5:
THEN HOLD_6
HOLD_6:
THEN HOLD_7
HOLD_7: REMOVE_HOLD END$
EV80C196Kx Developer's Manual
Memory Connector
Figure displays standard memory connector evaluation boards. Figure F-1. Standard Memory Connector
2x30-Pin MOLEX 39-51-2604 Equivalent EV80C51FB
Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr N.C. PSEN/RD N.C./TP6 N.D./TP7 RESET# Disable# N.C. -12VDC
EV80C196Kx
Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr CLKOUT BREQ# RESET# Note HLDA# -12VDC
EV80C186
Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr Addr RESET T0OUT HLDA -12V
EV80C186
Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data BHE# SRDY DRQ0 INT0 T0IN HOLD +12VDC
EV80C196Kx EV80C51FB
Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data BHE# READY INST EXTINT/P2.2 N.C. HOLD# +12VDC Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data Addr/Data N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C. N.C./TP4 N.C./TP5 INT0/P3.2 PSEN# N.C. +12VDC
Note N.C. Connect N.C./PTx Connect, routed on-board test pooint user.
Note: EV80C196Kx will connected future revisions this board.
A7964-01
EV80C196Kx Developer's Manual
Sample Session
This list file produced using command "list demo.lst" before invoking demo.log with command "include demo.log" described below. This list file used compare screen your while running demo.log. ;===List file opened *include demo.log ;-INCLUDE FILE OPEN This demo some features iECM-96 with EV80C196Kx board. order demo, place software disk drive. Then select that drive typing "A:" "B:", whichever coresponds that drive, CARRIAGE-RETURN. Type "ECM96"and CARRIAGE-RETURN.
asterisk prompt type "INCLUDE DEMO.LOG" CARRIAGE-RETURN. additional information, please EV80C196Kx Microcontroller Evaluation Board User's Manual. pause space continue. This command loads 96KBDEMO.OBJ from disk. load 96kbdemo.obj name |DFMO96KB *pause space continue. dasm 2080,8 This disassembles lines code starting 2080H |RESET_VECTOR: 2080: A1000118 #0100 2084: 0llC 2086: 0120 2088: 0122 208A: B10116 16,#01 208D: 110F CLRB IOPORT1 208F: 1117 CLRB 2091: A1BF201E #20BF pause space continue. This displays current value Program counter. PC=RESET_VECTOR
EV80C196Kx Developer's Manual
Sample Session
change Program Counter 2080<cr>". pause space continue. from 2080 forever;This command clears breakpoints executes code. LED's Port should incrementing regularly. pause space continue. dasm.past, disassembler other memory read commands PAST: 20A6: 800801E #8000 20AA: D7E9 LOOP 20AC: A1BF201E #20BF 20B0: 0722 20B2: 170F INCB IOPORT1 20B4: B00F17 IOPORT1 20B7: 27DC SJMP LOOP FAILED: 20B9: A1FFFF20 #0FFFF used while code running board. pause space continue. >asm 20b2 start assembling code address 20b2H, disassembly listing. Single Line Assembler activated, exit with "end" directive 20B2H:decb .ioport1 20B4H: >pause space continue. LED's Port should decrementing. Note that only there assembler, other memory modifying commands used while board executing user code. However, caution when modifying code while running. resulting code cause errors variable length instructions. >pause space continue. >halt dasm .loop,9 LOOP: 2095: C61E1C [1E] 2098: 9A1F1C CMPB [1E]+ ;209B: D71C FAILED |HERE: ;209D: 3882204 22,00, BACK
EV80C196Kx Developer's Manual
Sample Session
20A0: 171C INCB 20A2: 2002 SJMP PAST BACK: ;2014: 151C DECB PAST: ;20A6: 8900801E #8000 ;20AA: D7E9 LOOP pause space continue. from 2080 till 20a6; This command sets breakpoint 20a6H. *pause space continue. Code stopped breakpoint! Note that 20a6 executed yet. PC=PAST pause space continue. shown. BREAKPOINTS ACTIVE pause space continue. *br[0f]=20a6; This command sets breakpoint [15] 20a6. *pause space continue. See? BREAKPOINT [15]= PAST *pause space continue. This concludes demo, hope enjoy using EV80C196KX board. *pause space continue. Type "QUIT" CARRIAGE-RETURN exit iECM-96. quit
EV80C196Kx Developer's Manual
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