AMERICAN MICROSYSTEMS, Dual Clock Generator Features De
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FS6286-01
AMERICAN MICROSYSTEMS,
Dual Clock Generator
Features
Description
Dual phase-locked loop (PLL) device with three output clock frequencies 3.3V supply voltage Small circuit board footprint (8-pin 0.150 SOIC) OE/LAT enables/disables CLKC output (see Table SELC latched rising edge OE/LAT input Custom frequency selections available contact your local Sales Representative more information
FS6286 monolithic CMOS clock generator designed minimize cost component count digital video/audio systems. frequencies ratiometrically derived from crystal oscillator frequency. locking output frequencies together eliminate unpredictable artifacts video systems reduce electromagnetic interference (EMI) frequency harmonic stacking.
Table Crystal Output Frequencies
DEVICE fXIN (MHz) CLKA (MHz) CLKB (MHz)
SELC=0 SELC=1
CLKC (MHz)
40.000 (fXIN* 80.000 (fXIN*352
Figure Configuration
OE/LAT XOUT/REFIN
CLKA CLKB CLKC/SELC
FS6286-01 14.31818
25.0000 25.0000 (fXIN* (fXIN*
FS6286
CLKA CLKB ALWAYS ENABLED (NOT AFFECTED OE/LAT INPUT LEVEL)
NOTE: Contact custom frequencies, options
8-pin (0.150) SOIC
Figure Block Diagram
XOUT/ REFIN CRYSTAL OSC. DIVIDER ARRAY
CLKA
CLKB
OE/LAT
CLKC/ SELC
FS6286
American Microsystems, Inc. reserves right change detail specifications required permit improvements design products.
ISO9001
3.13.01
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