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Crystal Oscillators, Oscillator, VCXO, PLL, Clock Generator, Power Supply, Multiplexer, LED

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9& 2 &ORFN HQHUDWRU , &


Table 1: Version Information Figure 1: Pin Configuration

9& 2 &ORFN HQHUDWRU , &
April 2000
Features
Description
On-chip tunable voltage-controlled crystal oscillator circuitry (VCXO) allows precise system frequency tuning (pull range typically 300ppm) Uses inexpensive fundamental-mode crystals Integrated phase-locked loops (PLL) multiply VCXO frequency to the higher system frequencies needed 3.3V supply voltage available (contact factory for 5 volt versions) Small circuit board footprint (8-pin 0.150 SOIC) Custom frequency selections available - contact your local AMI Sales Representative for more information
The FS6205 is a monolithic CMOS clock generator IC designed to minimize cost and component count in digital video / audio systems. An on-chip voltage-controlled crystal oscillator (VCXO) permits the reference frequency (or output frequency) to be tuned to match other frequencies present in the system. Phase-locked loops are used to generate precise output / reference frequency ratios. See Table 1 for information on the frequency ratios programmed into each version of the FS6205.
Table 1: Version Information Figure 1: Pin Configuration
XIN VDD XTUNE VSS
DEVICE
VDD (nom)
FREF (MHz)
CLK (MHz) 27.000 (REF 2) 74.175824175.. (REF 500 / 91) 27.027 (REF 2) 74.580835443.. (REF 436 / 79)
XOUT MS
FS6205-01 3.3
FS6205
FS CLK
8-pin (0.150) SOIC
NOTE: Contact AMI for custom versions
Figure 2: Block Diagram
XIN VCXO XOUT MUX XTUNE PLL B CLK PLL A
FS6205
American Microsystems, Inc. reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
9& 2 &ORFN HQHUDWRU , &
April 2000
Table 2: Pin Descriptions
TYPE AI P AI P DO DIU DIU AO
NAME XIN VDD XTUNE VSS CLK FS MS XOUT VCXO Crystal Feedback Power Supply (+3.3V nominal) VCXO Tune Ground Clock Output
DESCRIPTION
Frequency Select Input (changes PLL Frequencies) Multiplexer Select Input (chooses PLL A or PLL B) VCXO Crystal Drive
Functional Block Description
Phase-Locked Loops (PLL)
A simple formula to obtain the pulling capability of a crystal oscillator is:
The on-chip PLLs are a standard frequency- and phaselocked loop architecture. The PLL multiplies the reference oscillator to the desired frequency by a ratio of integers. The frequency multiplication is exactly that specified by the integer ratios.
Voltage-Controlled Crystal Oscillator (VCXO)
The VCXO provides a tunable, low-jitter frequency reference for the rest of the FS6205 system components. Loading capacitance for the crystal is internal to the FS6205. No external components (other than the crystal resonator itself) are required for operation of the VCXO. Continuous fine-tuning of the VCXO frequency is accomplished by varying the voltage on the XTUNE pin. The total change (from one extreme to the other) in effective loading capacitance is 12pF nominal (i.e from 35pF to 13pF). "Pulling" of the crystal oscillation frequency, is accomplished by altering the effective load capacitance presented to the crystal by the oscillator circuit. The actual amount that changing the load capacitance alters the oscillator frequency will be dependent on the characteristics of the crystal as well as the oscillator circuit itself. Specifically, the motional capacitance of the crystal (usually referred to by crystal manufacturers as C 1), the static capacitance of the crystal (C 0), and the load capacitance (CL) of the oscillator determine the "warping" or "pulling" capability of the crystal in the oscillator circuit.
250 200 150 100 Deviation - ppm 50 0 0 -50 -100 -150 -200 -250 V(XTUNE) - volts 0.5 1 1.5 2 2.5 3 3.5
Figure 3 - Typical VCXO Characteristic
9& 2 &ORFN HQHUDWRU , &
April 2000
Electrical Specifications
Table 3: Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance, functionality, and reliability.
SYMBOL VDD VI VO IIK IOK TS TA TJ
MIN. VSS-0.5 VSS-0.5 VSS-0.5 -50 -50 -65 -55
MAX. 7 VDD+0.5 VDD+0.5 50 50 150 125 125 260 2
CAUTION: ELECTROSTATIC SENSITIVE DEVICE
Permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy electrostatic discharge.
Table 4: Operating Conditions
PARAMETER Supply Voltage (3.3 volt system) Ambient Operating Temperature Range SYMBOL V DD TA CONDITIONS / DESCRIPTION MIN. 3.0 0 TYP. 3.3 MAX. 3.6 70 UNITS V °C
9& 2 &ORFN HQHUDWRU , &
April 2000
Table 5: DC Electrical Specifications
PARAMETER Overall Supply Current, Dynamic, with Loaded Outputs Clock Outputs (CLKx) High-Level Output Source Current Low-Level Output Sink Current Output Impedance Short Circuit Source Current Short Circuit Sink Current
SYMBOL
CONDITIONS / DESCRIPTION
UNITS
IOH IOL zOH zOL IOSH IOSL
9& 2 &ORFN HQHUDWRU , &
April 2000
Table 6: AC Timing Specifications
PARAMETER Overall Synthesis Error Crystal Oscillator Center Frequency Tuning Voltage Center Frequency Crystal Loading Capacitance Crystal Drive Level Clock Output (CLK) Duty Cycle Jitter, Period (peak-peak) Jitter, Long Term (y()) Jitter, Long Term (y()) Rise Time Fall Time
SYMBOL
CONDITIONS / DESCRIPTION
UNITS
(unless otherwise noted in Frequency Table)
VCENTER
CL(xtal)
Ratio of high pulse width (as measured from rising edge to next falling edge at VDD / 2) to one clock period
tj(P) tj(LT) tj(LT) tr tf
9& 2 &ORFN HQHUDWRU , &
April 2000
Package Information
Table 7: 8-pin SOIC (0.150") Package Dimensions
DIMENSIONS INCHES MIN. A A1 A2 B C D E e H h L 0.061 0.004 0.055 0.013 0.0075 0.189 0.150 0.230 0.010 0.016 0° MAX. 0.068 0.0098 0.061 0.019 0.0098 0.196 0.157 0.244 0.016 0.035 8° MILLIMETERS MIN. 1.55 0.102 1.40 0.33 0.191 4.80 3.81 5.84 0.25 0.41 0° MAX. 1.73 0.249 1.55 0.49 0.249 4.98 3.99 6.20 0.41 0.89 8°
BASE PLANE 1 ALL RADII: 0.005" TO 0.01"
SEATING PLANE
7° typ.
0.050 BSC
1.27 BSC
Table 8: 8-pin SOIC (0.150") Package Characteristics
9& 2 &ORFN HQHUDWRU , &
April 2000
Ordering Information
DEVICE NUMBER PACKAGE TYPE 8-pin (0.150") SOIC (Small Outline Package) 8-pin (0.150") SOIC (Small Outline Package) OPERATING TEMPERATURE RANGE 0°C to 70°C (Commercial) 0°C to 70°C (Commercial) SHIPPING CONFIGURATION Tape and Reel Tubes
ORDERING CODE
FS6205-01 FS6205-01
American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, ID 83201, (208) 233-4690, FAX (208) 234-6796, WWW Address: http://www.amis.com E-mail: tgp@amis.com