approved method attenuation. Provides suppression Generates spread spe

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approved method attenuation. Provides suppression Generates spread spe

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approved method attenuation. Provides suppression Generates spread spectrum clock input frequency input frequency range Optimized 54MHz, 65MHz, 81MHz, 140MHz, 162MHz pixel clock frequencies Internal loop filter minimizes external components board space selectable spread ranges, 2.2% SSON# control spread spectrum enable disable options selectable modulation rates cycle-to-cycle jitter 3.3V operating voltage output drives CMOS compatible outputs Ultra power CMOS design Supports most mobile graphic accelerator timing controller specifications Available SOIC TSSOP
P2040C
Product Description
P2040C selectable spread spectrum frequency modulator designed specifically digital flat panel applications. P2040C reduces electromagnetic interference (EMI) clock source which provides system wide reduction clock dependent signals. P2040C allows significant system cost savings reducing number circuit board layers shielding that traditionally required pass regulations. P2040C uses most efficient optimized modulation profile approved implemented proprietary all-digital method. P2040C modulates output single order "spread" bandwidth synthesized clock and, more importantly, decreases peak amplitudes harmonics. This results significantly lower system compared typical narrow band signal produced oscillators most frequency generators. Lowering increasing signal's bandwidth called "spread spectrum clock generation".
Applications P2040C targeted towards digital flat panel applications Notebook PCs, Palm-size PCs, Office Automation Equipments, Monitors.
Alliance Semiconductor 2575, Augustine Drive Santa Clara, Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com
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Block Diagram
P2040C
SSON#
Modulation CLKIN Frequency Divider Feedback Divider
Phase Detector
Loop Filter
Output Divider
ModOUT
Configuration
CLKIN
ModOUT SSON#
P2040C
Description Pin# Name CLKIN SSON# ModOUT Type Description External reference frequency input. Connect externally generated reference signal. Digital logic input used select modulation rate. This internal pull-up resistor. Digital logic input used select Spreading Range. This internal pull-up resistor. Ground entire chip. Connect system ground. Digital logic input used enable Spread Spectrum function (Active LOW). Spread Spectrum function enabled when LOW, disabled when HIGH. This internal pull-low resistor. Spread spectrum clock output. Digital logic input used select Spreading Range. This internal pull-up resistor. Power supply entire chip (3.3V)
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Modulation Selection (Commercial) Table
Spreading Range Modulation Rate
P2040C
+/-1.4% +/-2.0% +/-1.1% +/-1.8% +/-1.3% +/-2.2% +/-1.4% +/-2.1%
+/-1.2% +/-1.9% +/-0.9% +/-1.5% +/-1.3% +/-2.1% +/-1.3% +/-2.1%
+/-1.0% +/-1.6% +/-0.5% +/-1.0% +/-1.3% +/-2.1% +/-1.4% +/-2.1%
+/-0.8% +/-1.2% +/-0.4% +/-0.6% +/-1.2% +/-1.9% +/-1.2% +/-2.0%
+/-0.4% +/-0.8% +/-0.3% +/-0.4% +/-1.1% +/-1.8% +/-0.9% +/-1.4%
(Fin/80) 62.49 (Fin/80) 62.49 (Fin/80) 62.49 (Fin/80) 62.49 (Fin/80) 20.83 (Fin/80) 20.83 (Fin/80) 20.83 (Fin/80) 20.83
Spread Spectrum Selection Table illustrates possible spread spectrum options. optimal setting should minimize system fullest without affecting system performance. spreading described percentage deviation center frequency (Note: center frequency frequency external reference input CLKIN, Example: P2040C designed high resolution flat panel applications able support panel frequencies from 54MHz 170MHz. 65MHz pixel clock frequency, spreading selection MRA=0, SR1=1 SR0=1 provides percentage deviation +/-1.50% (see Table This results frequency ModOUT being swept from 64.03MHz 65.98MHz modulation rate 50.77KHz (see Table This particular example (see Figure below) given here common reduction method notebook panel already been implemented most leading mobile graphic accelerator manufacturers. P2040C Application Schematic Mobile Graphics
65MHz from graphics accelerator
CLKIN
ModOUT SSON#
0.1µF
Modulated 65MHz signal with ±0.75 deviation modulation rate 56.24KHz. This signal connected back spread +3.3V spectrum input (SSIN) graphics accelerator.
P2040C
Digital control enable disable
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Software Simulation
P2040C
using Alliance EMI-Lator®1 electromagnetic interference simulation software, radiated system level analysis made easier allow quantitative assessment reduction products. simulation engine this software already been characterized correlate electrical characteristics Alliance reduction ICs. following illustration example simulation result. Please visit website www.alsc.com information obtain free copy demonstration EMI-Lator simulation software.
Simulation results From EMI-Lator®
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Absolute Maximum Ratings Symbol VDD, TSTG Storage Temperature Operating Temperature Parameter Voltage with respect Rating -0.5 +7.0 +125
P2040C
Unit
Note: These stress ratings only implied functional use. Exposure absolute maximum ratings prolonged periods time affect device reliability. Electrical Characteristics Symbol ZOUT Parameter Input Voltage Input High Voltage Input Current (pull-up resistor inputs SR0, MRA) Input High Current (pull-down resistor input SSON#) Output Voltage (VDD=3.3V, Output High Voltage (VDD=3.3V, Static Supply Current Dynamic Supply Current (3.3V loading) Operating Voltage Power Time (First locked clock cycle after power Clock Output Impedance 0.18 Unit
Electrical Characteristics Symbol Parameter Input Frequency, P2040C Output Rise Time (0.8V 2.0V) Output Fall Time (2.0V 0.8V) Jitter (cycle cycle) Output Duty Cycle Unit
*tLH measured into capacitive load 15pF
Package Information
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8-Pin SOIC
P2040C
Symbol
Dimensions inches 0.071 0.010 0.069 0.020 0.01 0.202 0.164
Dimensions millimeters 1.45 0.10 1.35 0.31 0.10 4.72 3.75 1.80 0.25 1.75 0.51 0.25 5.12 4.15 1.27 5.70 0.30 6.30 0.70
0.057 0.004 0.053 0.012 0.004 0.186 0.148
0.050 0.224 0.012 0.248 0.028
8-Pin TSSOP
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P2040C
Dimensions inches Symbol 0.047 0.002 0.031 0.007 0.004 0.114 0.169 0.006 0.041 0.012 0.008 0.122 0.177
Dimensions millimeters 1.10 0.05 0.80 0.19 0.09 2.90 4.30 0.65 6.20 0.45 6.60 0.75 0.15 1.05 0.30 0.20 3.10 4.50
0.026 0.244 0.018 0.260 0.030
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Ordering Information Part Number A2040C-08ST A2040C-08SR A2040C-08TT A2040C-08TR I2040C-08ST I2040C-08SR I2040C-08TT I2040C-08TR P2040C-08ST P2040C-08SR P2040C-08TT P2040C-08TR Part Numbering Guide 2040 Marking A2040C A2040C A2040C A2040C I2040C I2040C I2040C I2040C P2040C P2040C P2040C P2040C Package Type 8-Pin SOIC, TUBE 8-Pin SOIC, TAPE REEL 8-Pin TSSOP, TUBE 8-Pin TSSOP, TAPE REEL 8-Pin SOIC, TUBE 8-Pin SOIC, TAPE REEL 8-Pin TSSOP, TUBE 8-Pin TSSOP, TAPE REEL 8-Pin SOIC, TUBE 8-Pin SOIC, TAPE REEL 8-Pin TSSOP, TUBE 8-Pin TSSOP, TAPE REEL 2500 2500 2500 2500 2500 2500 Qty/reel
P2040C
Temperature -40°C 125°C -40°C 125°C -40°C 125°C -40°C 125°C -40°C 125°C -40°C 125°C -40°C 125°C -40°C 125°C 70°C 70°C 70°C 70°C
Flow Prefix: Automotive temperature range (-40°C 125°C) Industrial Temperature range (-40°C 85°C) Commercial temperature range (0°C 70°) Device Number Deviation spread option identifier Device count Package identifier SOIC TUBE SOIC TAPE REEL TSSOP TUBE TSSOP TAPE REEL
Licensed under patent #5,488,627, #6,646,463 #5,631,920.
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P2040C
Alliance Semiconductor Corporation 2595, Augustine Drive, Santa Clara, 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com
Copyright Alliance Semiconductor Rights Reserved Preliminary Information Part Number: P2040C Document Version: v1.0
Note: This product utilizes Patent 6,646,463 Impedance Emulator Patent issued Alliance Semiconductor, dated 11-11-2003
Copyright 2003 Alliance Semiconductor Corporation. rights reserved. three-point logo, name Intelliwatt trademarks registered trademarks Alliance. other brand product names trademarks their respective companies. Alliance reserves right make changes this document products time without notice. Alliance assumes responsibility errors that appear this document. data contained herein represents Alliance's best data and/or estimates time issuance. Alliance reserves right change correct this data time, without notice. product described herein under development, significant changes these specifications possible. information this product data sheet intended general descriptive information potential customers users, intended operate provide, guarantee warrantee user customer. Alliance does assume responsibility liability arising application product described herein, disclaims express implied warranties related sale and/or Alliance products including liability warranties related fitness particular purpose, merchantability, infringement intellectual property rights, except express agreed Alliance's Terms Conditions Sale (which available from Alliance). sales Alliance products made exclusively according Alliance's Terms Conditions Sale. purchase products from Alliance does convey license under patent rights, copyrights; mask works rights, trademarks, other intellectual property rights Alliance third parties. Alliance does authorize products critical components life-supporting systems where malfunction failure reasonably expected result significant injury user, inclusion Alliance products such life-supporting systems implies that manufacturer assumes risk such agrees indemnify Alliance against claims arising from such use.
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