Preliminary data sheet (subject changes) Prelim. Data Sheet August 200
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HIP6004E
Preliminary data sheet (subject changes) Prelim. Data Sheet August 2000 File Number XXXX
Buck Synchronous-Rectifier (PWM) Controller Output Voltage Monitor
HIP6004E provides complete control protection DC-DC converter optimized high-performance microprocessor applications. designed drive N-Channel MOSFETs synchronous-rectified buck topology. HIP6004E integrates control, output adjustment, monitoring protection functions into single package.
Features
Drives N-Channel MOSFETs Operates from +12V Input Simple Single-Loop Control Design Voltage-Mode Control Fast Transient Response High-Bandwidth Error Amplifier Full 100% Duty Ratio Excellent Output Voltage Regulation Over Line Voltage Temperature TTL-Compatible 5-Bit Digital-to-Analog Output Voltage Selection 25mV Binary Steps 1.05VDC 1.825VDC Power-Good Output Voltage Monitor Over-Voltage Over-Current Fault Monitors Does Require Extra Current Sensing Element, Uses MOSFET's rDS(ON) Small Converter Size Constant Frequency Operation 200kHz Free-Running Oscillator Programmable from 50kHz over 1MHz
/Title (HIP60 04D) /Subject output voltage converter easily adjusted (Buck precisely regulated. HIP6004E includes fully TTLcompatible 5-input digital-to-analog converter (DAC) that adjusts output voltage from 1.05VDC 1.825VDC Syn25mV increments steps. precision reference chrovoltage-mode regulator hold selected output voltage nouswithin over temperature line voltage variations. RectiThe HIP6004E provides simple, single feedback loop, fier voltage-mode control with fast transient response. includes (PWM 200kHz free-running triangle-wave oscillator that Con- adjustable from below 50kHz over 1MHz. error troller amplifier features 15MHz gain-bandwidth product 6V/µs slew rate which enables high converter bandwidth fast transient performance. resulting duty ratio Outranges from 100%. HIP6004E monitors output voltage with window Voltcomparator that tracks output issues Power Good signal when output within ±10%. HIP6004E Moni- protects against over-current overvoltage conditions tor) inhibiting operation. Additional built-in overvoltage /Autho protection triggers external crowbar input supply. HIP6004E monitors current using /Key- rDS(ON) upper MOSFET which eliminates need words current sensing resistor. (Intersil Ordering Information CorpoTEMP. PKG. ration, PART NUMBER RANGE (oC) PACKAGE Intelli- HIP6004ECB SOIC M20.3 gent NOTE: When ordering, entire part number. suffix Power, obtain part tape reel, e.g., HIP6004ECB-T. Computer Power, Pentium Power,
Applications
VRM8.5 modules Pentium Other Microprocessors High-Power DC-DC Regulators Low-Voltage Distributed Power Supplies
Pinout
HIP6004E (SOIC) VIEW
VSEN OCSET VID25mV VID0 VID1 VID2 VID3 COMP LGATE PGND BOOT UGATE PHASE PGOOD
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 321-724-7143 Intersil Design trademark Intersil Corporation. Copyright Intersil Corporation 2000 K7is trademark Advanced Micro Devices, Inc.
HIP6004E Typical Application
+12V +12V OCSET
HIP6004E
PGOOD VID25mV VID0 VID1 VID2 VID3 MONITOR PROTECTION
BOOT
UGATE PHASE +VOUT
LGATE PGND VSEN
COMP
Block Diagram
VSEN 110% POWER-ON RESET (POR)
PGOOD
115% SOFTSTART OVERCURRENT OVERVOLTAGE 10µA BOOT UGATE PHASE VID25mV VID0 VID1 VID2 VID3 COMP OSCILLATOR CONVERTER (DAC) DACOUT COMPARATOR GATE INHIBIT CONTROL LOGIC LGATE PGND
OCSET REFERENCE 200µA
ERROR
HIP6004E
Absolute Maximum Ratings
Supply Voltage, .+15V Boot Voltage, VBOOT VPHASE .+15V Input, Output Voltage -0.3V +0.3V Classification Class
Thermal Information
Thermal Resistance (Typical, Note
(oC/W)
Operating Conditions
Supply Voltage, +12V ±10% Ambient Temperature Range 70oC
SOIC Package SOIC Package (with 3in2 Copper) Maximum Junction Temperature 150oC Maximum Storage Temperature Range -65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC (SOIC Lead Tips Only)
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTE: measured with component mounted evaluation board free air.
Electrical Specifications
PARAMETER SUPPLY CURRENT Nominal Supply POWER-ON RESET Rising Threshold Falling Threshold Rising VOCSET Threshold OSCILLATOR Free Running Frequency Total Variation Ramp Amplitude REFERENCE
Recommended Operating Conditions, Unless Otherwise Noted SYMBOL TEST CONDITIONS UNITS
UGATE LGATE Open
VOCSET 4.5V VOCSET 4.5V
1.26
10.4
OPEN 200k VOSC Open
VP-P
(VID0-VID4) Input Voltage (VID0-VID4) Input High Voltage DACOUT Voltage Accuracy ERROR AMPLIFIER Gain Gain-Bandwidth Product Slew Rate GATE DRIVERS Upper Gate Source Upper Gate Sink Lower Gate Source Lower Gate Sink PROTECTION Over-Voltage Trip (VSEN/DACOUT) OCSET Current Source Sourcing Current Soft Start Current POWER GOOD Upper Threshold (VSEN/DACOUT) Lower Threshold (VSEN/DACOUT) Hysteresis (VSEN/DACOUT) PGOOD Voltage VPGOOD VSEN Rising VSEN Falling Upper Lower Threshold IPGOOD -5mA IOCSET IOVP VOCSET 4.5VDC VSEN 5.5V, VOVP IUGATE RUGATE ILGATE RLGATE VBOOT VPHASE 12V, VUGATE ILGATE 0.3A 12V, VLGATE ILGATE 0.3A GBWP COMP 10pF
-1.0
+1.0
V/µs
HIP6004E Typical Performance Curves
1000 RESISTANCE PULLUP +12V (mA) CGATE 1000pF PULLDOWN SWITCHING FREQUENCY (kHz) 1000 CGATE 10pF CUPPER CLOWER CGATE CGATE 3300pF
1000
SWITCHING FREQUENCY (kHz)
FIGURE RESISTANCE FREQUENCY
FIGURE BIAS SUPPLY CURRENT FREQUENCY
Functional Descriptions
VSEN OCSET VID25mV VID0 VID1 VID2 VID3 COMP LGATE PGND BOOT UGATE PHASE PGOOD
reference (DACOUT). level DACOUT sets converter output voltage. also sets PGOOD thresholds. Table specifies DACOUT combinations inputs.
COMP (Pin (Pin
COMP available external pins error amplifier. inverting input error amplifier COMP error amplifier output. These pins used compensate voltage-control feedback loop converter.
(Pin
Signal ground voltage levels measured with respect this pin.
VSEN (Pin
This connected converter's output voltage. PGOOD comparator circuits this signal report output voltage status overvoltage protection.
PGOOD (Pin
PGOOD open collector output used indicate status converter output voltage. This pulled when converter output within ±10%=of DACOUT reference voltage.
OCSET (Pin
Connect resistor (ROCSET) from this drain upper MOSFET. ROCSET, internal 200µA current source (IOCS), upper MOSFET on-resistance (rDS(ON)) converter over-current (OC) trip point according following equation:
OCSET OCSET PEAK
PHASE (Pin
Connect PHASE upper MOSFET source. This used monitor voltage drop across MOSFET over-current protection. This also provides return path upper gate drive.
UGATE (Pin
Connect UGATE upper MOSFET gate. This provides gate drive upper MOSFET.
over-current trip cycles soft-start function.
(Pin
Connect capacitor from this ground. This capacitor, along with internal 10µA current source, sets soft-start interval converter.
BOOT (Pin
This provides bias voltage upper MOSFET driver. bootstrap circuit used create BOOT voltage suitable drive standard N-Channel MOSFET.
VID25mV-VID3 (Pins 4-8)
VID25mV VID3 input pins 5-bit DAC. states these five pins program internal voltage
HIP6004E
PGND (Pin
This power ground connection. lower MOSFET source this pin. wave. oscillator's triangular waveform compared ramping error amplifier voltage. This generates PHASE pulses increasing width that charge output capacitor(s). This interval increasing pulse width continues With sufficient output voltage, clamp reference input controls output voltage. This interval between Figure voltage exceeds DACOUT voltage output voltage regulation. This method provides rapid controlled output voltage rise. PGOOD signal toggles `high' when output voltage (VSEN pin) within ±10% DACOUT. hysteresis built into power good comparators prevents PGOOD oscillation nominal output voltage ripple.
LGATE (Pin
Connect LGATE lower MOSFET gate. This provides gate drive lower MOSFET.
(Pin
Provide bias supply chip this pin.
(Pin
used drive external event overvoltage condition. Output rising more than DAC-set voltage triggers high output this disables gate drive circuitry.
(Pin
This provides oscillator switching frequency adjustment. placing resistor (RT) from this GND, nominal 200kHz switching frequency increased according following equation:
200kHz
PGOOD (2V/DIV.)
SOFT-START (1V/DIV.) OUTPUT VOLTAGE (1V/DIV.) TIME (5ms/DIV.)
GND)
Conversely, connecting pull-up resistor (RT) from this reduces switching frequency according following equation:
200kHz
12V)
FIGURE SOFT START INTERVAL
constant voltage 1.26V typically.
Over-Current Protection
over-current function protects converter from shorted output using upper MOSFET's on-resistance, rDS(ON) monitor current. This method enhances converter's efficiency reduces cost eliminating current sensing resistor.
Functional Description
Initialization
HIP6004E automatically initializes upon receipt power. Special sequencing input supplies necessary. Power-On Reset (POR) function continually monitors input supply voltages. monitors bias voltage input voltage (VIN) OCSET pin. level OCSET equal less fixed voltage drop (see overcurrent protection). function initiates soft start operation after both input supply voltages exceed their thresholds. operation with single +12V power source, equivalent +12V power source must exceed rising threshold before initiates operation.
SOFT-START OUTPUT INDUCTOR
Soft Start
function initiates soft start sequence. internal 10µA current source charges external capacitor (CSS) Soft start clamps error amplifier output (COMP pin) reference input terminal error amp) voltage. Figure shows soft start interval with 0.1µF. Initially clamp error amplifier (COMP pin) controls converter's output voltage. Figure voltage reaches valley oscillator's triangle
TIME (20ms/DIV.)
FIGURE OVER-CURRENT OPERATION
over-current function cycles soft-start function hiccup mode provide fault protection. resistor (ROCSET) programs over-current trip level. internal 200µA current
HIP6004E
sink develops voltage across ROCSET that referenced When voltage across upper MOSFET (also referenced VIN) exceeds voltage across ROCSET, over-current function initiates soft-start sequence. softstart function discharges with 10µA current sink inhibits operation. soft-start function recharges operation resumes with error amplifier clamped voltage. Should overload occur while recharging soft start function inhibits operation while fully charging complete cycle. Figure shows this operation with overload condition. Note that inductor current increases over during charging interval causes over-current trip. converter dissipates very little power with this method. measured input power conditions Figure 2.5W. over-current function will trip peak inductor current (IPEAK) determined
OCSET OCSET PEAK
equation ripple current section under component guidelines titled `Output Inductor Selection'. small ceramic capacitor should placed parallel with ROCSET smooth voltage across ROCSET presence switching noise input voltage.
Output Voltage Program
output voltage HIP6004E converter programmed discrete levels between 1.05VDC 1.825VDC voltage identification (VID) pins program internal voltage reference (DACOUT) with TTL-compatible 5-bit digital-toanalog converter (DAC). level DACOUT also sets PGOOD thresholds. Table specifies DACOUT voltage different combinations connections pins. output voltage should adjusted while converter delivering power. Remove input power before changing output voltage. Adjusting output voltage during operation could toggle PGOOD signal exercise overvoltage protection.
Application Guidelines
Layout Considerations
high frequency switching converter, layout very important. Switching current from power device another generate voltage transients across impedances interconnecting bond wires circuit traces. These interconnecting impedances should minimized using wide, short printed circuit traces. critical components should located close together possible, using ground plane construction single point grounding.
where IOCSET internal OCSET current source (200µA typical). trip point varies mainly MOSFET's rDS(ON) variations. avoid over-current tripping normal operating load range, find ROCSET resistor from equation above with: maximum rDS(ON) highest junction temperature. minimum IOCSET from specification table. Determine IPEAK PEAK where output inductor ripple current.
TABLE OUTPUT VOLTAGE PROGRAM NAME VID25 VID3 VID2 VID1 VID0 NOMINAL OUTPUT VOLTAGE DACOUT 1.050 1.075 1.100 1.125 1.150 1.175 1.200 1.225 1.250 1.275 1.300 1.325 1.350 1.375 1.400 1.425 VID25 VID3 NAME VID2 VID1 VID0 NOMINAL OUTPUT VOLTAGE DACOUT 1.450 1.475 1.500 1.525 1.550 1.575 1.600 1.625 1.650 1.675 1.700 1.725 1.750 1.775 1.800 1.825
NOTE: connected connected through pull-up resistors.
HIP6004E
COMPARATOR VOSC VOUT LOAD VE/A RETURN DRIVER DRIVER PHASE VOUT
HIP6004E
UGATE PHASE
(PARASITIC)
LGATE PGND
REFERENCE
ERROR
FIGURE PRINTED CIRCUIT BOARD POWER GROUND PLANES ISLANDS
DETAILED COMPENSATION COMPONENTS VOUT
Figure shows critical power components converter. minimize voltage overshoot interconnecting wires indicated heavy lines should part ground power plane printed circuit board. components shown Figure should located close together possible. Please note that capacitors each represent numerous physical capacitors. Locate HIP6004E within inches MOSFETs, circuit traces MOSFETs' gate source connections from HIP6004E must sized handle peak current. Figure shows circuit traces that require additional layout consideration. single point ground plane construction circuits shown. Minimize leakage current paths locate capacitor, close because internal current source only 10µA. Provide local decoupling between pins. Locate capacitor, CBOOT close practical BOOT PHASE pins.
BOOT CBOOT +VIN VOUT LOAD
COMP
HIP6004D DACOUT
FIGURE VOLTAGE-MODE BUCK CONVERTER COMPENSATION DESIGN
wave smoothed output filter CO). modulator transfer function small-signal transfer function VOUT/VE/A This function dominated Gain output filter CO), with double pole break frequency zero FESR Gain modulator simply input voltage (VIN) divided peak-to-peak oscillator voltage VOSC
Modulator Break Frequency Equations
HIP6004E
PHASE +12V
CVCC
FIGURE PRINTED CIRCUIT BOARD SMALL SIGNAL LAYOUT GUIDELINES
compensation network consists error amplifier (internal HIP6004E) impedance networks ZFB. goal compensation network provide closed loop transfer function with highest crossing frequency (f0dB) adequate phase margin. Phase margin difference between closed loop phase f0dB 180=degrees. equations below relate compensation network's poles, zeros gain components Figure these guidelines locating poles zeros compensation network: Pick Gain (R2/R1) desired converter bandwidth. Place Zero Below Filter's Double Pole (~75% FLC). Place Zero Filter's Double Pole. Place Pole Zero. Place Pole Half Switching Frequency. Check Gain against Error Amplifier's Open-Loop Gain. Estimate Phase Margin Repeat Necessary.
Feedback Compensation
Figure highlights voltage-mode control loop synchronous-rectified buck converter. output voltage (VOUT) regulated Reference voltage level. error amplifier (Error Amp) output (VE/A) compared with oscillator (OSC) triangular wave provide pulsewidth modulated (PWM) wave with amplitude PHASE node.
HIP6004E
Compensation Break Frequency Equations
Modern microprocessors produce transient load rates above 1A/ns. High frequency capacitors initially supply transient slow current load rate seen bulk capacitors. bulk filter capacitor values generally determined (Effective Series Resistance) voltage rating requirements rather than actual capacitance requirements. High frequency decoupling capacitors should placed close power pins load physically possible. careful inductance circuit board wiring that could cancel usefulness these inductance components. Consult with manufacturer load specific decoupling requirements. only specialized low-ESR capacitors intended switching-regulator applications bulk capacitors. bulk capacitor's will determine output ripple voltage initial voltage drop after high slew-rate transient. aluminum electrolytic capacitor's value related case size with lower available larger case sizes. However, Equivalent Series Inductance (ESL) these capacitors increases with case size reduce usefulness capacitor high slew-rate transient loading. Unfortunately, specified parameter. Work with your capacitor supplier measure capacitor's impedance with frequency select suitable component. most cases, multiple electrolytic capacitors small case size perform better than single large case capacitor.
Figure shows asymptotic plot DC-DC converter's gain frequency. actual Modulator Gain high gain peak high factor output filter shown Figure Using above guidelines should give Compensation Gain similar curve plotted. open loop error amplifier gain bounds compensation gain. Check compensation gain with capabilities error amplifier. Closed Loop Gain constructed log-log graph Figure adding Modulator Gain Compensation Gain dB). This equivalent multiplying modulator transfer function compensation transfer function plotting gain. compensation gain uses external impedance networks provide stable, high bandwidth (BW) overall loop. stable control loop gain crossing with -20dB/decade slope phase margin greater than degrees. Include worst case component variations when determining phase margin.
Output Inductor Selection
GAIN (dB) FESR 100K 20LOG (R2/R1) MODULATOR GAIN OPEN LOOP ERROR GAIN
output inductor selected meet output voltage ripple requirements minimize converter's response time load transient. inductor value determines converter's ripple current ripple voltage function ripple current. ripple voltage current approximated following equations:
VOUT VOUT VOUT
20LOG (VIN/VOSC) COMPENSATION GAIN CLOSED LOOP GAIN
Increasing value inductance reduces ripple current voltage. However, large inductance values reduce converter's response time load transient. parameters limiting converter's response load transient time required change inductor current. Given sufficiently fast control loop design, HIP6004E will provide either 100% duty cycle response load transient. response time time required slew inductor current from initial current value transient current level. During this interval difference between inductor current transient current level must supplied output capacitor. Minimizing response time minimize output capacitance required. response time transient different application load removal load. following
FREQUENCY (Hz)
FIGURE ASYMPTOTIC BODE PLOT CONVERTER GAIN
Component Selection Guidelines
Output Capacitor Selection
output capacitor required filter output supply load transient current. filtering requirements function switching frequency ripple current. load transient requirements function slew rate (di/dt) magnitude transient load current. These requirements generally with capacitors careful layout.
HIP6004E
equations give approximate response time interval application removal transient load:
tRISE ITRAN VOUT tFALL ITRAN VOUT
where: ITRAN transient load current step, tRISE response time application load, tFALL response time removal load. With input source, worst case response time either application removal load dependent upon DACOUT setting. sure check both these equations minimum maximum output levels worst case response time. With +12V input, output voltage level equal DACOUT, tFALL longest response time.
voltage-current transitions adequately model power loss reverse-recovery lower MOSFET's body diode. gate-charge losses dissipated HIP6004E don't heat MOSFETs. However, large gate-charge increases switching interval, which increases upper MOSFET switching losses. Ensure that both MOSFETs within their maximum junction temperature high ambient temperature calculating temperature rise according package thermal-resistance specifications. separate heatsink necessary depending upon MOSFET power, package type, ambient temperature flow.
PUPPER rDS(ON)
PLOWER rDS(ON) Where: duty cycle VOUT switch time, switching frequency.
Input Capacitor Selection
input bypass capacitors control voltage overshoot across MOSFETs. small ceramic capacitors high frequency decoupling bulk capacitors supply current needed each time turns Place small ceramic capacitors physically close MOSFETs between drain source important parameters bulk input capacitor voltage rating current rating. reliable operation, select bulk capacitor with voltage current ratings above maximum input voltage largest current required circuit. capacitor voltage rating should least 1.25 times greater than maximum input voltage voltage rating times conservative guideline. current rating requirement input capacitor buck regulator approximately load current. through hole design, several electrolytic capacitors needed. surface mount designs, solid tantalum capacitors used, caution must exercised with regard capacitor surge current rating. These capacitors must capable handling surge-current power-up. Some capacitor series available from reputable manufacturers surge current tested.
Standard-gate MOSFETs normally recommended with HIP6004E. However, logic-level gate MOSFETs used under special circumstances. input voltage, upper gate drive level, MOSFET's absolute gate-tosource voltage rating determine whether logic-level MOSFETs appropriate. Figure shows upper gate drive (BOOT pin) supplied bootstrap circuit from VCC. boot capacitor, CBOOT develops floating supply voltage referenced PHASE pin. This supply refreshed each cycle voltage less boot diode drop (VD) when lower MOSFET, turns Logic-level MOSFETs only used MOSFET's absolute gate-to-source voltage rating exceeds maximum voltage applied VCC.
+12V DBOOT BOOT +12V
HIP6004E
UGATE PHASE
CBOOT NOTE: VG-S NOTE: VG-S =VCC
MOSFET Selection/Considerations
HIP6004E requires N-Channel power MOSFETs. These should selected based upon rDS(ON) gate supply requirements, thermal management requirements. high-current applications, MOSFET power dissipation, package selection heatsink dominant design factors. power dissipation includes loss components; conduction loss switching loss. conduction losses largest component power dissipation both upper lower MOSFETs. These losses distributed between MOSFETs according duty factor (see equations below). Only upper MOSFET switching losses, since Schottky rectifier clamps switching node before synchronous rectifier turns These equations assume linear
LGATE PGND
FIGURE UPPER GATE DRIVE BOOTSTRAP OPTION
Figure shows upper gate drive supplied direct connection This option should only used converter systems where main input voltage +5VDC less. peak upper gate-to-source voltage approximately less input supply. main power +12VDC
HIP6004E
bias, gate-to-source voltage logiclevel MOSFET good choice logic-level MOSFET used absolute gate-to-source voltage rating exceeds maximum voltage applied
+12V LESS BOOT
HIP6004E
UGATE PHASE NOTE: VG-S =VCC NOTE: VG-S =VCC
LGATE PGND
FIGURE UPPER GATE DRIVE DIRECT DRIVE OPTION
Schottky Selection
Rectifier clamp that catches negative inductor swing during dead time between turning lower MOSFET turning upper MOSFET. diode must Schottky type prevent lossy parasitic MOSFET body diode from conducting. acceptable omit diode body diode lower MOSFET clamp negative inductor swing, efficiency will drop percent result. diode's rated reverse breakdown voltage must greater than maximum input voltage.
HIP6004E DC-DC Converter Application Circuit
Figure shows application circuit DC-DC Converter microprocessor. Detailed information circuit, including complete Bill-of-Materials circuit board description, found Application Note AN9672. Although Application Note details HIP6004, same evaluation platform used evaluate HIP6004E. Intersil AnswerFAX (321-724-7800) Doc. #99672.
HIP6004E VRM8.5 Application
VRM8.5 requires power sequencing between VCCcore. application circuit VRM8.5 using HIP6004E provided Technical Brief TBxxx.
HIP6004E
+12V
1000µF
2N6394 +12V
0.1µF 1000pF 0.1µF VSEN VID25mV VID0 VID1 VID2 VID3 0.1µF UGATE PHASE
OCSET PGOOD BOOT
MONITOR PROTECTION
HIP6004E LGATE PGND COMP COUT 1000µF
+VOUT
2.2nF 8.2nF 0.1µF
1.33K
Component Selection Notes:
COUT Each 1000µF 6.3W VDC, Sanyo MV-GX Equivalent. Each 330µF VDC, Sanyo MV-GX Equivalent. Core: Micrometals T50-52B; Winding: Turns 16AWG. Core: Micrometals T50-52; Winding: Turns 18AWG. 1N4148 Equivalent. Schottky, Motorola MBR340 Equivalent. Intersil MOSFET; RFP70N03.
FIGURE MICROPROCESSOR DC-DC CONVERTER
HIP6004E Small Outline Plastic Packages (SOIC)
INDEX AREA SEATING PLANE 0.25(0.010)
M20.3 (JEDEC MS-013-AC ISSUE
LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 2.35 0.10 0.33 0.23 12.60 7.40 2.65 0.30 0.51 0.32 13.00 7.60 NOTES Rev. 12/93
0.0926 0.0040 0.013 0.0091 0.4961 0.2914
0.1043 0.0118 0.0200 0.0125 0.5118 0.2992
0.10(0.004)
0.050 0.394 0.010 0.016 0.419 0.029 0.050
1.27 10.00 0.25 0.40 10.65 0.75 1.27
0.25(0.010)
NOTES: Symbols defined Series Symbol List" Section Publication Number Dimensioning tolerancing ANSI Y14.5M-1982. Dimension does include mold flash, protrusions gate burrs. Mold flash, protrusion gate burrs shall exceed 0.15mm (0.006 inch) side. Dimension does include interlead flash protrusions. Interlead flash protrusions shall exceed 0.25mm (0.010 inch) side. chamfer body optional. present, visual index feature must located within crosshatched area. length terminal soldering substrate. number terminal positions. Terminal numbers shown reference only. lead width "B", measured 0.36mm (0.014 inch) greater above seating plane, shall exceed maximum value 0.61mm (0.024 inch) Controlling dimension: MILLIMETER. Converted inch dimensions necessarily exact.
Intersil semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Intersil semiconductor products sold description only. Intersil Corporation reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, site www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation 883, Mail Stop 53-204 Melbourne, 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil Mercure Center 100, Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, Hsing North Road Taipei, Taiwan Republic China TEL: (886) 2716 9310 FAX: (886) 2715 3029
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