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Practical Counter Examples Using Z893XX
AN008302-0701
ZiLOG Worldwide Headquarters Hamilton Avenue Campbell, 95008 Telephone: 408.558.8500 Fax: 408.558.8300 www.zilog.com
Application Note AppNoteTitle
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AN008302-0701
APPLICATION NOTE
PRACTICAL COUNTER EXAMPLES USING Z893XX
HERE PRACTICAL DEMONSTRATIONS IMPLEMENT GENERALPURPOSE COUNTER USING ON-CHIP RESOURCES Z893XX 16-BIT FIXED-POINT DSP.
INTRODUCTION
General-Purpose Counters (GPCs) very useful time events, control length generated tone, schedule interrupt when interrupt time based other interrupt sources unsuitable terms timing. example, interrupt CODEC interface occurring desired frequency other unrelated events need timed, then comes play. Although many potential applications exist, practical examples readably available. This application note demonstrates implement counter using on-chip resources Z893XX. Z893XX device contains on-board GPC. Included this application note pieces program software showing plug-and-play counter examples: "plain" counter demonstration which both CODECs disabled. SCLK generated; used source counter. Demonstration code which used source counter.
Hardware Implementation
hardware interface very straightforward. necessary hardware incorporated Z89391 Application Development Kit, which integrates emulator with evaluation section, including CODEC. (The Z89391 Application Development Kit, Z8939100ZCO, ordered directly from Zilog complete ready-to-use evaluation platform.) Z89391 Application Development comprises only handful components, excluding emulator portion, course, entire emulation section replaced with single DSP. (Refer Figures which shows complete Z89391 schematic.) Refer Table interrupt structure. Table Interrupt Structure Reset Vector INT2 INT1 INT0 Reset Vector 000h Timer/Counter-Generated Interrupt Used Internal CODEC Used Source
AP96DSP0600
AN008302-0701
Practical Counter Examples Using Z893XX
Figure Z89391 Schematic Diagram-Part
AN008302-0701
AP96DSP0600
Practical Counter Examples Using Z893XX
Figure Z89391 Schematic Diagram-Part
AP96DSP0600
AN008302-0701
Practical Counter Examples Using Z893XX
Figure Z89391 Schematic Diagram-Part
AN008302-0701
AP96DSP0600
Practical Counter Examples Using Z893XX
Figure Z89391 Schematic Diagram-Part
AP96DSP0600
AN008302-0701
Practical Counter Examples Using Z893XX
Figure Z89391 Schematic Diagram-Part
AN008302-0701
AP96DSP0600
Practical Counter Examples Using Z893XX
Figure Z89391 Schematic Diagram-Part
AP96DSP0600
AN008302-0701
Practical Counter Examples Using Z893XX
Figure Z89391 Schematic Diagram-Part
AN008302-0701
AP96DSP0600
Practical Counter Examples Using Z893XX
Software
There pieces software. first "plain" counter demonstration. Both CODECs disabled, SCLK generated. used source counter. second piece demonstration code, CLK/2 used source counter. There primary Interrupt Service Routines (ISRs): CODEC ISR.
General-Purpose Counter Example Clock Source CODEC Counter Output E3E8 1000 Count
1000 1000 microseconds (µs) 125000 milliseconds (ms) therefore, every entry once
CODEC1 Save Dummy Restore
Example Clock Source CODEC Counter Output
Save EXt6 Restore
E002
Decimal Count 375000
Note: Counter down counter. therefore, every entry once
Example Clock Source Oscillator DFFFfff 8191 count (CLK SOURCE/2)
Figure Software Flowchart
Output 8191 1,365,167 oscilloscope logic analyzer connected external observe Counter period. performed with accumulator contents that external data inverted after each counter time out.
software flow also very straightforward (see Figure interrupts rate given initialization EXT4 register, which significantly slower than CODEC rate. processor simply idles until internal CODEC internal interrupt occurs. time between each interrupt calculated follows: Emulator FSYNC 2.0/256 24.000 sampling rate
SCLK 24/(3x2x2)
Every entry CODEC1, therefore, 1/125 microseconds.
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Practical Counter Examples Using Z893XX
SOURCE CODE
;CODEC Settling Time Delay Counter Demonstration. Both CODECs Enabled ;SCLK provided that CODEC actually working. ;CLK used source counter. ;Written Z89391 Application Development Kit, Z8939100ZCO. Startup: ;**************************** Initialize Registers ;**************************** P0:0, #%00 @P0:0, #%00 #%0000 ;*************************** ;Initialize CODEC Interface ;*************************** EXT7, #%C00D ;Emulator 24.000 ;SCLK 24/(3x2x2) 2.0MHz ;FSYNC 2.0/256 EXT7, #%C000 ;Load EXT7-2 with 1100 0000 0000 0000 ;CODEC Enabled, Internal SCLK generation ;Pointer initialized bank0 location ;Initialize bank location value ;Initialize Accumulator
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Practical Counter Examples Using Z893XX ;*************************** ;Test Counter ;*************************** Begin: ext4,#%E002 ;1110 0000 0000 0010 ;||||_ 0002 Count ;|||_ Clock Source CODEC Counter Output ;||_ Count Operation Enabled Counter Enabled ;Count 2,1,0 after ;interrupt will generated follows: kHz, then 3*125 =375 ext4,#%E3E8 ;1110 0000 0000 0010 ;||||_ 03E8 1000 Count ;|||_ Clock Source CODEC Counter Output ;||_ Count Operation Enabled Counter Enabled ;Interrupt will generated follows: then 1000 1000*125 125000 milliseconds (ms)
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Practical Counter Examples Using Z893XX SIEF Loop1: EXT6,A Loop1 Countint: XORA,#%FFFF SIEF CODEC1: SIEF EndInt: SIEF ;**************************** ;Reset Vector Initialization ;**************************** org% 0FFC %0000 Countint CODEC1 EndInt ;Initialize Reset Interrupt vectors ;Reset Vector 0000h ;Interrupt General-Purpose Counter ;Interrupt Internal CODEC Interrupt ;Interrupt Used ;Enable interrupts ;Return main program ;Enable interrupts ;Return main program ;Invert Data After each Count Time ;Enable interrupts ;Return main program ;Trace Logic Analyzer Counter period ;Infinite Loop ;Enable Interrupts
vector reset=startup ;reset vector
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Practical Counter Examples Using Z893XX ;PlainPlain Counter Demonstration. Both CODECs disabled. SCLK. ;CODEC Settling Time delay Counter demonstration. Both CODECs Enabled. ;SCLK provided that CODEC actually working. ;FS0 used source counter. ;Written Z89391 Application Development Kit, Z8939100ZCO. Startup: ;**************************** Initialize Registers ;**************************** P0:0, #%00 @P0:0, #%00 #%0000 ;*************************** ;Initialize CODEC Interface ;*************************** EXT7, #%0000 EXT7, #%0000 ;Disable CODEC ;Disable CODEC ;Pointer initialized bank0 location ;Initialize bank location value ;Initialize Accumulator
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Practical Counter Examples Using Z893XX ;*************************** ;Test Counter ;*************************** Begin: ext4,#%DFFF ;1101 1111 1111 1111 ;||||_ 1FFF Count ;|||_ Clock Source Oscillator ;||_ Count Operation Enabled Counter Enabled ;Assume emulator source ;1fff 8191 count (CLK Source/2) ;Output 8191*166 1,365,167 SIEF Loop1: Loop1 Countint: SIEF CODEC1: SIEF EndInt: SIEF ;**************************** ;Reset Vector Initialization ;**************************** %0FFC %0000 Countint CODEC1 EndInt ;Initialize Reset Interrupt vectors. ;Reset Vector 0000h ;Interrupt General-Purpose Counter. ;Interrupt Internal CODEC Interrupt. ;Interrupt Used. ;Enable interrupts ;Return main program ;Enable interrupts ;Return main program A,#%FFFF;Invert data after each Count timeout ;Enable interrupts ;Return main program EXT6,A;Trace Logic Analyzer Counter period ;Infinite Loop ;Enable Interrupts
vector reset=startup ;reset vector
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