FEATURES Supply Maximum Ratings Analog Signal Range Resistance (
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LC2MOS Precision Quad SPST Switches ADG411/ADG412/ADG413
FEATURES Supply Maximum Ratings Analog Signal Range Resistance (<35 Ultralow Power Dissipation Fast Switching Times <175 tOFF <145 TTL/CMOS Compatible Plug-In Replacement DG411/DG412/DG413 APPLICATIONS Audio Video Switching Automatic Test Equipment Precision Data Acquisition Battery-Powered Systems Sample Hold Systems Communication Systems
ADG411
ADG412
ADG413
GENERAL DESCRIPTION
ADG411, ADG412, ADG413 monolithic CMOS devices comprising four independently selectable switches. They designed enhanced LC2MOS process which provides power dissipation gives high switching speed resistance. resistance profile very flat over full analog input range ensuring excellent linearity distortion when switching audio signals. Fast switching speed coupled with high signal bandwidth also make parts suitable video signal switching. CMOS construction ensures ultralow power dissipation making parts ideally suited portable battery-powered instruments. ADG411, ADG412, ADG413 contain four independent SPST switches. ADG411 ADG412 differ only that digital control logic inverted. ADG411 switches turned with logic appropriate control input, while logic high required ADG412. ADG413 switches with digital control logic similar that ADG411 while logic inverted other switches. Each switch conducts equally well both directions when each input signal range that extends supplies. condition, signal levels supplies blocked. switches exhibit break-before-make switching action multiplexer applications. Inherent design charge injection minimum transients when switching digital inputs.
SWITCHES SHOWN LOGIC INPUT
PRODUCT HIGHLIGHTS
Extended Signal Range ADG411, ADG412, ADG413 fabricated enhanced LC2MOS, giving increased signal range which extends fully supply rails. Ultralow Power Dissipation Break-Before-Make Switching This prevents channel shorting when switches configured multiplexer. Single Supply Operation applications where analog signal unipolar, ADG411, ADG412, ADG413 operated from single rail power supply. parts fully specified with single power supply will remain functional with single supplies
REV.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. license granted implication otherwise under patent patent rights Analog Devices. Trademarks registered trademarks property their respective owners.
Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 2004 Analog Devices, Inc. rights reserved.
Dual Supply
Parameter ANALOG SWITCH Analog Signal Range LEAKAGE CURRENTS Source Leakage (OFF) Drain Leakage (OFF) Channel Leakage (ON) DIGITAL INPUTS Input High Voltage, VINH Input Voltage, VINL Input Current IINL IINH DYNAMIC CHARACTERISTICS2 tOFF
10%,
10%,
10%, unless otherwise noted)
Version 0.25 0.25
Version +125
Units
Test Conditions/Comments
0.25 0.25
+13.5 -13.5 +16.5 -16.5 15.5 15.5 Test Circuit 15.5 15.5 Test Circuit 15.5 Test Circuit
0.005
0.005
VINL VINH
Break-Before-Make Time Delay, (ADG413 Only) Charge Injection Isolation Channel-to-Channel Crosstalk (OFF) (OFF) (ON) POWER REQUIREMENTS 0.0001 0.0001 0.0001
Test Circuit Test Circuit Test Circuit Test Circuit MHz; Test Circuit MHz; Test Circuit +16.5 -16.5 Digital Inputs
0.0001 0.0001 0.0001
NOTES Temperature ranges follows: Versions: -40°C +85°C; Versions: -55°C +125°C. Guaranteed design, subject production test. Specifications subject change without notice.
REV.
ADG411/ADG412/ADG413 Single Supply
Parameter ANALOG SIGNAL RANGE LEAKAGE CURRENTS Source Leakage (OFF) Drain Leakage (OFF) Channel Leakage (ON) DIGITAL INPUTS Input High Voltage, VINH Input Voltage, VINL Input Current IINL IINH DYNAMIC CHARACTERISTICS2 tOFF
10%,
Version 0.25 0.25
10%, unless otherwise noted)
Version +125 0.25 0.25
Units
Test Conditions/Comments +10.8 +13.2 12.2/1 1/12.2 Test Circuit 12.2/1 1/12.2 Test Circuit +12.2 V/+1 Test Circuit
0.005
0.005
VINL VINH
Break-Before-Make Time Delay, (ADG413 Only) Charge Injection Isolation Channel-to-Channel Crosstalk (OFF) (OFF) (ON) POWER REQUIREMENTS 0.0001 0.0001
Test Circuit Test Circuit Test Circuit Test Circuit MHz; Test Circuit MHz; Test Circuit +13.2 Digital Inputs
0.0001 0.0001
+5.25
NOTES Temperature ranges follows: Versions: -40°C +85°C; Versions: -55°C +125°C. Guaranteed design, subject production test. Specifications subject change without notice.
Truth Table (ADG411/ADG412)
Truth Table (ADG413)
ADG411
ADG412
Switch Condition
Logic
Switch
Switch
REV.
ADG411/ADG412/ADG413
ABSOLUTE MAXIMUM RATINGS
+25°C, unless otherwise noted)
-0.3 +0.3 -0.3 Analog, Digital Inputs2 Whichever Occurs First Continuous Current, Peak Current, (Pulsed Duty Cycle max) Operating Temperature Range Industrial Version) -40°C +85°C Extended Version) -55°C +125°C Storage Temperature Range -65°C +150°C Junction Temperature +150°C Cerdip Package, Power Dissipation Thermal Impedance 76°C/W Lead Temperature, Soldering sec) +300°C
Plastic Package, Power Dissipation Thermal Impedance 117°C/W Lead Temperature, Soldering sec) +260°C SOIC Package, Power Dissipation Thermal Impedance 77°C/W TSSOP Package, Power Dissipation Thermal Impedance 115°C/W Thermal Impedance 35°C/W Lead Temperature, Soldering Vapor Phase sec) +215°C Infrared sec) +220°C
NOTES Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions above those listed operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability. Only absolute maximum rating applied time. Overvoltages will clamped internal diodes. Current should limited maximum ratings given.
CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although ADG411/ADG412/ADG413 features proprietary protection circuitry, permanent damage occur devices subjected high energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality.
WARNING!
SENSITIVE DEVICE
REV.
ADG411/ADG412/ADG413
ORDERING GUIDE
Model ADG411BN ADG411BR ADG411BR-REEL ADG411BR-REEL7 ADG411BRZ* ADG411BRZ-REEL* ADG411BRZ-REEL7* ADG411BRU ADG411BRU-REEL ADG411BRU-REEL7 ADG411BRUZ* ADG411BRUZ-REEL* ADG411BRUZ-REEL7* ADG411TQ ADG411BCHIPS ADG412BN ADG412BR ADG412BR-REEL ADG412BR-REEL7 ADG412BRZ* ADG412BRZ-REEL* ADG412BRZ-REEL7* ADG412BRU ADG412BRU-REEL ADG412BRU-REEL7 ADG412BRUZ* ADG412BRUZ-REEL* ADG412BRUZ-REEL7* ADG412TQ ADG412TCHIPS ADG413BN ADG413BR ADG413BR-REEL ADG413BRZ* ADG413BRZ-REEL*
Pb-free part.
Temperature Range -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -55°C +125°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -55°C +125°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C
Package Description P-DIP SOIC SOIC SOIC SOIC SOIC SOIC TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP CERDIP P-DIP SOIC SOIC SOIC SOIC SOIC SOIC TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP CERDIP P-DIP SOIC SOIC SOIC SOIC
Package Option N-16 R-16A R-16A R-16A R-16A R-16A R-16A RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 Q-16 N-16 R-16A R-16A R-16A R-16A R-16A R-16A RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 Q-16 N-16 R-16A R-16A R-16A R-16A
REV.
ADG411/ADG412/ADG413
TERMINOLOGY CONFIGURATION (DIP/SOIC/TSSOP)
(OFF) (OFF) (ON) (VS) (OFF) (OFF) (ON) tOFF
Crosstalk
Isolation Charge Injection
Most positive power supply potential. Most negative power supply potential dual supplies. single supply applications, connected GND. Logic power supply Ground reference. Source terminal. input output. Drain terminal. input output. Logic control input. Ohmic resistance between Source leakage current with switch OFF. Drain leakage current with switch OFF. Channel leakage current with switch Analog voltage terminals switch source capacitance. switch drain capacitance. switch capacitance. Delay between applying digital control input output switching Delay between applying digital control input output switching off. time time measured between points both switches, when switching from address state another. measure unwanted signal which coupled through from channel another result parasitic capacitance. measure unwanted signal coupling through switch. measure glitch impulse transferred from digital input analog output during switching.
VIEW (Not Scale)
ADG411 ADG412 ADG413
REV.
Typical Performance
+10V +12V
+10V -10V +12V -12V
+15V -15V
+15V
DRAIN SOURCE VOLTAGE
DRAIN SOURCE VOLTAGE
Figure Resistance Function (VS) Dual Supplies
Figure Resistance Function (VS) Single Supply
+15V -15V
100mA +15V -15V
10mA
ISUPPLY
+125
DRAIN SOURCE VOLTAGE
100nA
100k FREQUENCY (Hz)
Figure Resistance Function (VS) Different Temperatures
Figure Supply Current Input Switching Frequency
+15V -15V
0.04
LEAKAGE CURRENT (nA)
(OFF)
LEAKAGE CURRENT (nA)
0.02
+15V -15V
(ON)
(OFF) 0.00
(OFF) 0.01 (ON)
(OFF) -0.02
0.001
100k FREQUENCY (Hz)
-0.04
DRAIN SOURCE VOLTAGE
Figure Leakage Currents Function Temperature
Figure Leakage Currents Function (VS)
REV.
ADG411/ADG412/ADG413
+15V -15V
ISOLATION (dB)
APPLICATION
Figure illustrates precise, fast, sample-and-hold circuit. AD845 used input buffer while output operational amplifier AD711. During track mode, closed output VOUT follows input signal VIN. hold mode, opened signal held hold capacitor switch capacitor leakage, voltage hold capacitor will decrease with time. ADG411/ADG412/ ADG413 minimizes this droop leakage specifications. droop rate further minimized polystyrene hold capacitor. droop rate circuit shown typically µV/µs.
100k FREQUENCY (Hz)
Figure Isolation Frequency
+15V -15V
second switch, SW2, which operates parallel with SW1, included this circuit reduce pedestal error. Since both switches will same potential, they will have differential effect AD711, which will minimize charge injection effects. Pedestal error also reduced compensation network This compensation network also reduces hold time glitch while optimizing acquisition time. Using illustrated amps component values, pedestal error maximum value over input range. Both acquisition settling times
+15V 2200pF +15V AD845 1000pF 2200pF +15V
CROSSTALK (dB)
AD711
VOUT
-15V
-15V
100k FREQUENCY (Hz)
ADG411 ADG412 ADG413
Figure Crosstalk Frequency
-15V
Figure Fast, Accurate Sample-and-Hold
REV.
ADG411/ADG412/ADG413 Test Circuits
(OFF) (OFF)
(ON)
V1/IDS
Test Circuit Resistance
Test Circuit Leakage
Test Circuit Leakage
+15V
VOUT 35pF
ADG411
ADG412
VOUT
-15V
tOFF
Test Circuit Switching Times
+15V
VOUT2 35pF VOUT2 35pF VOUT1 VOUT1
IN1,
-15V
Test Circuit Break-Before-Make Time Delay
+15V
VOUT 10nF -15V VOUT QINJ VOUT VOUT
Test Circuit Charge Injection
REV.
ADG411/ADG412/ADG413
+15V
+15V
VOUT
VOUT
VIN1 VIN2 CHANNEL CHANNEL CROSSTALK VS/VOUT
-15V
-15V
Test Circuit Isolation
Test Circuit Channel-to-Channel Crosstalk
-10-
REV.
ADG411/ADG412/ADG413
OUTLINE DIMENSIONS 16-Lead Ceramic Dual In-Line Package [CERDIP] (Q-16)
Dimensions shown inches (millimeters)
0.005 (0.13)
16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16)
Dimensions shown millimeters
5.10 5.00 4.90
0.098 (2.49)
0.310 (7.87) 0.220 (5.59)
0.200 (5.08)
0.840 (21.34)
0.060 (1.52) 0.015 (0.38) 0.150 (3.81)
0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20)
4.50 4.40 4.30
6.40
0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36)
0.100 (2.54)
0.070 (1.78) SEATING PLANE 0.030 (0.76)
1.20 0.20 0.09 0.65 0.30 0.19 COPLANARITY 0.10 SEATING PLANE 0.75 0.60 0.45
CONTROLLING DIMENSIONS INCHES; MILLIMETER DIMENSIONS PARENTHESES) ROUNDED-OFF INCH EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN
0.15 0.05
COMPLIANT JEDEC STANDARDS MO-153AB
16-Lead Standard Small Outline Package [SOIC] (RW-16) R-16A Suffix
Dimensions shown millimeters (inches)
10.50 (0.4134) 10.10 (0.3976)
16-Lead Plastic Dual In-Line Package [PDIP] (N-16)
Dimensions shown inches (millimeters)
0.785 (19.94) 0.765 (19.43) 0.745 (18.92)
0.295 (7.49) 0.285 (7.24) 0.275 (6.99)
7.60 (0.2992) 7.40 (0.2913)
10.65 (0.4193) 10.00 (0.3937)
0.100 (2.54) 0.015 (0.38) 0.180 (4.57)
0.325 (8.26) 0.310 (7.87) 0.300 (7.62)
0.150 (3.81) 0.135 (3.43) 0.120 (3.05)
1.27 (0.0500) 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122)
2.65 (0.1043) 2.35 (0.0925)
0.75 (0.0295) 0.25 (0.0098)
0.150 (3.81) 0.130 (3.30) 0.110 (2.79)
COPLANARITY 0.10
SEATING PLANE
0.33 (0.0130) 0.20 (0.0079)
0.022 (0.56) 0.018 (0.46) 0.014 (0.36)
0.060 (1.52) SEATING PLANE 0.050 (1.27) 0.045 (1.14)
0.015 (0.38) 0.010 (0.25) 0.008 (0.20)
1.27 (0.0500) 0.40 (0.0157)
COMPLIANT JEDEC STANDARDS MS-013AA CONTROLLING DIMENSIONS MILLIMETERS; INCH DIMENSIONS PARENTHESES) ROUNDED-OFF MILLIMETER EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN
COMPLIANT JEDEC STANDARDS MO-095AC CONTROLLING DIMENSIONS INCHES; MILLIMETER DIMENSIONS PARENTHESES) ROUNDED-OFF INCH EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN
REV.
-11-
ADG411/ADG412/ADG413 Revision History
Location 7/04-Data Sheet changed from Rev. Rev. Page
Changes ORDERING GUIDE
C00024-0-7/04(B)
Updated OUTLINE DIMENSIONS
-12-
REV.
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