Mobile AthlonXP-M Processor with 512KB Cache Technology Performan

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Mobile AthlonXP-M Processor with 512KB Cache Technology Performan

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Mobile AthlonXP-M Processor with 512KB Cache
Technology Performance Leadership Microprocessors
Jack Huynh
Place Sunnyvale, 94088
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Mobile AthlonXP-M Processor
March 2003
Introduction: Continuing Performance Leadership Microprocessors
Founded 1969, shipped more than million processors worldwide. processors power behind desktop notebook PCs, generation servers workstations. Since introduction 1999, award-winning Athlonprocessor been known industry leader, enabling highest system performance levels market. Since launch October 2001, Athlon processor computer systems based Athlon processor have more than awards worldwide, including World's World Class Award Computer Product Year June 2002. all, Athlon processor family systems based such processors have more than awards worldwide, including World's World Class Award overall Product Year 2000 2002. mobile Athlon processor family provided industry-leading processing power pave road levels end-user capability with notebook application areas. These areas span from gaming productivity applications, include digital photo editing, digital video, image compression, video encoding, audio compression, modeling animation, speech recognition. Engineering technology leadership performance leadership. AMD's engineering technology leadership specific seventh-generation Athlon processor family includes driving innovations such instruction extensions aimed applications (3DNow!Professional technology) processor instruction level, memory HyperTransporttechnology platform level, 0.13-micron process with copper interconnect process technology level. With introduction mobile Athlon XP-M processor with 512KB cache 0.13-micron process technology, continues tradition technology innovation enabling highest levels notebook performance. discussion that follows provides in-depth look mobile Athlon XP-M processor with 512KB cache 0.13-micron process technology increases performance scalability QuantiSpeedarchitecture. differentiating features well real-world application performance benefits PowerNow!technology QuantiSpeed architecture will also discussed.
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Mobile AthlonXP-M Processor
March 2003
Manufacturing Technology Leadership with Leading Edge 0.13-Micron Process Technology
mobile Athlon XP-M processor, code-named "Barton," manufactured state-of-the-art nanometer (0.13-micron) copper technology newest member family seventh-generation Athlon processors designed meet computationally-intensive requirements software applications running high-performance mobile systems. mobile Athlon XP-M processor with 512KB cache based 0.13-micron process technology increases performance scalability provided QuantiSpeed architecture delivering higher clock speeds. mobile Athlon XP-M processor with 512KB cache also available low-power, small footprint µPGA package thin light notebook designs. 0.13-micron process technology designed provide thermal headroom necessary scale frequency within thermal limits mobile platforms, thus maximizing overall performance. mobile Athlon XP-M processor with 512KB cache 0.13-micron process technology, like mobile Athlon processors, also pin-compatible with AMD's established Socket infrastructure. With increased frequency scalability brought about 0.13-micron technology combined with PowerNow! technology QuantiSpeed architecture, continues deliver compelling solutions high-performance computing, superb integer, floating point, multimedia performance applications running x86-based platforms.
PowerNow!Technology: Optimizing Notebook System Battery Life while Delivering Performance Demand
addition PowerNow! technology within mobile Athlon XP-M processor builds upon original PowerNow! technology implemented mobile AMD-K6®-2+ mobile AMD-K6-III+ processors. This technology allows processor dynamically modify delivered performance-based application requirements-to enhance system battery life. accomplish this, PowerNow! technology-enabled dynamic software controls processor voltage frequency based application requirements. first bring dynamic power-management solution notebook PCs.
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Mobile AthlonXP-M Processor
March 2003
first-generation mobile systems, system processor runs fixed voltage frequency. ACPI (Advanced Configuration Power Interface) processor power management based idle detection. When operating system detects that system idle, places processor "Halt" "Stop Grant" state. Halt Stop Grant state, processor executing operating system application code power level drops significantly lower level. ACPI processor power management effective traditional applications such Microsoft® Word, Outlook, Excel, PowerPoint, other applications that normally idle waiting user input. However, ACPI processor power management generally effective with newer "real-time" "time-dependent" software applications such players, soft modems, voice recognition, Internet telephone applications, video conferencing, Internet conferencing, audio recording, writing, MPEG-4 encoding, video editing, playback streaming audio video such Windows® media, games. acceptable performance, these real-time time-dependent applications require steady stream execution processor. same time, these types applications often require full performance processor. because these applications characterized periods inactivity, ACPI processor power-management techniques effective. example, playback might require only processor's bandwidth, ACPI power management forces processor operate 100% performance, thus wasting significant amount energy and, therefore, battery life. Using dual speeds another common technique extending battery life. dual-speed systems, processor operates full speed power operates low-performance mode with static, lower frequency when system uses battery power. While somewhat effective extending battery life, this powermanagement technique have impact performance major drawbacks. main issue with dual-speed processor power management that when system uses battery power, compromise must made between performance power consumption. performance level when system battery-powered high enough provide acceptable user experience most applications. This performance level sets processor performance higher than necessary some applications, increasing power reducing batterypowered time. performance level when system battery-powered optimize battery life, this setting produces poor experience user with some applications. Dual-speed processor power management optimal neither performance extending battery life.
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Mobile AthlonXP-M Processor
March 2003
augmented capabilities ACPI processor power management solved problems associated with dual-speed processor power management developing PowerNow! technology. PowerNow! technology allows processor dynamically switch between different processor performance states. performance state combination both processor core frequency voltage. Software controls transitions between different performance states. This innovative approach power management dynamically adjusts performance level processor match level performance needed application. PowerNow! technology following benefits: Extends system battery life through dynamic management Provides performance demand when required application Operates automatically background processor executes instructions frequency dictated processor's utilization applications operation, real-time applications starved processor cycles user's experience optimal. PowerNow! technology designed provide performance demand processor most efficient performance state current applications. This powermanagement technique provides right performance level while enhancing system battery life. Therefore, PowerNow! technology able optimize battery powered run-time based processor performance required applications operation. These characteristics PowerNow! technology designed particularly effective prolonging system battery life because processor's performance level should increased above most efficient power level very short periods time, only when necessary. Unlike ACPI dual-speed power management, PowerNow! technology designed provide performance demand power savings that scale with application's demands. important aspect PowerNow! technology that like ACPI 2.0, transparent user. There complicated settings, confusing application preferences, artificial system modes. PowerNow! technology helps optimize processor performance system battery life, simultaneously transparently system user.
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Mobile AthlonXP-M Processor
March 2003
Another important feature PowerNow! technology that designed respond rapidly demands placed processor various applications. PowerNow! technology update processor's performance level often times second, thus quickly responding needs applications user with very demands system's resources. PowerNow! technology software designed offer versatility because confined work conjunction with specific applications. Applications have modified work with PowerNow! technology. PowerNow! technology measures performance needs applications directly monitoring behavior core operating system. PowerNow! technology truly designed enhance battery life notebook while delivering performance demand.
QuantiSpeedArchitecture: Optimally Balanced Microarchitecture Real-World Application Performance
microprocessor component determining effectiveness computer system execute specific tasks shortest amount time. amount time required complete specific software tasks referred realworld application performance. Application performance function elements: Clock speed processor, measured Megahertz, Gigahertz amount work processor accomplish given clock cycle, measured instructions clock cycle (IPC) Application Performance [work completed clock cycle] [clock speed]= Frequency Different approaches taken optimize processor application performance. worked maintain more balanced microarchitecture with shorter pipeline designed much higher than competitive processors available market. Although other competitive processors enable deeper pipelines with fewer gates clock drive frequency improvements, deeper pipelines alone translate into less work clock cycle. This reduced work clock cycle reduced only offset improvements other areas, such branch prediction cache rates. Taken extreme, processor performance
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Mobile AthlonXP-M Processor
March 2003
actually reduced forcing frequency improvements expense improvements. This point illustrated office applications which tend branch-code intensive resulting lower performance deeper pipelines that must flushed with much greater performance penalty. reaffirmed Desktop Performance Optimization Intel Pentium® Processor paper "Integer basic office productivity applications, such Word spreadsheet processing, tend have many branches code, thus reducing overall capabilities. result, associated branch penalties performance these applications does generally scale well with frequency more resistant improvements micro-architectural means, such deeper pipelines." mobile Athlon XP-M processor with QuantiSpeed architecture implemented 0.13-micron process technology continues exhibit Athlon processor family's balanced combination improving clock frequency without compromising amount work done clock cycle therefore IPC. result processor design that produces high well high operating frequencies, optimum combination deliver highest levels performance real-world application environments. QuantiSpeed architecture consists four differentiating features that enhance application performance mobile Athlon XP-M processor: Nine-issue, superscalar, fully pipelined microarchitecture Superscalar, fully pipelined floating point unit (FPU) Hardware data prefetch Enhanced Translation Look-aside Buffers (TLBs)
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Mobile AthlonXP-M Processor
March 2003
2-way, 64KB Instruction Cache 24-entry TLB/256-entry
Predecode Cache
Branch Prediction Table
Fetch/Decode Control
3-Way Instruction Decoders
Instruction Control Unit (72-entry)
Integer Scheduler (18-entry)
Stack Map/Rename Scheduler (36-entry)
Register File (88-entry)
Interface Unit
FStore
FADD MMX3DNow!
FMUL 3DNow!
Cache 16-way, 512KB
Load/Store Queue Unit
2-way, 64KB Data Cache 40-entry TLB/256-entry
System Interface
Figure Mobile AthlonXP-M Microarchitecture Block Diagram
QuantiSpeedArchitecture: Nine-issue, Superscalar, Fully Pipelined Microarchitecture with High-Performance Cache Memory Architecture, Three Full Instruction Decoders
heart QuantiSpeed architecture fully pipelined, nine-issue, superscalar processor core. mobile Athlon XP-M processor provides wider execution bandwidth nine execution pipes when compared with competitive processors with execution pipes. nine execution engines comprised three address calculation units, three integer units, three floating-point units. order supply such highly superscalar microarchitecture, mobile Athlon XP-M processor implements very large on-chip cache architecture particularly caches closest core. mobile Athlon XP-M processor's high-performance, on-chip cache architecture includes dual-ported 128KB split-L1 cache with separate snoop ports, integrated full-speed,
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Mobile AthlonXP-M Processor
March 2003
16-way set-associative 512KB cache using 72-bit (64-bit data 8-bit ECC) interface. mobile Athlon XP-M processor's large integrated full-speed cache comprised separate 64KB, two-way set-associative data instruction caches which much larger than Pentium processor's cache (128KB 12KB µop). featuring larger cache, applications running mobile Athlon XP-M processor perform exceptionally fast because more instruction data information local processor. Applications exploit larger caches benefiting from increased support instruction data locality. data cache also eight banks provide maximum parallelism running multiple applications. supports concurrent accesses 64-bit loads stores. instruction cache contains predecode data assist multiple, highperformance instruction decoders. Both instruction data caches dual-ported contain dedicated snoop ports designed eliminate system coherency traffic, common systems with many devices, from interfering with application performance. mobile Athlon XP-M processor also includes integrated, fullspeed, 16-way set-associative, exclusive 512KB cache. When processor requests data, first searches data cache. processor finds data cache, result what known cache processor retrieves data from latency cache. processor retrieve data from cache, processor attempts retrieve data cache once again attempts obtain cache hit. event cache miss, processor must then request this data from slower system memory. With additional 256KB cache over previous mobile Athlon processors, mobile Athlon XP-M processor with 512KB cache increases performance applications such high-end gaming digital media keeping more frequently accessed instructions data close CPU. Higher set-associativity increases rate reducing data conflicts. This translates into more possible locations where important data reside cache memory instead system memory. With exclusive cache architecture, contents caches duplicated cache. This enables 512KB cache 128KB cache total usable storage space 640KB. mobile Athlon XP-M processor cache architecture also supports error correction code (ECC) protection. With these cache architecture features, mobile Athlon XP-M processor provides reliable, high-performance computing. When executing software, processor begins decoding program's instructions translating them into operations Ops) that microprocessor
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Mobile AthlonXP-M Processor
March 2003
execute. order continually feed execution engine with data, mobile Athlon XP-M processor includes three instruction decoders. Each decoder capable decoding three instructions clock cycle. comparison, Pentium designed decode only instruction clock cycle with resource only instruction decoder. Thus, Pentium only one-third maximum theoretical decode bandwidth mobile Athlon XP-M processor. decode bandwidth mobile Athlon XP-M processor enables processor advantageously utilize execution bandwidth capabilities QuantiSpeed architecture, thereby improving IPC.
QuantiSpeedArchitecture: Superscalar Fully Pipelined Floating Point Unit (FPU)
mobile Athlon XP-M processor offers most powerful, architecturally advanced floating-point units (FPU) delivered microprocessor. mobile Athlon XP-M processor's three-issue, superscalar floating-point capability based three pipelined, out-of-order floating-point execution units, each with one-cycle throughput. Using data format single-instruction multiple-data (SIMD) operations based MMXinstruction model, mobile Athlon XP-M processor deliver many four 32-bit, single-precision floating-point results clock cycle.
Microarchitecture
Three separate execution units mobile Athlon XP-M processor's floating-point pipeline support floating-point instructions, instructions, 3DNow! Professional technology instructions. three execution units are: Fstore-This floating point load/store pipeline that handles loads, stores, miscellaneous operations. Fadd-This adder pipeline that contains 3DNow! Professional technology, add, ALU/shifter, execution units. Fmul-This multiplier pipeline that contains ALU, multiplier, reciprocal unit, 3DNow! Professional technology instruction multiplier, support FDIV instructions.
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Mobile AthlonXP-M Processor
March 2003
addition superscalar design, mobile Athlon XP-M processor's super pipelined. This technique supports higher clock frequencies enables process complex floating-point instructions more quickly deliver high overall floating-point instruction throughput. comparison, Pentium processor only offers execution units, Fadd Fmul Fstore. Thus, example, mobile Athlon XP-M processor floating point addition multiplication clock cycle, while Pentium processor only multiplication addition clock cycle. seventh-generation mobile Athlon XP-M processor incorporates additional features such 36-entry instruction scheduler 88-entry register file independent, superscalar, out-of-order, speculative execution floating-point instructions. With three separate execution units, mobile Athlon XP-M processor's superscalar boost performance floating point-intensive applications varying from commercial applications such modeling consumer applications such high-end gaming mobile systems.
3DNow!Professional Technology: Innovation Mobile AthlonXP-M Processor Core
mobile Athlon XP-M processor with 3DNow! Professional technology adds instructions enhanced 3DNow! technology supported original Athlon processor family. These instructions, along with SIMD integer additions already included enhanced 3DNow! technology, compatible with Intel's technology. Table provides breakout 3DNow! technology instruction evolution.
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Mobile AthlonXP-M Processor
March 2003
Table Processor Support SIMD Instruction Extensions Instruction Architecture
Processor: 3DNow!technology version supported: Description instructions supported:
AMD-K6 Processor 3DNow! technology
AthlonProcessor Enhanced 3DNow! technology
Athlon XP-M Processor 3DNow! Professional technology
Original 3DNow! technology extensions
3DNow! technology plus extensions (part SSE) plus five DSP/communications extensions
Enhanced 3DNow! technology plus extensions (completing support)
3DNow! technology largely complementary architectural enhancements. implementing them variety ways, software developers able determine they utilize advanced architectural capabilities enabled SIMD instruction extensions. Examples applications most able benefit from these instruction extensions include speed recognition, video encoding/decoding, graphics generations. Many current software applications that SIMD-optimized different code paths benefit from 3DNow! technology SSE, depending processor architecture which these applications executed. processor architectures preceding mobile Athlon XP-M processor only supported 3DNow! enhanced 3DNow! technology, which yielded following three code path scenarios developers: Software optimized exclusively processor architectures with 3DNow! technology their 3DNow! technology-optimized code path processors supporting 3DNow! technology. Software optimized both processor architectures with 3DNow! technology, other industry processor architectures supporting SSE, their 3DNow! technology-optimized code path processors supporting 3DNow! technology.
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Mobile AthlonXP-M Processor
March 2003
Software optimized exclusively other industry processor architectures supporting non-optimized code path processor architectures. With advent 3DNow! Professional technology, mobile Athlon XP-M processor seamlessly allow SIMD-optimized software third scenario above recognize support optimized code path increased performance. recognition support 3DNow! Professional technology performed automatically software applications that industry standard feature flags, provided CPUID instruction automatically recognize support optimized code path. This means that with 3DNow! Professional technology's support both 3DNow! technologies, mobile Athlon XP-M processor able take advantage performance gains offered SIMD-optimized software applications. only mobile Athlon XP-M processor designed benefit from existing software applications supporting 3DNow! technologies, future, software developers planned have ability utilize strength both 3DNow! technology when optimizing code paths processor architectures that support 3DNow! Professional technology. mobile Athlon XP-M processor enables this advanced level SIMD optimization allowing 3DNow! instructions executed same code path.
QuantiSpeedArchitecture: Hardware Data Prefetch
further enhance processor and, therefore, processor performance, mobile Athlon XP-M processor also uses hardware data prefetch technology. This hardware data prefetch technology observes memory accesses, looks regular access patterns, speculatively fetches cache line with data into processor's data cache advance actual data access, therefore reducing average latency seen processor accessing memory. past, data prefetch supported through instructions introduced 3DNow! technologies. However, processor take advantage this capability, software applications specifically optimized with 3DNow! instructions. mobile Athlon XP-M processor designed automatically optimize performance existing software that previously been optimized using hardware data prefetch instructions supported 3DNow! Professional technology.
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Mobile AthlonXP-M Processor
March 2003
Benefits mobile Athlon XP-M processor's hardware data prefetching observed more high-end, data-intensive applications that access larger arrays data. Performance also benefits occupying processor instruction execution bandwidth required software prefetching instructions. optimization most effective when coupled with high-bandwidth system memory transfer capability, available processor platforms such those optimized support memory.
QuantiSpeedArchitecture: Exclusive Speculative Translation Look-aside Buffers (TLBs)
mobile Athlon XP-M processor features advanced, two-level Translation Look-aside Buffer (TLB) structures both instruction data address translation. mobile Athlon XP-M processor's Level (L1) Instruction (I-TLB) holds entries, Data (D-TLB) holds entries, I-TLB D-TLB each hold entries. reduce incidence entry conflicts, structures adopt exclusive architecture design. With exclusive architecture, TLBs contain entries that duplicated TLBs, enabling combination sizes larger total available entry space both instruction data TLBs. reducing number conflicts caused holding more entries within processor, performance increases high-end, data-intensive applications that encounter instruction sequences that longer have wait entries reloaded during execution. structures mobile Athlon XP-M processor also have ability enter data misses TLBs speculatively. mobile Athlon XP-M processor allows entries written speculatively before first instruction completed, while preserving proper instruction execution ordering which removes serialization effect results improved system performance.
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Mobile AthlonXP-M Processor
March 2003
Conclusion: Technology Performance Leadership Microprocessors
With these differentiating features mobile Athlon XP-M processor with QuantiSpeed architecture. 0.13-micron process technology-Provides further thermal headroom necessary scale frequency within thermal limits mobile platforms processors, thus maximizing overall processor performance PowerNow!technology-Industry's first dynamic powermanagement solution optimize notebook system battery life while delivering performance demand 512KB cache-Increases performance applications such high-end gaming digital media keeping more frequently accessed instructions data close CPU. QuantiSpeedarchitecture: Nine-issue, superscalar, fully pipelined microarchitecture- Provides wide executing bandwidth improve overall productivity Superscalar, fully pipelined FPU-Increasing performance floating point-intensive applications while offering 3DNow! Professional technology support Hardware data prefetch-Increasing performance high-end software applications using high-bandwidth system capability, especially with memory enhancements-Increasing performance high-end, dataintensive applications .AMD continues accelerate technology innovations while meeting computationally intensive requirements software applications including: applications-3D modeling, high-end gaming, etc. Multimedia/digital content creation applications-Photo video editing, video encoding decoding, image compression, soft DVD, encoding decoding, etc. High-end applications-Digital publishing, speech recognition, CAM, digital prototyping, etc.
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Mobile AthlonXP-M Processor
March 2003
With industry-leading performance across these number other applications, mobile Athlon XP-M processor with 512KB cache implemented 0.13-micron process technology, continues increase performance scalability provided QuantiSpeed architecture delivering higher clock speeds industry-leading processor performance. mobile Athlon XP-M processor with 512KB cache PowerNow! technology continues tradition Athlon processor family providing compelling levels delivered system performance today's tomorrow's applications well helping extend system battery life users
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Mobile AthlonXP-M Processor
March 2003
Overview
global supplier integrated circuits personal networked computer communications markets with manufacturing facilities United States, Europe, Japan, Asia. AMD, Fortune Standard Poor's company, produces microprocessors, Flash memory devices, support circuitry communications networking applications. Founded 1969 based Sunnyvale, California, revenues approximately $2.7 billion 2002. (NYSE: AMD).
2003 Advanced Micro Devices, Inc. rights reserved. AMD, Arrow logo, Athlon combinations thereof, 3DNow!, QuantiSpeed, PowerNow! trademarks AMD-K6 registered trademark Advanced Micro Devices, Inc. Microsoft Windows registered trademarks Microsoft Corporation United States and/or other jurisdictions. Pentium registered trademark trademark Intel Corporation United States and/or other jurisdictions. HyperTransport licensed trademark HyperTransport Technology Consortium. Other product names used this publication identification purposes only trademarks their respective companies.
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Mobile AthlonXP-M Processor
March 2003

Mobile AthlonXP-M Processor with 512KB Cache Technology Performan

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