µPD78P328 16/8-BIT SINGLE-CHIP MICROCONTROLLER PD78P328 prod

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µPD78P328 16/8-BIT SINGLE-CHIP MICROCONTROLLER PD78P328 prod

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Integrated Circuit
µPD78P328
16/8-BIT SINGLE-CHIP MICROCONTROLLER
PD78P328 product provided replacing PD75328's internal mask with one-time PROM EPROM. one-time PROM version programmable only once useful small-lot production many different products early development time-to-market application sets. EPROM version reprogrammable, suited evaluation systems. Functions described detail following user's manual. sure read before designing.
µPD78328 User's Manual: IEU-1268
FEATURES
µPD78328 compatible
mass-production, µPD78P328 replaced with µPD78328 incorporating mask Internal PROM: 16,384 bits Programmable once only (one-time PROM version without window) Erasable with ultraviolet rays electrically programmable (EPROM version with window)
PROM programming characteristics: µPD27C256A compatible µPD78P328 QTOPmicrocontroller.
Remark QTOP microcontroller general term microcontrollers which incorporates one-time PROM, totally supported NEC's programming service (from programming marking, screening, verification).
ORDERING INFORMATION
Part Number Package 64-pin plastic shrink (750 mils) 64-pin plastic 64-pin ceramic shrink (750 mils) (with window) Internal One-time PROM One-time PROM EPROM
µPD78P328CW µPD78P328GF-3BE µPD78P328DW
Functions common one-time PROM EPROM versions referred PROM functions throughout this document. information this document subject change without notice. Document U10209EJ4V0DS00 (4th edition) (Previous IC-2486) Date Published October 1995 Printed Japan
mark
shows revised points.
Corporation 1990
µPD78P328
CONFIGURATIONS
Normal operating mode 64-pin plastic shrink (750 mils)
µPD78P328CW
64-pin ceramic shrink (750 mils) (with window)
µPD78P328DW
P20/NM1 P21/INTP0 P22/INTP1 P30/TxD P31/RxD P32/SO/SB0 P33/SI/SB1 P34/SCK P80/TO0 P81/TO1 P82/TO2 P83/TO3 P84/TO4 P85/TO5 P86/TO6/INTP2 P87/TO7/PWM RESET P00/RTP0 P01/RTP1 P02/RTP2 P03/RTP3 P04/RTP4 P05/RTP5 P06/RTP6 P07/RTP7 P93/TMD P92/TAS
AVDD AVREF P77/ANI7 P76/ANI6 P75/ANI5 P74/ANI4 P73/ANI3 P72/ANI2 P71/ANI1 P70/ANI0 AVSS P57/A15 P56/A14 P55/A13 P54/A12 P53/A11 P52/A10 P51/A9 P50/A8 P47/AD7 P46/AD6 P45/AD5 P44/AD4 P43/AD3 P42/AD2 P41/AD1 P40/AD0 ASTB P90/RD P91/WR
Remark These pins compatible with µPD78328CW pins.
µPD78P328
64-pin plastic
µPD78P328GF-3BE
P32/SO/SB0 P22/INTP/TI P21/INTP0 P20/NMI AVDD
P33/SI/SB1 P34/SCK P80/TO0 P81/TO1 P82/TO2 P83TO3 P84/TO4 P85/TO5 P86/TO6/INTP2 P87/TO7/PWM RESET P00/RTP0 P01/RTP1 P02/RTP2 P03/RTP3 P04/RTP4
6362
AVREF P77/ANI7 P76/ANI6 P75/ANI5 P74/ANI4
P31/RxD P30/RxD
P73/ANI3 P72/ANI2 P71/ANI1 P70/ANI0 AVSS P57/A15 P56/A14 P55/A13 P54/A12 P53/A11 P52/A10 P51/A9 P50/A8 P47/AD7 P46/AD6 P45/AD5 P44/AD4 P43/AD3
P07/RTP7 P93/TMD P92/TAS P91/WR
P05/RTP5
P06/RTP6
P90/RD ASTB
Remark These pins compatible with µPD78328GF pins.
P40/AD0 P41/AD1 P42/AD2
µPD78P328
P00-P07 P20-P22 P30-P34 P40-P47 P50-P57 P70-P77 P80-P87 P90-P93 A8-A15 AD0-AD7 ANI0-ANI7 TO0-TO7 INTP0-INTP2 RTP0-RTP7 Port Port Port Port Port Port Port Port Address8-15 Address0-7/Data0-7 Analog Input0-7 Timer Output0-7 Nonmaskable Interrupt Pulse Wide Modulation Output Interrupt From Peripherals0-2 Real-Time Port0-7 Transmit Data Receive Data SB0-SB1 ASTB RESET AVDD AVREF AVSS Serial Input Serial Output Serial Bus0-1 Read Strobe Write Strobe Address Strobe External Access Reset Serial Clock Turbo Access Strobe Turbo Mode Crystal1, Analog Analog Reference Voltage Analog Power Supply Ground
µPD78P328
PROM programming mode (RESET AVDD 64-pin plastic shrink (750 mils)
µPD78P328CW
64-pin ceramic shrink (750 mils) (with window)
µPD78P328DW
(Open) RESET
AVDD
(Open)
Caution recommended connection unused pins PROM programming mode indicated parentheses. Connect each resistor. Connect VSS. Leave unconnected.
Open
µPD78P328
64-pin plastic
µPD78P328GF-3BE
AVDD
(Open) RESET
(Open)
Caution recommended connection unused pins PROM programming mode indicated parentheses. Connect each resistor. Connect VSS. Leave unconnected. Address0-14 Data0-7 Chip Enable Output Enable Reset AVDD Analog Power Supply Ground Programming Power Supply
Open A0-A14 D0-D7 RESET
µPD78P328
BLOCK DIAGRAM
Main (P20) INTP0-INTP2 (P21, P22, P86) Programmable Interrupt Controller
General Registers Data Memory
PROM/RAM
RESET
PROM Peripheral
(P80) (P81) (P82) (P83) (P84) (P85) (P86) (P87) TO7/PWM (P22) TI/INTP1
System Control Control Prefetch Control
ASTB (P90) (P91) (P92) (P93) A8-A15 (P50-P57) AD0-AD7 (P40-P47) A0-A14 D0-D7 Note
Timer/Counter Unit (Real-Time Pulse Unit)
Micro Sequence Control Micro
EA/VPP Note
(P34) (P32) SO/SB0 (P33) SI/SB1 (P30) (P31) Serial Interface (SBI) (UART)
Converter (10-bit)
AVREF AVSS AVDD INTP0 ANI0-ANI7 (P70-P77)
Ports
P00-P07 (Real-Time Port) P20-P22 P30-P34 P40-P47 P50-P57 P70-P77 P80-P87
P90-P93
Note During PROM programming mode
µPD78P328
CONTENTS
FUNCTIONS Normal Operating Mode PROM Programming Mode (RESET AVDD Input/Output Circuits Recommended Connection Unused Pins DIFFERENCES BETWEEN µPD78P328 µPD78328 PROM PROGRAMMING Operation Mode PROM Write Procedure PROM Read Procedure ERASURE CHARACTERISTICS (EPROM VERSION ONLY) WINDOW SEAL (EPROM VERSION ONLY) ONE-TIME PROM VERSION SCREENING ELECTRICAL SPECIFICATIONS PACKAGE DRAWINGS RECOMMENDED SOLDERING CONDITIONS DRAWINGS CONVERSION SOCKET RECOMMENDED FOOTPRINT.
APPENDIX
APPENDIX TOOLS Development Tools Evaluation Tools Embedded Software
µPD78P328
FUNCTIONS
Normal Operating Mode Port Pins
Name Input/Output Function Alternate Function P00-P07 Input/Output PORT0 4-/8-bit input/output port Input output mode specified bit-wise. port also operate real-time output port. P40-P47 Input/Output PORT 8-bit input/output port Input output mode specified 8-bit units. P50-P57 Input/Output PORT 8-bit input/output port Input output mode specified bit-wise. P70-P77 Input PORT 8-bit input-only port Input/Output PORT 4-bit input/output port Input output mode specified bit-wise. Input/Output PORT 8-bit input/output port Input output mode specified bit-wise. TO6/INTP2 TO7/PWM ANI0-ANI7 A8-A15 Input/Output PORT 5-bit input/output port Input output mode specified bit-wise. Input PORT 3-bit input-only port INTP0 INTP1/TI SO/SB0 SI/SB1 AD0-AD7 RTP0-RTP7
µPD78P328
Non-Port Pins (1/2)
Name Input/Output Function Alternate Function
RTP0-RTP7 Output
Real-time output port which outputs pulse synchronization with trigger signal from P00-P07 real-time pulse unit (RPU).
Input
Edge-detected nonmaskable interrupt request input. rising falling edge selected valid edge setting mode register.
INTP0 INTP1 INTP2 AD0-AD7 A8-A15
Input
Edge-detected external interrupt request input. valid edge specified mode register.
P22/T1 P86/TO6
Input Input Output Output Input Input/Output
External count clock input timer (TM1). Serial data input asynchronous serial interface (UART). Serial data output from asynchronous serial interface (UART). Serial data output from clocked serial interface 3-wire mode. Serial data input clocked serial interface 3-wire mode. Serial data input/output pins to/from clocked serial interface mode.
S22/INTP1 P32/SB0 P33/SB1 P32/SO P33/SI
Input/Output Input/Output Output Output
Serial clock input/output to/from clocked serial interface. Multiplexed address/data used when external memory added. Address used when external memory added. Pulse output from real-time pulse unit.
P40-P47 P50-P57 P86/INTP2 P87/PWM
Output Output
signal output from real-time pulse unit. Strobe signal output external memory read operation. Strobe signal output external memory write operation. Control signal output pins access turbo access manager (µPD71P301). Note
P87/TO7
ASTB Output
Timing signal output externally latch address information output port external memory access. µPD78P328, normally connect VDD. When connected VSS, µPD78P328 enters ROMless mode external memory accessed. level cannot changed during operation.
Input
Note Turbo access manager (µPD71P301) available maintenance purposes only.
µPD78P328
Non-Port Pins (2/2)
Function Alternate Function
ANI0-ANI7
Name Input/Output
Input Input Input Input
Analog input converter. converter reference voltage input. converter analog power supply. converter GND. System reset input. Crystal connection system clock generation. supply external clock, input input reverse signal unconnected.) Positive power supply pin. pin.
P70-P77
AVREF AVDD AVSS RESET
PROM Programming Mode (RESET AVDD
Name Input/Output AVDD RESET A0-A14 D0-D7 Input Input Address bus. Data bus. PROM enable PROM. Read strobe PROM. Write power supply. Positive power supply. GND. Input Function PROM programming mode setting.
µPD78P328
Input/Output Circuits Recommended Connection Unused Pins Table Figure show input/output circuit schematically.
Table 1-1. Input/Output Circuits Recommended Connection Unused Pins
Input/Output circuit type P00P07/RTP0-RTP7 Input state: Independently connect resistor. Output state: Leave Open. P21/NMI P21/INTP0 P27/INTP6/TI P30/TxD P31/RxD P32/SO/SB0 P33/SI/SB1 P34/SCK P40/AD0-P47/AD0-AD7 P50/P57/A8-A15 P70-P77/ANI0-ANI7 P80-P85/TO0-TO5 P86/TO6/INTP2 P87/TO7/PWM P90/RD P91/WR P92/TAS P93/TMD ASTB RESET AVREF, AVSS Leave Open. Connect VSS. Connect VDD. Connect VSS. Input state: Independently connect resistor. Output state: Leave Open. Input state: Independently connect resistor. Output state: Leave Open. Connect VSS. Recommended connection unused pins
µPD78P328
Figure 1-1. Input/Output Circuits
TYPE TYPE
data P-ch output disable data data input enable control signal control input enable TYPE TYPE
P-ch IN/OUT N-ch
N-ch
data output disable P-ch N-ch IN/OUT
Schmitt-triggerred input with hysteresis characteristics
TYPE
TYPE
data P-ch
P-ch N-ch
Comparator VREF
output disable
N-ch
(Threshold voltage) input enable
Push-pull output that placed high impedance (both P-ch N-ch off).
TYPE data output disable P-ch N-ch IN/OUT
input disable
µPD78P328
DIFFERENCES BETWEEN µPD78P328 µPD78328
µPD78P328 product provided replacing µPD78328's on-chip mask with one-time PROM EPROM. Thus, µPD78P328 µPD78328 same function except specifications such write verify. Table lists differences between these products. This Data Sheet describes PROM specification function. Refer µPD78328 documents details other functions.
Table 2-1. Differences between µPD78P328 µPD78328
Item Internal program memory (electrical program) PROM programming Package
µPD78P328
One-time PROM (programmable only once) Contained 64-pin plastic shrink 64-pin plastic 64-pin ceramic shrink (with window) EPROM (reprogrammable)
µPD78328
Mask (nonprogrammable) contained 64-pin plastic shrink 64-pin plastic
Electrical specifications Others
Current dissipations different. Noise immunity noise radiation differ because circuit complexity mask layout different.
Caution noise immunity noise radiation differ between PROM mask versions. replace PROM version with mask version when shifting from experimental production mass production, evaluate your system using version (not version) mask version.
µPD78P328
PROM PROGRAMMING
PROM incorporated µPD78P328 16,384 8-bit electrically writable PROM. programming, PROM programming mode using RESET AVDD pins. programming characteristics compatible with µPD27C256A programming characteristics.
Table 3-1. Function Programming Mode
Function Address input Data input Chip enable/program pulse Output enable Program voltage Mode control Normal Operating Mode P00-P07, P80, P20, P81-P85 P40-P47 RESET, AVDD Programming Mode A0-A14 D0-D7
Operation Mode program write/verify mode, RESET AVDD mode, operation mode selected setting pins, listed Table 3-2. read PROM contents, read mode. Connect unused pins exactly indicated Configuration.
Table 3-2. PROM Programming Operation Mode
Mode Program write Program verify Program inhibit Read Output disable Standby RESET AVDD +12.5 D0-D7 Data input Data output High impedance Data output High impedance High impedance
Caution When +12.5 +6V, setting both inhibited.
µPD78P328
PROM Write Procedure write procedure into PROM follows: (See also Figure 3-2). RESET AVDD Connect other unused pins exactly indicated section "Pin Configuration." Supply +12.5 pin. Supply initial address. Supply write data. Supply program pulse (active low) pin. Execute verify mode. Check whether write data written normally. When written normally: Proceed step (8). When written normally: Repeat steps (6). data written normally after repetitions steps, proceed step (7). Assume device defective. Stop write operation. Supply write data (number steps repetitions) program pulses (additional write). Increment address. (10) Repeat steps last address. Figure shows PROM Write/Verify Timing Steps above.
Figure 3-1. PROM Write/Verify Timing
X-time repetition Write Verify Additional data write
A0-A14
Address input
Hi-Z D0-D7 Data input
Data output
Hi-Z Data input
Hi-Z
+12.5
(input)
(input)
µPD78P328
Figure 3-2. Write Procedure Flowchart
WRITE START
Supply power
Supply initial address
Supply write data
Write (after repetition less)
Supply program pulse
Verify mode Write
Write 25th repetition)
Make additional write pulses)
Number write repetitions
Increment address
(10) address address Defective device
address WRITE
µPD78P328
PROM Read Procedure read procedure PROM contents into external data (D0-D7) follows. RESET AVDD Connect other unused pins exactly indicated Configuration. Supply pins. Input address data read A0-A14 pins. Execute read mode. data output D0-D7 pins. Figure shows PROM read timing steps above.
Figure 3-3. PROM Read Timing
A0-A14
Address input
(input)
(input)
D0-D7
Hi-Z
Data output
Hi-Z
µPD78P328
ERASURE CHARACTERISTICS (EPROM VERSION ONLY)
data written into µPD78P328DW program memory erased (FFH) data rewritten into memory. erase data, apply light with wave length shorter than window. Normally, apply ultraviolet rays having 254-nm wave length. radiation amount required completely erase data follows: Ultraviolet strength erasure time: more Erasure time: minutes when 12,000 µW/cm2 ultraviolet lamp used. However, time prolonged ultraviolet lamp performance deterioration, dirty window, etc. erasure, place ultraviolet lamp position within from window. filter attached ultraviolet lamp, remove filter before applying ultraviolet rays.
WINDOW SEAL (EPROM VERSION ONLY)
µPD78P328DW window exposed sunlight fluorescent lamp light hours, EPROM data
erased internal circuit operate erroneously. prevent such accidents from occurring, protective seal window. protective seal whose quality guaranteed attached every EPROM version with window shipment.
ONE-TIME PROM VERSION SCREENING
one-time PROM versions (µPD78P328CW, 78P328GF-3BE) cannot completely tested
shipment because their structure. screening, recommended verify PROM after storing necessary data under following conditions: provides chargeable services ranging from one-time PROM writing marking, screening, verification QTOP microcontroller products. details, contact sales representative.
Storage temperature 125°C
Storage time hours
µPD78P328
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
Parameter Power supply voltage Symbol AVSS Input voltage Output voltage Output current, output pins Total pins Output current, high output pins Total pins Analog input voltage VIAN Note AVDD AVDD converter reference input voltage Operating ambient temperature Storage temperature Tstg AVREF AVDD AVDD Note P20/NIM (A9) Test Conditions Ratings -0.5 +7.0 -0.5 +0.5 -0.5 +13.5 -0.5 +0.5 -0.5 +0.5 -0.5 +13.5 -0.5 +0.5 -1.0 -0.5 +0.5 -0.5 AVDD +0.5 -0.5 +0.3 -0.5 AVDD +0.3 +150 Unit
Notes Pins except P20/NMI (A9), P70/ANI0-P77/ANI7 P70/ANI0-P77/ANI7
Caution Product quality suffer absolute maximum rating exceeded even single parameter, even momentarily. other words, absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions which ensure that absolute maximum ratings exceeded.
Recommended Operation Conditions
Oscillation frequency +5.0
Capacitance
Parameter Input capacitance Output capacitance capacitance Symbol Test Conditions Unmeasured pins returned MIN. TYP. MAX. Unit
µPD78P328
Oscillator Characteristics V±5%,
Resonator Ceramic crystal resonator Recommended Circuit Parameter Oscillation frequency (fXX) MIN. MAX. Unit
External clock
input frequency (fX)
HCMOS Inverter Open HCMOS Inverter
input rise, fall time (fXR, tXF)
input high, level width (tWXH, tWXL)
Caution When using system clock oscillator, wire portion enclosed dotted line figure follows avoid adverse influences wiring capacitance: Keep wiring length short possible. cross wiring over other signal lines. route wiring vicinity lines through which high fluctuating current flows. Always keep ground point capacitor oscillator circuit same potential VSS. connect power source pattern through which high current flows. extract signals from oscillation circuit.
Recommended Oscillator Constants
Ceramic resonator
Manufacturer Name Part Number Frequency [MHz] Recommended Constants [pF] MURATA CSA8.00MT CSA12.0MT CSA16.00MX040 CST8.00MTW CST12.00MTW CST16.00MXW0C3 12.0 16.0 12.0 16.0 Internal Internal [pF]
µPD78P328
Characteristics ±5%,
Parameter Input voltage, Input voltage, high Symbol VIH1 VIH2 Output voltage, Output voltage, high Input leakage current Output leakage current power supply current IDD1 IDD2 Data retention voltage Data retention current VDDDR IDDDR Note Note -400 Operation mode HALT mode STOP mode STOP mode VDDDR VDDDR VDD-1.0 Test Conditions MIN. 0.8VDD 0.45 TYP. MAX. Unit
Notes Pins except RESET, P20/NMI, P21/INTP0, P22/INTP1/TI, P86/INTP2/TO0, P32/SO/SB0, P33/SI/SB1, P34/SCK. RESET, P20/NMI, P21/INTP0, P22/INTP1/TI, P86/INTP2/TO0, P32/SO/SB0, P33/SI/SB1, P34/SCK pins.
µPD78P328
Characteristics ±5%,
Discontinuous read/write operation (when general-purpose memory connected)
Parameter System clock cycle time Address setup time ASTB Address hold time (from ASTB Address delay time address float time Address data input time data input time ASTB delay time Data hold time (from address active time low-level width ASTB high-level width Address delay time ASTB data output time data output time ASTB delay time Data setup time Data hold time (from ASTB delay time low-level width Symbol tCYK tSAST tHSTA tDAR tFRA tDAID tDRID tDSTR tHRID tDRA tWRL tWSTH tDAW tDSTOD tDWOD tDSTW tSODW tHWOD tDWST tWWL Test Conditions MIN. MAX. Unit
µPD78P328
tCYK-Dependent Timings
Parameter tSAST tHSTA tDAR tDAID tDRID tDSTR tDRA tWRL tWSTH tDAW tDSTOD tDSTW tSODW tHWOD tDWST tWWL Calculation expression 0.5T 0.5T (2.5 (1.5 0.5T 0.5T (1.5 0.5T 0.5T 0.5T 1.5T 0.5T 0.5T (1.5 MIN./MAX. MIN. MIN. MIN. MAX. MAX. MIN. MIN. MIN. MIN. MIN. MAX. MIN. MIN. MIN. MIN. MIN. Unit
Remarks tCYK 1/fCLK (fCLK internal system clock frequency provided dividing two). number wait cycles defined user software. Only parameters listed table dependent tCYK.
µPD78P328
Serial Operation ±5%,
Parameter Serial clock cycle time Symbol tCYSK Test Conditions Input Output External clock Internal divide Internal divide Serial clock high-level width tWSKL Input Output External clock Internal divide Internal divide Serial clock high-level width tWSKH Input Output External clock Internal divide Internal divide setup time hold time (from SO/SB0, SI/SB1 output delay time (from tDSBSK2 tSRXSK tHSKRX tDSBSK1 CMOS push-pull output (3-wire serial mode) Open drain output (SBI mode), SB0, high hold time (from tHSBSK SB0, setup time (from tSSBSK SB0, low-level width SB0, high-level width tWSBL tWBSH mode 4T-20 4T-20 tCYK tCYK MIN. 4T-80 16T-100 4T-80 16T-100 MAX. Unit
tCYK tCYK
Remark tCYK 1/fCLK (fCLK internal system clock frequency provided dividing two.)
µPD78P328
Other operations +70°C, V±5%,
Parameter high-, low-level widths Symbol tWNIH, tWNIL INTP0 high-, low-level widths tWIOH, tWIOL INTP1 high-, low-level widths tWI1H, tWI1L INTP2 high-, low-level widths tWI2H, tWI2L RESET high-, low-level widths tWRSH, tWRSL high-, low-level widths tWTIH, tWTIL event counter mode tCYK tCYK tCYK tCYK Test Conditions MIN. MAX. Unit
Remark
tCYK 1/fCLK (fCLK internal system clock frequency provided dividing two.)
External clock timing +70°C, V±5%,
Parameter input high-, low-level widths Symbol tWXH tWXL input rise, fall times tXR, input cycle time tCYK Test Conditions MIN. MAX. Unit
µPD78P328
Converter +70°C, V±5%, AVSS -0.5 AVDD VDD)
Parameter Resolution Total error
Note1
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
AVREF AVDD AVREF AVDD
±0.4 ±0.7 ±1/2
%FSR %FSR tCYK tCYK
Quantification error Conversion time Sampling time Zero scale error
Note1
tCONV tSAMP AVREF AVDD AVREF AVDD
+1.5 +1.5 +1.5 +1.5 +1.5 +1.5 -0.3 STOP mode AVDDDR AVDDDR V±5% ±2.5 ±4.5 ±2.5 ±4.5 ±2.5 ±4.5 AVDD AVDD
Fullscale error
Note1
AVREF AVDD AVREF AVDD
Nonlinear error
Note1
AVREF AVDD AVREF AVDD
Analog input voltage Basic voltage AVREF current AVDD supply current converter data retention current
Note2
AVREF AIDD DDDR
Notes Quantization error excluded. When -0.3 VIAN conversion result 000H. When VIAN AVREF, conversion executed 10-bit resolution. When AVREF AVDD, conversion result FFH.
Standby flag retention characteristics -10°C 70°C)
Parameter Standby flag retention power supply voltage rising, falling time Symbol VDDDR tRVD, tFVD Test Conditions MIN. MAX. Unit
Timing Test Points
0.45 Test Points
µPD78P328
Timing Wave Forms
Discontinuous Read Operation
tCYK (CLK)
P50-P57 (output) tSAST P40-P47 (input/output) tDAID
High-order address
High-order address
Low-order address (output)
Hi-Z
Data (input) tHRID
Hi-Z
Low-order address (output)
Hi-Z
tWSTH P50-P57 (output) tHSTA tFRA (output) tDSTR tDAR tDRID tWRA
tDRA
Discontinuous Write Operation
(CLK)
P50-P57 (output) tSAST P40-P47 (input/output)
Low-order address (output)
High-order address
High-order address
Data (output) tHWOD
Low-order address (output)
tWSTH ASTB (output)
tHSTA tDSTOD
tDSTA
(output) tDSTW tDWOD tDAW tWWL tSODW
µPD78P328
Serial Operation Three-Wire Serial Mode:
tWSKL tCYSK
tWSKH
tSRXSK tHSKRX
Input data
tDSBSKI Output data
Mode Release Signal Transfer
tHSBSK tWSBL tWSBH tSSBSK
Command Signal Transfer
tWSKL tWSKH
tHSBSK tSSBSK tCYSK
tDSBSK2 tSSSK
tHSSK data
µPD78P328
Interrupt Input Timing
tWNIH tWNIL
tWIOH
tWIOL
INTP0
tWI1H
tWI1L
INTP1
tWI2H
tWI2L
INTP2
Reset Input Timing
tWRSH tWRSL
RESET
µPD78P328
External Clock Timing
tWXH
tWXL tCYX
Standby Flag Retention Timing
tFVD
VDDDR tRVD
Input Timing
tWTIH tWTIL
µPD78P328
Programming Characteristics
Parameter Symbol Symbol Test conditions
Note1
MIN.
TYP.
MAX.
Unit
Input voltage, high
VDDP +0.3
Input voltage, Input leakage current Output voltage, high Output voltage, Input current Output leakage current PROG high voltage input current VDDP power supply voltage
ILIP
VDDP (P20/NMI) VDDP,
Note
-0.3 -400
0.45
VDDP
Program memory write mode Program memory read mode
5.75 12.2
12.5
6.25 12.8
power supply voltage
Program memory write mode Program memory read mode
VDDP
VDDP power supply current
Program memory write mode Program memory read mode VIL,
power supply current
Program memory write mode VIL, Program memory read mode
Notes Corresponding µPD27C256A symbols. VDDP during programming mode.
µPD78P328
Programming Characteristics
Parameter Address setup time Data delay time Input data setup time Address hold time (from
Input data hold time (from Output data hold time (from
Symbol Symbol Test conditions
Note
MIN.
TYP.
MAX.
Unit
tSAC tDDOO tSIDC tHCA tHCID tHOOD tSVPC tSVDC tWL1 tWL2 tDAOD tDOOD tHCOD tHAOD
tOES tVPS tVDS tOPW tACC
0.95 2.85 1.05 78.75
setup time setup time Initial program pulse width Additional program pulse width Address data output time data output time Data hold time (from Data hold time (from address)
Note
Corresponding µPD27C256A symbols.
µPD78P328
PROM Write Mode Timing
A12-A0 tSAC D7-D0 Data input tSIDC VDDP VDDP VDDP tSVDC tWL1
tDDOO
Effective address tHOOD Data output tHCID Data onput tSIDC tHCID tHCA
tSVPC
VDDP
tDOOD
tWL2
Cautions Apply VDDP before remove after VPP. must exceed including overshoot.
PROM Read Mode Timing
A12-A0 Effective address
tDAOD D7-D0 Hi-Z tDOOD
tHCOD
tHAOD Data output Hi-Z
µPD78P328
PACKAGE DRAWINGS
PLASTIC SHRINK (750 mil)
NOTE Each lead centerline located within 0.17 (0.007 inch) true position (T.P.) maximum material condition. Item center leads when formed parallel.
ITEM
MILLIMETERS 58.68 MAX. 1.78 MAX. 1.778 (T.P.) 0.50±0.10 MIN. 3.2±0.3 0.51 MIN. 4.31 MAX. 5.08 MAX. 19.05 (T.P.) 17.0 0.25 +0.10 -0.05 0.17 0~15°
INCHES 2.311 MAX. 0.070 MAX. 0.070 (T.P.) 0.020 +0.004 -0.005 0.035 MIN. 0.126±0.012 0.020 MIN. 0.170 MAX. 0.200 MAX. 0.750 (T.P.) 0.669 0.010 +0.004 -0.003 0.007 0~15° P64C-70-750A,C-1
µPD78P328
µPD78P328
PLASTIC
detail lead
NOTE Each lead centerline located within 0.20 (0.008 inch) true position (T.P.) maximum material condition.
ITEM
MILLIMETERS 23.6±0.4 20.0±0.2 14.0±0.2 17.6±0.4 0.40±0.10 0.20 (T.P.) 1.8±0.2 0.8±0.2 0.15 +0.10 -0.05
INCHES 0.929±0.016 0.795 +0.008 -0.009 0.551+0.009 -0.008 0.693±0.016 0.039 0.039 0.016 +0.004 -0.005 0.008 0.039 (T.P) 0.071 +0.008 -0.009 0.031 +0.009 -0.008 0.006 +0.004 -0.003
0.10 0.004 0.106 0.1±0.1 0.004±0.004 5°±5° 5°±5° MAX. 0.119 MAX. P64GF-100-3B8,3BE,3BR-2
µPD78P328
RECOMMENDED SOLDERING CONDITIONS
recommended that this device soldered under following conditions. details recommended soldering conditions, refer information document "Semiconductor Devices Mounting Technology Manual" (IEI-1207). soldering methods conditions other than those recommended, please contact your sales representative.
Table 9-1. Soldering Conditions Surface Mount Devices
µPD78P328GF-3BE: 64-pin plastic
Soldering Method Infrared reflow Soldering Conditions Package peak temperature: 235°C, Time: seconds max. (210°C min.), Number times: max, Maximum number days: daysNote (thereafter, hours prebaking required 125°C) Cautions Wait device temperature return normal after first reflow before starting second reflow. perform flux cleaning with water after first reflow. Package peak temperature: 215°C, Time: seconds max. (200°C min.), Number times: max, Maximum number days: daysNote (thereafter, hours prebaking required 125°C) Cautions Wait device temperature return normal after first reflow before starting second reflow. perform flux cleaning with water after first reflow. Soldering bath temperature: 260°C max., Time: seconds max., Number times: Preheating temperature: 120°C max. (package surface temperature), Maximum number days: daysNote (thereafter, hours prebaking required 125°C). temperature: 300°C max., Time: seconds max. (per row) Recommended Soldering Code IR35-207-2
VP15-207-2
Wave soldering
WS60-207-1
Partial heating
Note Number days after unpacking pack. Storage conditions 25°C max. Caution different soldering methods together (except partial heating method).
Table 9-2. Soldering Conditions Through-hole Devices
µPD78P328CW: 64-pin Plastic Shrink (750 mils) µPD78P328DW: 64-pin Ceramic Shrink (750 mils) (with window)
Soldering Method Wave soldering (pin only) Partial heating Soldering Conditions Soldering bath temperature: 260°C max., Time: seconds max. temperature: 300°C max., Time: seconds max. (per pin)
Caution Apply wave soldering only pins careful bring solder into direct contact with package.
µPD78P328
APPENDIX DRAWINGS CONVERSION SOCKET RECOMMENDED FOOTPRINT
emulation probe (EP-78327GF-R) µPD78P328GF-3BE connected with target system combination with conversion socket (EV-9200G-64). drawings socket recommended footprint shown below.
Figure A-1. Drawing Conversion Socket (EV-9200G-64) (for reference only)
EV-9200G-64-G0 INCHES 0.984 0.799 0.157 0.569 0.748 0.11 0.031 0.433 0.866 0.972 0.197 0.638 0.744 0.315 0.307 0.098 0.079 0.053 0.014+0.004 -0.005
EV-9200G-64 No.1 index
ITEM
MILLIMETERS 25.0 20.30 14.45 19.0 11.0 22.0 24.7 16.2 18.9 1.35 0.35
0.091 0.059
µPD78P328
Figure A-2. Recommended Footprint EV-9200G-64 (for reference only)
EV-9200G-64-P0 INCHES 1.012 0.827 0.039+0.002 -0.001 0.709=0.709+0.002 -0.003 0.598 0.783 0.433+0.004 -0.003 0.217+0.001 -0.002 0.197+0.003 -0.004 0.098+0.002 -0.001 0.024+0.001 -0.002
ITEM Caution
MILLIMETERS 25.7 21.0 1.0±0.02 18=18.0±0.05
1.0±0.02 12=12.0±0.05 0.039+0.002 0.472=0.472+0.003 -0.001 -0.002 15.2 19.9 11.00 0.08 5.50 0.03 5.00 0.08 2.50 0.03 0.02
2.36 0.03 1.57 0.03
0.093+0.001 -0.002 0.062+0.001 -0.002
Dimensions mount EV-9200 that target device (QFP) different some parts. recommended mount dimensions QFP, refer "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL" (IEI-1207).
µPD78P328
APPENDIX TOOLS
Development Tools following development tools readily available support development systems using µPD78P328: Language Processor
78K/III Series relocatable assembler (RA78K/III) Relocatable assembler common 78K/III series. Since contains macro function, development efficiency improved. structured assembler which enables explicity describe program control structure also attached program productivity maintenance improved. Host machine PC-9800 series MS-DOS
Ordering code Supply medium 3.5-inch 5-inch (product name)
µS5A13RA78K3 µS5A10RA78K3 µS7B13RA78K3 µS7B10RA78K3 µS3P16RA78K3 µS3K15RA78K3 µS3R15RA78K3
PC/AT
3.5-inch 5-inch
compatible machine HP9000 series 700SPARCstationNEWS 78K/III Series compiler (CC78K/III)
HP-UXSunOSNEWS-OS
Cartridge tape (QIC-24)
compiler common 78K/III series. This program convert program written language into object code executable with microcontroller. When using compiler, 78K/III series relocatable assembler(RA78K/III) necessary. Host machine PC-9800 series MS-DOS Supply medium 3.5-inch 5-inch PC/AT
Ordering code (product name)
µS5A13CC78K3 µS5A10CC78K3 µS7B13CC78K3 µS7B10CC78K3 µS3P16CC78K3 µS3K15CC78K3 µS3R15CC78K3
3.5-inch 5-inch
compatible machine HP9000 series SPARCstation NEWS HP-UX SunOS NEWS-OS
Cartridge tape (QIC-24)
Remark operation relocatable assembler compiler guaranteed only host machine under operating systems listed above.
µPD78P328
PROM Write Tools
Hardware PG-1500 PG-1500 PROM programmer which enables program single chip microcontrollers containing PROM stand-alone host machine operation connecting attached board optional programmer adapter PG-1500. also enables program typical PROM devices 256K bits bits. UNISITE 2900 PA-78P328CW PA-78P328GF PROM programmer adapters write programs onto µPD78P328 general purpose PROM programmer such PG-1500. PA-78P328CW µPD78P328CW 78P328DW PA-78P328GF µPD78P328GF Software PG-1500 controller Connects PG-1500 host machine serial parallel interface controlls PG-1500 host machine. Host machine PC-9800 series MS-DOS Supply medium 3.5-inch 5-inch PC/AT compatible machine 3.5-inch 5-inch Ordering code (product name) PROM programmer manufactured Data Japan.
µS5A13PG1500 µS5A10PG1500 µS7B13PG1500 µS7B10PG1500
Remark operation PG-1500 controller guaranteed only host machine under operating systems listed above. Debugging Tools
Hardware EP-78327CW-R EP-78327GF-R IE-78327-R IE-78327-R in-circuit emulator that used application system development debugging. Emulation probe 64-pin plastic shrink connect IE-78327-R target system. Emulation probe 94-pin plastic connect IE-78327-R target system.
EV-9200G-64 conversion socket EV-9200G-64 used connection target system attached. Software IE-78327-R control program controller) Program control IE-78327-R host machine. Automatic execution commands, etc., enabled more efficient debugging. Host machine PC-9800 series MS-DOS Supply medium 3.5-inch 5-inch PC/AT compatible machine 3.5-inch 5-inch Ordering code (product name)
µS5A13IE78327 µS5A10IE78327 µS7B13IE78327 µS7B10IE78327
Remark operation controller guaranteed only host machine under operating systems listed above.
µPD78P328
Development Tool Configuration
Host machine PC-9800 series PC/AT
RS-232C
Emulation probe
Software
IE-78327-R In-circuit emulator
RS-232C PROM programmer
PG-1500 controller Relocatable controller assembler (with structure assembler)
EP-78327GF-R EP-78327GF-R Socket connect emulation probe target systemNote
On-chip PROM version
PG-1500 EV-9200G-64 SDIP socket
µPD78P328GF µPD78P328CW µPD78P328DW
Programmer adapter
Target system
PA-78P328GF PA-78P328CW
Note socket attached emulation probe. Remarks host machine PG-1500 connected directly RS-232-C. Supply media software represented 3.5-inch floppy disks figure above.
µPD78P328
Evaluation Tools following evaluation tools provided evaluate µPD78P328 function:
Ordering Code (product name) EB-78327-98 PC-9800 series µPD78P328 function easily evaluated connecting evaluation tool host machine. EB-78327-98/PC command system basically compliant with EB-78327-PC PC/AT compatible machine IE-78327-R command system. Thus, easy transition application system development process IE-78327-R made. evaluation tools enable turbo access manager (µPD71P301)Note mounted printed circuit board. Host Machine Function
Note Turbo access manager (µPD71P301) available maintenance purpose only. Cautions EB-78327-98/PC µPD78P328 application system development tool. EB-78327-98/PC does contain emulation function internal PROM execution
µPD78P328.
Embedded Software following embedded software products readily available support more efficient program development maintenance: Real-time
Real-time (RX78K/III) purpose RX78K/III realize multi-task environment control area which requires real-time processing. RX78K/III allocates idle times other processing improve overall performance system. RX78K/III provides system call based µITRON specification. RX78K/III assembler package provides RX78K/III nucleus tool (configurator) prepare multiple information tables. Host machine PC-9800 series MS-DOS Supply medium 3.5-inch 5-inch PC/AT compatible machine 3.5-inch 5-inch Ordering code (product name)
µS5A13RX78320 µS5A10RX78320 µS7B13RX78320 µS7B10RX78320
Caution When purchasing RX78K/III, fill purchase application form advance, sign User's Agreement. Remark When using RX78K/III Real-time RA78K/III assembler package (option) necessary.
µPD78P328
Fuzzy Inference Development Support System
Fuzzy knowledge Data Preparation Tool (FE9000, FE9200) Host machine PC-9800 series MS-DOS Supply medium 3.5-inch 5-inch PC/AT compatible machine Translator (FT78K3)Note Windows3.5-inch 5-inch Ordering code (product name) Program supporting input fuzzy knowledge data (fuzzy rule membership function), input/editing (edit), evaluation (simulation).
µS5A13FE9000 µS5A10FE9000 µS7B13FE9200 µS7B10FE9200
Program converting fuzzy knowledge data obtained using fuzzy knowledge data preparation tool assembler source program RA78K/III. Host machine PC-9800 series MS-DOS Supply medium 3.5-inch 5-inch PC/AT compatible machine 3.5-inch 5-inch Ordering code (product name)
µS5A13FT78K3 µS5A10FT78K3 µS7B13FT78K3 µS7B10FT78K3
Fuzzy Inference Module (FI78K/III)Note
Program executing fuzzy inference. Fuzzy inference executed linking fuzzy knowledge data converted translator. Host machine PC-9800 series MS-DOS Supply medium 3.5-inch 5-inch PC/AT compatible machine 3.5-inch 5-inch Ordering code (product name)
µS5A13FI78K3 µS5A10FI78K3 µS7B13FI78K3 µS7B10FI78K3
Fuzzy Inference Debugger (FD78K/III)
Support software evaluating adjusting fuzzy knowledge data hardware level using in-circuit emulator. Host machine PC-9800 series MS-DOS Supply medium 3.5-inch 5-inch PC/AT compatible machine 3.5-inch 5-inch Ordering code (product name)
µS5A13FD78K3 µS5A10FD78K3 µS7B13FD78K3 µS7B10FD78K3
Note Under development
CHAPTER
FUNCTIONS
[MEMO]
µPD78P328
NOTES CMOS DEVICES PRECAUTION AGAINST SEMICONDUCTORS
Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices
HANDLING UNUSED INPUT PINS CMOS
Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices.
STATUS BEFORE INITIALIZATION DEVICES
Note: Power-on does necessarily define initial status device. Production
process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
QTOP trademark Corporation. MS-DOS Windows trademarks Microsoft Corporation. PC/AT trademarks Corporation. HP9000 series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. SunOS trademark Microsystems, Inc. NEWS NEWS-OS trademarks Sony Corporation. TRON abbreviation Realtime Operating system Nucleus. ITRON abbreviation Industrial TRON.
µPD78P328
export these products from Japan regulated Japanese government. export some these products prohibited without governmental license. export re-export some these products from country other than Japan also prohibited without license from that country. Please call sales representative. License needed: µPD78P328DW customer must judge need license: µPD78P328CW, 78P328GF-3BE
part this document copied reproduced form means without prior written consent Corporation. Corporation assumes responsibility errors which appear this document. Corporation does assume liability infringement patents, copyrights other intellectual property rights third parties arising from device described herein other liability arising from such device. license, either express, implied otherwise, granted under patents, copyrights other intellectual property rights Corporation others. While Corporation been making continuous effort enhance reliability semiconductor devices, possibility defects cannot eliminated entirely. minimize risks damage injury persons property arising from defect semiconductor device, customer must incorporate sufficient safety measures design, such redundancy, fire-containment, anti-failure features. devices classified into following three quality grades: "Standard", "Special", "Specific". Specific quality grade applies only devices developed based customer designated "quality assurance program" specific application. recommended applications device depend quality grade, indicated below. Customers must check quality grade each device before using particular application. Standard: Computer, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade devices "Standard" unless otherwise specified NEC's Data Sheets Data Books. customers intend devices applications other than those specified Standard quality grade, they should contact Sales Representative advance. Anti-radioactive design implemented this product.
94.11

µPD78P328 16/8-BIT SINGLE-CHIP MICROCONTROLLER PD78P328 prod

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