µPD78C14(A) 8-BIT SINGLE-CHIP MICROCONTROLLER (WITH CONVERTER)

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µPD78C14(A) 8-BIT SINGLE-CHIP MICROCONTROLLER (WITH CONVERTER)

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INTEGRATED CIRCUIT
µPD78C14(A)
8-BIT SINGLE-CHIP MICROCONTROLLER (WITH CONVERTER)
µPD78C14(A) single-chip, CMOS 8-bit microcontroller which 16-bit ALU, ROM, RAM, converter, multifunction timer/event counter, serial interface integrated. Moreover, 48-Kbyte external expansion memory (ROM/RAM) connected. Since µPD78C14(A) uses CMOS construction, operations performed with power consumption. using standby function, functions such data retention performed with lower power consumption. details functions, refer User's Manual listed below. Please read before starting design work. 87AD series µPD78C18 User's Manual: IEU-1314
FEATURES
High reliability compared with µPD78C14 instructions: 87AD instruction Multiply divide instructions, 16-bit arithmetic operation instructions Instruction cycle: Internal ROM: 16384 Internal RAM: Direct addressing external memory (ROM/RAM) Kbytes Highly accurate 8-bit converter: Eight analog inputs General-purpose serial interface: Asynchronous, synchronous, interface modes Multifunction 16-bit timer/event counter 8-bit timers lines: Interrupt functions: Three external, eight internal Non-maskable interrupt: Maskable interrupts: Zero-cross detection function (two inputs) Standby functions: HALT mode, Hardware/software STOP mode
ORDERING INFORMATION
Part number µPD78C14G(A)-xxx-36 µPD78C14GF(A)-xxx-3BE µPD78C14L(A)-xxx Remark code suffix.
Please refer "Quality grade Semiconductor Devices" (Document number IEI-1209) published Corporation know specification quality grade devices recommended applications.
Package 64-pin plastic QUIP 64-pin plastic 68-pin plastic (950 mil)
Quality grade Special Special Special
information this document subject change without notice.
Document IC-2813B (O.D. IC-8242B) Date Published 1995 Printed Japan
mark
shows revised points.
1991 1994
µPD78C14(A)
Configuration (Top View)
PC0/TxD PC1/RxD PC2/SCK PC3/INT2 PC4/TO PC5/CI PC6/CO0 PC7/CO1 INT1 MODE1 RESET MODE0
STOP AVDD VAREF AVSS
STOP
454443 PD78C14GF(A)-XXX-3BE 1516 1718
AVDD VAREF
PC0/TxD PC1/RxD PC2/SCK PC3/INT2 PC4/TO PC5/CI PC6/CO0 PC7/CO1
PD78C14G(A)-XXX-36
AVSS MODE0 RESET MODE1 INT1
µPD78C14(A)
PC0/TxD PC1/RxD PC2/SCK PC3/INT2 PC4/TO PC5/CI PC6/CO0
6564 PD78C14L(A)-XXX 2728 3132 4041
STOP
AVDD VAREF
PC7/CO1 INT1 MODE1 RESET MODE0 AVSS
PC0/TxD PC1/RxD PC2/SCK INT1 PC3/INT2/TI PC4/TO PC5/CI PC6/CO0 PC7/CO1 AN7-0 VAREF AVSS
SERIAL
DATA MEMORY (256-BYTE)
PORT
INT. CONTROL
LATCH INC/DEC BUFFER
8/16
MAIN
PORT
Note
PORT
TIMER
LATCH
INTERNAL DATA INST.REG
PORT
PORT
PF7-0/AB15-8 PD7-0/AD7-0 PROGRAM MEMORY K-BYTE) PC7-0 PB7-0
TIMER EVENT COUNTER
Block Diagram
LATCH
INST. DECODER
PA7-0
CONVERTER
(8/16)
READ/WRITE CONTROL
SYSTEM CONTROL
STANDBY CONTROL
MODE1 MODE0 RESET STOP
µPD78C14(A)
Note
DATA MEMORY only used when register External memory necessary when set.
µPD78C14(A)
CONTENTS
DIFFERENCES BETWEEN µPD78C14(A) µPD78C14 FUNCTIONS
Function List Input/Output Circuits Recommended Connections Unused Pins.
INSTRUCTION
Operand Expression Format/Description Method Instruction Code Description Instruction Execution Time.17
LIST MODE REGISTERS ELECTRICAL SPECIFICATIONS CHARACTERISTIC CURVES (reference value) PACKAGE DRAWINGS RECOMMENDED SOLDERING CONDITIONS
APPENDIX DEVELOPMENT TOOLS
µPD78C14(A)
DIFFERENCES BETWEEN µPD78C14(A) µPD78C14
Part number Item Quality grade Electrical specifications Package Special Input leakage current (AN7-0; (MAX.) 64-pin plastic QUIP 64-pin plastic thickness: 2.05 68-pin plastic Standard Input leakage current AN7-0; (MAX.) 64-pin plastic shrink 64-pin plastic QUIP 64-pin plastic QUIP (straight) 64-pin plastic thickness: 2.05 64-pin plastic thickness: 2.70 68-pin plastic
µPD78C14(A)
µPD78C14
µPD78C14(A)
FUNCTIONS
Function List PA7-PA0 (Port PB7-PB0 (Port PC0/TxD PC1/RxD PC2/SCK Input/Output, Output Input/Output, Input Input/Output, Input/Output Input/Output Input/Output Input/Output units. These pins constitute 8-bit port input/output specified units. Port These pins constitute 8-bit port input/output specified units. Transmit Data This outputs serial data. Receive Data This inputs serial data. Serial Clock This inputs/outputs serial clock. becomes output when internal clock used input when external clock used. PC3/INT2/TI Input/Output, Input, Input Interrupt Request/Timer Input This inputs edge triggering (falling edge) maskable interrupt external clock timer. This also shared with zero-cross detection input. PC4/TO Input/Output, Output Timer Output This outputs square waves which cycle internal clock forms half cycle, indicating timer's counting time. PC5/CI Input/Output, Input PC6/CO0 PC7/CO1 PD7-PD0/ AD7-AD0 Input/Output, Output Input/Output, Input/Output Port These pins constitute 8-bit port input/output specified byte units. PF7-PF0/ AB15-AB8 Input/Output, Output Port These pins constitute 8-bit port input/output specified units. (Write Strobe) Output This strobe signal output write data external memory. This signal becomes high level except during data write machine cycle external memory. This signal becomes output high impedance when RESET signal hardware STOP mode. Counter Input This inputs external pulse timer/ event counter. Counter Output This outputs programmable square wave timer/event counter. Address/Data These pins function multiplexed address/data when using external memory. Address These pins function address when using external memory. Function These pins constitute 8-bit port input/output specified
µPD78C14(A)
(Continued) (Read Strobe) (Address Latch Enable) MODE0 MODE1 (Mode) (NonMaskable Interrupt) INT1 (Interrupt Request) AN7-AN0 (Analog Input) VAREF (Reference Voltage) AVDD (Analog VDD) AVSS (Analog VSS) (Crystal) RESET (Reset) STOP (Stop) Input This inputs control signal hardware STOP mode. When level this signal input, oscillator stops operate. Positive power supply Ground Input These crystal connecting pins system clock oscillation. When clock externally supplied, input through Input clock reverse phase This inputs active-low reset input signal. Ground converter Power supply converter Input This inputs reference voltage converter controls operation converter. Input These eight pins input analog signals converter. Pins AN7-AN4 used edge detection (falling edge) input. Input This inputs edge triggering (rising edge) maskable interrupt. This also shared with zero-cross detection input. Input Input/Output Output Input/Output Output Function This strobe signal output read data from external memory. This signal becomes high level except during data read machine cycle external memory. This signal becomes output high impedance when RESET signal hardware STOP mode. This strobe signal externally latch low-order address information output pins PD7-PD0 access external memory. This signal becomes output high impedance when RESET signal hardware STOP mode. MODE0 (low level) MODE1 (high level)Note. When both pins MODE0 MODE1 1Note, these pins synchronize control signal output. This inputs edge triggering (falling edge) nonmaskable interrupt.
Note Pull-up with following external resistor: tCYC Example tCYC (unit: (k): tCYC (ns) (k): tCYC (ns)
µPD78C14(A)
Input/Output Circuits Schematic input/output circuits pins shown Table figures from (11). Table 2-1. Name Type PA0-7 PB0-7 PC0-1 PC2/SCK PC3/INT2 PC4-7 PD0-7 PF0-7 INT1 Type RESET STOP MODE0 MODE1 AN0-3 AN4-7 VAREF Type
µPD78C14(A)
Type
P-ch
N-ch
Type
Type
output data
P-ch
output disable
N-ch
Type
output data Type output disable IN/OUT
Type
µPD78C14(A)
Type
AVDD P-ch AVDD N-ch sampling AVSS AVSS reference voltage (from voltage serial resistor string)
Type
output data output disable N-ch Type IN/OUT
N-ch
Type
Type
self bias enable
Type
data
Type
output data output disable N-ch self bias enable N-ch Type IN/OUT
Type
µPD78C14(A)
Type
IN/OUT
output data
N-ch
Type
(10) Type
Type
Type
edge detection circuit
(11) Type
Type
STOP Mode
P-ch AVSS
µPD78C14(A)
Recommended Connections Unused Pins PA7-0 PB7-0 PC7-0 PD7-0 PF7-0 STOP INT1, AVDD VAREF AVSS AN7-0 Connect AVSS AVDD. Connect VSS. Connect VDD. Connect VSS. Leave unconnected. Connect resistor. Recommended connection
µPD78C14(A)
INSTRUCTION
Operand Expression Format/Description Method Expression format rpa1 rpa2 rpa3 word byte Description method EAH, EAL, MKH, MKL, ANM, SMH, SML, EOM, ETMM, TMM, MCC, TXB, TM0, TM1, MKH, MKL, ANM, SMH, EOM, TMM, RXB, CR0, CR1, CR2, MKH, MKL, ANM, SMH, EOM, ETM0, ETM1 ECNT, ECPT D+byte, H+A, H+B, H+EA, H+byte D++, H++, D+byte, H+A, H+B, H+EA, H+byte 8-bit immediate data 16-bit immediate data 8-bit immediate data 3-bit immediate data Note, FT0, FT1, FE0, FE1, FEIN, FAD, FSR, FST, AN4, AN5, AN6, AN7, Note also described FNMI.
µPD78C14(A)
Remarks
(special register) PORT PORT PORT PORT PORT MODE MODE MODE BUFFER BUFFER SERIAL MODE High SERIAL MODE MASK High MASK ZERO CROSS MODE ETMM TIMER/EVENT COUNTER MODE TIMER/EVENT COUNTER OUTPUT MODE CHANNEL MODE CONVERSION RESULT rpa3 addressing) (BC) (DE) (HL) (DE)+ (HL)+ (DE)- (HL)- (DE)++ (HL)++ (register pair) STACK POINTER EXTENDED ACCUMULATOR (interrupt flag) INPUT INTFT0 INTFT1 INTF1 INTF2 (flag) CARRY HALF CARRY ZERO
MODE CONTROL MODE MEMORY MAPPING TIMER REG0 TIMER REG1
INTFE0 INTFE1 FEIN: INTFEIN INTFAD INTFSR INTFST ERROR OVERFLOW ANALOG INPUT STANDBY
TIMER MODE ETM0 TIMER/EVENT COUNTER REG0 ETM1 TIMER/EVENT COUNTER REG1 ECNT TIMER/EVENT COUNTER UPCOUNTER ECPT TIMER/EVENT COUNTER CAPTURE
D+byte (DE+byte) (HL+A) (HL+B)
H+EA (HL+EA) H+byte (HL+byte)
µPD78C14(A)
Instruction Code Description
Special-reg ETMM
addressing (BC) (DE) (HL) (DE)+ (HL)+ (DE)- (HL)- (DE+byte) (HL+A) (HL+B) (HL+EA) (HL+byte)
rpa1 rpa2
rpa3 addressing (DE) (HL) (DE)++ (HL)++ (DE+byte) (HL+A) (HL+B) (HL+EA) (HL+byte)
reg-pair flag INTF FEIN
Special-reg ETM0 ETM1
Special-reg ECNT ECPT
reg-pair
µPD78C14(A)
Instruction Execution Time following table, state consists three clock cycles. when clock used, state becomes 1/15 µs). Execution time 4-state instruction, shortest instruction, becomes
Instruction group
8-bit data transfer
16-bit data transfer
Instruction code Mnemonic Operand word word, sr2, byte MVIW MVIX STAW LDAW STAX LDAX BLOCK rp3, DMOV rp3L, rp3H byte rpa1, byte rpa2 rpa2 01100100 01110001 01100011 00000001 00010001 00010000 01010000 00110001 Offset Data Offset Offset Data Data
Note
State Data Data Data Adrs Adrs High Adrs High Adrs
Note
Operation (word) (word) byte byte byte (rpa1) byte (rpa2) (rpa2) (DE)+ (HL)+, borrow rp3L EAL, rp3H
Skip condition
01001101 01001100 01110000 01110000
byte
7/13
Note
Note
7/13 (C+1)
µPD78C14(A)
Instruction group
Instruction code Mnemonic Operand sr3, DMOV SBCD SDED SHLD SSPD word word word word rpa3 word word word word rpa3 rp2, word 01001000 01001000 0101 r+A+CY 0100 1101 A+r+CY 01100000 Byte 10101000 High Byte 01001000 01110000 01110000 00011110 00101110 00111110 00001110 00011111 00101111 00111111 00001111 Data
Note
State Adrs High Adrs Data
Note Note
Operation (word) (word+1) (word) (word+1) (word) (word+1) (word) SPL, (word+1) (rpa3) EAL, (rpa3+1) (word), (word+1) (word), (word+1) (word), (word+1) (word), (word+1) (rpa3), (rpa3+1) (SP-1) rp1H, (SP-2) rp1L SP-2 rp1L (SP), rp1H (SP+1) SP+2 word (PC+3+A) (PC+3+A+1)
Skip condition
01001000
16-bit data transfer
STEAX LBCD LDED LHLD LSPD LDEAX PUSH TABLE
14/20 High Adrs
Note
Adrs
14/20
µPD78C14(A)
8-bit arithmetic operation (register)
Instruction group
8-bit arithmetic operation (register)
Instruction code Mnemonic Operand ADDNC SUBNB 0110 Zero 0011 1110 0010 1011 r-A-1 0001 0001 A-r-1 0000 1001 0011 0111 1011 r-A-CY Borrow Borrow 0110 1111 A-r-CY 0010 1110 01100000 State Operation
Skip condition
Carry Carry
Borrow Borrow Borrow
µPD78C14(A)
Borrow Zero
Instruction group
Instruction code Mnemonic Operand OFFA ADDX ADCX ADDNCX SUBX SBBX 01110000 0111 1100 1101 1101 1010 1110 1111 1011 1001 1011 1110 1111 1100 1101 A+(rpa) A+(rpa)+CY A+(rpa) A-(rpa) A-(rpa)-CY A-(rpa) (rpa) (rpa) (rpa) A-(rpa)-1 A-(rpa) A-(rpa) A-(rpa) (rpa) (rpa)
State
Operation
Skip condition
8-bit arithmetic operation (register)
01100000
Zero Zero Zero Zero
Carry
8-bit arithmetic operation (memory)
SUBNBX ANAX ORAX XRAX GTAX LTAX NEAX EQAX ONAX OFFAX
Borrow
Borrow Borrow
µPD78C14(A)
Zero Zero Zero Zero
Instruction group
Arithmetic operation immediate data
Instruction code Mnemonic Operand byte byte sr2, byte byte byte sr2, byte ADINC byte byte sr2, byte byte byte sr2, byte byte byte sr2, byte SUINB byte byte sr2, byte byte byte 01000110 01110100 0110 01010110 01110100 0110 00100110 01110100 0110 01100110 01110100 0110 01110110 01110100 0110 00110110 01110100 0110 00000111 01110100 Data Data Data Data Data Data Data Data Data Data Data Data Data Data A+byte r+byte sr2+byte A+byte+CY r+byte+CY sr2+byte+CY A+byte r+byte sr2+byte A-byte r-byte sr2-byte A-byte-CY r-byte-CY sr2-byte-CY A-byte r-byte sr2-byte byte Borrow Borrow Borrow Carry Carry Carry State Operation
Skip condition
µPD78C14(A)
byte
Instruction group
Instruction code Mnemonic Operand sr2, byte byte byte sr2, byte byte byte sr2, byte byte byte sr2, byte byte byte sr2, byte byte byte sr2, byte byte byte sr2, byte 01100100 00010111 01110100 0110 00010110 01110100 0110 00100111 01110100 0110 00110111 01110100 0110 01100111 01110100 0110 01110111 01110100 0110 Data Data Data Data Data Data Data Data Data Data Data Data Data byte byte byte byte byte byte
State
Operation
Skip condition
Arithmetic operation immediate data
byte
A-byte-1 r-byte-1 sr2-byte-1 A-byte r-byte sr2-byte A-byte r-byte sr2-byte A-byte r-byte sr2-byte
Borrow Borrow Borrow Borrow Borrow Borrow Zero Zero Zero Zero Zero Zero
µPD78C14(A)
Instruction group
Arithmetic operation immediate data
Arithmetic operation working register
Instruction code Mnemonic Operand byte byte sr2, byte OFFI byte byte sr2, byte ADDW ADCW ADDNCW SUBW SBBW SUBNBW ANAW ORAW XRAW GTAW LTAW NEAW EQAW ONAW 01000111 01110100 0110 01010111 01110100 0110 01110100 Data Data 11000000 1101 1010 1110 1111 1011 10001000 1001 10010000 10101000 1011 1110 1111 1100 offset Data Data byte byte byte byte byte byte A+(V.wa) A+(V.wa)+CY A+(V.wa) A-(V.wa) A-(V.wa)-CY A-(V.wa) (V.wa) (V.wa) (V.wa) A-(V.wa)-1 A-(V.wa) A-(V.wa) A-(V.wa) (V.wa)
State
Operation
Skip condition
Zero Zero Zero Zero Zero Zero
Carry
Borrow
Borrow Borrow Zero Zero Zero
µPD78C14(A)
Instruction group
Instruction code Mnemonic Operand OFFAW byte byte byte byte byte byte byte byte 0000 0100 01110100 00000101 0001 0010 0011 0110 0111 0100 0101 01110000 0100 1101 1010 1111 1011 1001 11011000 Offset Offset Data (V.wa) (V.wa) (V.wa) byte State Operation
Skip condition
Zero
Arithmetic operation working register
ANIW ORIW GTIW LTIW NEIW EQIW ONIW OFFIW EADD DADD DADC
(V.wa) (V.wa) byte
(V.wa)-byte-1 (V.wa)-byte (V.wa)-byte (V.wa)-byte (V.wa) byte (V.wa) byte EA+r2 EA+rp3 EA+rp3+CY EA+rp3 EA-r2 EA-rp3 EA-rp3-CY
Borrow Borrow Zero Zero Zero Zero
16-bit arithmetic operation
DADDNC ESUB DSUB DSBB DSUBNB
Carry
µPD78C14(A)
EA-rp3
Borrow
Instruction group
16-bit arithmetic operation
Multiply/ divide
Decrement/Increment
Other arithmetic operation
Instruction code Mnemonic Operand DOFF INRW DCRW NEGA 10101001 01100001 01001000 00101011 00101010 00111010 EA-1 Decimal Adjust Accumulator 10101000 00110000 Offset EA+1 r2-1 (V.wa) (V.wa)-1 rp-1 00100000 Offset 01001000 01110100 1011 1110 1111 1100 1101 0011 EA-rp3-1 EA-rp3 EA-rp3 EA-rp3 EA÷r2, Remainder r2+1 (V.wa) (V.wa)+1 rp+1
State
Operation
Skip condition
Borrow Borrow Zero Zero Zero Zero
Carry Carry
Borrow Borrow
µPD78C14(A)
Instruction group
Instruction code Mnemonic Operand word 01010100 00100001 word word jdisp jdisp 00101000 Adrs 00101001 High Adrs 01001000 00111000 1001 10110100 0000 10100100 0000 Adrs High Adrs Rotate Left Digit Rotate Right Digit r2m+1 r2m, r2m-1 r2m, r2m+1 r2m, r2m-1 r2m, r2m+1 r2m, r2m-1 r2m, EAn+1 EAn, EA15 EAn-1 EAn, EA15 EAn+1 EAn, EA15 EAn-1 EAn, EA15 word PC+1+jdisp PC+2+jdisp State Operation
Skip condition
Rotation shift
SLLC SLRC DRLL DRLR DSLL DSLR
Carry Carry
Jump
CALL
0100111 01001000
µPD78C14(A)
(SP-1) (PC+3)H, (SP-2) (PC+3)L word, SP-2 (SP-1) (PC+2)H, (SP-2) (PC+2)L SP-2 (SP-1) (PC+2)H, (SP-2) (PC+2)L PC15-11 00001, PC10-0 SP-2
word
01000000 01001000
Call
CALB CALF word
01111
Instruction group
Call
Return
Skip
operation
Instruction code Mnemonic Operand CALT SOFT1 RETS RETI SKIT SKNIT STOP bit, 00000000 10101010 10111010 01001000 01001000 00111011 10111011 word Offset 0001 (SP-1) (PC+1)H, (SP- (PC+1)L, (128+2ta), (129+2ta), SP-2 (SP-1) PSW, (SP-2) (PC+1)H, (SP-3) (PC+1)L, 0060H, SP-3 (SP), (SP+1) SP+2 (SP), (SP+1), SP+2 PC+n (SP), (SP+1) (SP+2), SP+3 Skip (V.wa) Skip Skip Skip then reset Skip Reset irf, Operation Enable Interrupt Disable Interrupt Halt Mode Stop Mode (V.wa) Unconditional State Operation
Skip condition
01110010 10111000 1001 01100010 01001000
Notes (Data) applied rpa2 byte byte. (Data) applied rpa3 byte byte. "state" column, data right slash applies when rpa2 rpa3 byte, byte.
µPD78C14(A)
Remark When instructions below skipped, number idle states listed below differs from number execution states. 3-byte instruction (with 10-state 1-byte instruction 4-state 11-state 3-byte 7-state 2-byte (with 14-state 4-byte 8-state 2-byte
µPD78C14(A)
LIST MODE REGISTERS
Name mode register ETMM Channel Mode Zero-cross Mode Specifies operation mode converter Specifies operation mode zero-cross detection circuit Interrupt Mask MODE MODE MODE CONTROL MODE MEMORY MAPPING MODE Timer mode Timer/Event Counter Mode Timer/Event Counter Output Mode Serial Mode Specifies interrupt request enable/disable Specifies operation mode serial interface Controls output level Read/Write Function Specifies input/output Port units Specifies input/output Port units Specifies port/control mode Port units Specifies input/output Port port mode units Specifies port/expansion mode Ports Specifies input/output Port port mode units Specifies operation mode timer Specifies operation mode Timer Event Counter
µPD78C14(A)
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS Parameter Power Supply Voltage Symbol AVDD AVSS Input Voltage Output Voltage Output Current Output Current High Converter Reference Input Voltage Operating Ambient Temperature Storage Temperature Tstg +150 VAREF Output Output Total Output Output Total Test Condition Ratings -0.5 +7.0 AVSS -0.5 +0.5 -0.5 -0.5 -2.0 -0.5 AVDD Unit
Caution
parameters exceeds absolute maximum ratings even moment, this damage product quality. absolute maximum ratings values that physically damage product. must product within specified ratings.
µPD78C14(A)
Oscillation Characteristics AVDD +5.0 AVSS AVDD VDD, VAREF AVDD) Resonator Ceramic Resonator Crystal ResonatorNote
Recommended Circuits
Parameter
Test Conditions used
MIN.
MAX.
UNIT
Oscillation Frequency (fxx) Converter
Converter Used
External Clock
Input Frequency (fx)
Converter used Converter Used
Input Rise, Fall Time (tr,
HCMOS Inverter
Input High, Level Width
Cautions
Oscillator circuit should nearest area from pins. place other signal lines within area enclosed with broken lines.
Note crystal resonator, following external capacitances recommended: CAPACITANCE Parameter Input Capacitance Output Capacitance Capacitance Symbol Test Condition Unmeasured pins returned MIN. TYP. MAX. UNIT
µPD78C14(A)
CHARACTERISTICS AVDD +5.0 AVSS Parameter Input Voltage Symbol VIL1 VIL2 Input High Voltage VIH1 VIH2 Output Voltage Test Condition except RESET, STOP, NMI, SCK, INT1, RESET, STOP, NMI, SCK, INT1, except RESET, STOP, NMI, SCK, INT1, AN4, RESET, STOP, NMI, SCK, INT1, AN4, -1.0 -100 Input Current Input Leakage Current Output Leakage Current AVDD Supply Current Supply Current Data Retention Voltage Data Retention Current Notes IDDDR Hardware/Software Note STOP Mode When self-bias generated register. When control mode register self-bias generated register. When self-bias generated. VDDDR VDDDR AIDD1 AIDD2 IDD1 IDD2 VDDDR Operation Mode STOP Mode Operation mode HALT Mode Hardware/Software STOP Mode INT1
Note
MIN.
TYP.
MAX. 0.2VDD 0.45
UNIT
0.8VDD
Output High Voltage
Note
(PC3)
±200
except INT1, (PC3), AN0; AN0;
µPD78C14(A)
CHARACTERISTICS AVDD +5.0 AVSS READ/WRITE OPERATION: Parameter Input Cycle Time Address Setup Time Address Hold Time after Address Delay Time Address Floating Time Address Data Input Time Data Input Time Data Input Time Delay Time Data Hold Time after Delay Time Width Symbol tCYC tAFR tLDR tRDH MHz, Data Read MHz, code Fetch MHz, Width High Setup Time Hold Time after IO/M Setup Time IO/M Hold Time after Address Delay Time Data Output Time Data Output Time Delay Time Data Setup Time Data Hold Time after Delay Time Width tLDW tWDH MHz, MHz, MHz, MHz, MHz, Test Condition MIN. MAX. UNIT
µPD78C14(A)
SERIAL OPERATION: Parameter Cycle Time Symbol tCYK Test Condition Input Output Width tKKL Input Output Width High tKKH Input Output Setup Time Hold Time After Delay Time Notes tRXK tKRX tKTX Note Note Note Note Note Note Note Note Note MIN. MAX. UNIT
case clock rate asynchronous mode, synchronous mode, interface mode. case clock rate asynchronous mode.
Remark numeric values table apply when MHz, ZERO-CROSS CHARACTERISTICS: Parameter Zero-Cross Detection Input Zero-Cross Accuracy Zero-Cross Detection Input Frequency OTHER OPERATION: Parameter Width High, Width High, Width High, INT1 Width High, INT2 Width High, AN7-4 Width High, RESET Width High, Symbol tTIH, tTIL tCI1H, tCI1L tCI2H, tCI2L tNIH, tNIL tI1H, tI1L tI2H, tI2L tANH, tANL tRSH, tRSL Event Counter Mode Pulse Width Measurement Mode Test Condition MIN. MAX. UNIT tCYC tCYC tCYC Symbol Test Condition Coupled 60-Hz Sine Wave 0.05 MIN. MAX. ±135 UNIT VACP-P
tCYC tCYC tCYC
µPD78C14(A)
CONVERTER CHARACTERISTICS: +5.0 AVSS AVDD VDD, VAREF AVDD) Parameter Resolution Absolute Accuracy
Note
Symbol
Test Condition VAREF AVDD, tCYC VAREF AVDD, tCYC VAREF AVDD, tCYC
MIN.
TYP.
MAX. ±0.8 ±0.6 ±0.4
UNIT Bits tCYC tCYC tCYC tCYC
Conversion time Sampling Time Analog Input Voltage Reference Voltage VAREF Current AVDD Supply Current
tCONV tSAMP VIAN VAREF IAREF1 IAREF2 AIDD1 AIDD2
tCYC tCYC tCYC tCYC AN7-0 (include unused pins)
AVDD VAREF
Analog Input Impedance Operation mode STOP mode Operation mode, STOP mode
Note Except quantization error (i.e. ±1/2 LSB). TIMING TEST POINTS
0.45
Test points
µPD78C14(A)
CHARACTERISTIC CALCULATING EXPRESSION depending tCYC Symbol tLDR tLDW tWDH tCYK tKKL tKKH Calculating Expression (Data Read) Code Fetch) (SCK Input)
Note
MIN./MAX. MIN. MIN. MIN. MAX. MAX. MAX. MIN. MIN. MIN. MIN. MIN. MIN. MIN. MIN. MIN. MAX. MIN. MIN. MIN. MIN. MIN.
UNIT
/12T (SCK Input)
Note
MIN. MIN. MIN.
(SCK Output) 2.5T (SCK Input) Note (SCK Input) Note (SCK Output) 2.5T (SCK Input) Note (SCK Input) Note (SCK Output) Notes Remarks case clock rate asynchronous mode. case clock rate asynchronous mode, synchronous mode, interface mode. tCYC 1/fxx Symbols that cannot found this table depend oscillation frequency (fxx).
µPD78C14(A)
Timing Waveform
Read Operation
tCYC
PF7-0 PD7-0 address (low-order) MODE1 Note (M1) MODE0 (IO/M) Note tAFR
address (high-order)
read data tLDR tRDH
Write Operation
PF7-0 tLDW PD7-0 address (low-order) MODE0 (IO/M) Note
address (high-order)
write data tWDH
Notes signal output MODE1 first code fetch cycle MODE1 pulled IO/M signal output MODE0 register read cycle MODE0 pulled IO/M signal output MODE0 register write cycle MODE0 pulled
µPD78C14(A)
Serial Operation
tCYK tKKL tKTX tKKH
tRXK tKRX
Timer Input Timing
tTIH
tTIL
Timer/Event Counter Input Timing
Event Counter Mode tCI1H tCI1L
Pulse Width Measurement Mode tCI2H tCI2L
µPD78C14(A)
Interrupt Input Timing
tNIH tNIL
tI1L
tI1H
INT1
tI2H
tI2L
INT2
RESET Input Timing
tRSH 0.8VDD 0.2VDD
tRSL
RESET
External Clock Timing
0.8VDD tCYC
µPD78C14(A)
Data Memory STOP Mode Supply Voltage Data Retention Characteristics Parameter Data retention power supply voltage Data retention power supply current Symbol VDDDR IDDDR tRVD, tFVD tSSTVD tHVDST VDDDR VDDDR rise, fall time STOP setup time STOP hold time Note tCYC 1/fxx Data Retention Timing
Note
Test Condition
MIN.
TYP.
MAX.
UNIT
12TNote
tFVD tSSTVD STOP VIL2 VDDDR tRVD tHVDST VIH2
µPD78C14(A)
CHARACTERISTIC CURVES (reference value)
IDD1, IDD2 MHz)
Supply Current IDD1 IDD2 [mA] IDD1 (TYP.)
IDD2 (TYP.)
Supply Voltage
IDD1, IDD2
Supply Current IDD1, IDD2 [mA]
IDD1(TYP.)
IDD2(TYP.)
Oscillation Frequency [MHz]
µPD78C14(A)
TYP.
Output Current [mA]
Output Voltage
Output High Current [mA]
TYP.
Supply Voltage Output High Voltage
µPD78C14(A)
IDDDR VDDDR Data Retention Supply Current IDDDR
TYP.
Data Retention Supply Voltage VDDDR
µPD78C14(A)
PACKAGE DRAWINGS
PLASTIC QUIP
P64GQ-100-36 NOTE Each lead centerline located within 0.25 (0.010 inch) true position (T.P.) maximum material condition. ITEM MILLIMETERS 41.5 16.5
0.50 +0.10 +0.3 -0.2
INCHES 1.634+0.012 -0.008 0.650 0.020 +0.004 -0.005 0.010 0.100 (T.P.) 0.050 (T.P.) 0.043+0.011 -0.006 0.010 +0.004 -0.003 0.157+0.013 -0.012 0.142 -0.005 0.950
+0.042 +0.042 +0.004
0.25 2.54 (T.P.) 1.27 (T.P.) +0.25 -0.15
+0.10 0.25 -0.05 +0.3
+0.1
24.13 +1.05 19.05 +1.05
0.750
µPD78C14(A)
PLASTIC
detail lead
P64GF-100-3B8,3BE,3BR-1 NOTE Each lead centerline located within 0.20 (0.008 inch) true position (T.P.) maximum material condition. ITEM MILLIMETERS 23.6 20.0 14.0 17.6 0.40 0.10 0.20 (T.P.) 0.15+0.10 -0.05 0.12 MAX. INCHES 0.929 0.016 0.795+0.009 -0.008 0.551+0.009 -0.008 0.693 0.016 0.039 0.039 0.016 +0.004 -0.005 0.008 0.039 (T.P.) 0.071-0.009 0.031+0.009 -0.008 0.006+0.004 -0.003 0.005 0.106 0.004 0.004 0.119 MAX.
+0.008
5°±5°
µPD78C14(A)
PLASTIC mil)
P68L-50A1-2 NOTE Each lead centerline located within 0.12 (0.005 inch) true position (T.P.) maximum material condition. ITEM MILLIMETERS 25.2 24.20 24.20 25.2 1.94 0.15 MIN. 1.27 (T.P.) 0.40 0.12 23.12 0.20 0.15 0.20 +0.10 -0.05 INCHES 0.992 0.008 0.953 0.953 0.992 0.008 0.076+0.007 -0.006 0.024 0.173+0.009 -0.008 0.110+0.009 -0.008 0.035 MIN. 0.134 0.050 (T.P.) 0.016+0.004 -0.005 0.005 0.910+0.009 -0.008 0.006 0.031 0.008+0.004 -0.002
µPD78C14(A)
RECOMMENDED SOLDERING CONDITIONS
Solder µPD78C14(A) under recommended conditions listed below. details recommended conditions soldering, please refer Semiconductor Device Mounting Technology Manual (IEI-1207). Consult sales representative about soldering methods soldering conditions other than listed below. Table 8-1. Soldering Conditions Surface Mount Type µPD78C14GF(A)-xxx-3BE: 64-pin plastic Soldering Method Soldering Conditions Infrared reflow Package peak temperature: Time: Within higher), Count: Twice less <Attention> Perform second reflow when device temperature come down room temperature from heating from first reflow. wash soldered portion with flux following first reflow. Package peak temperature: Time: Within higher), Count: Twice less <Attention> Perform second reflow when device temperature come down room temperature from heating from first reflow. wash soldered portion with flux following first reflow. Wave soldering Soldering bath temperature: less, Time: Within Count: Once, Preheating temperature: MAX. (package surface temperature) Partial heating temperature: less, Time: Within (per row) WS60-00-1 VP15-00-2 Recommended Condition Symbol IR35-00-2
Caution several soldering methods together (except partial heating). µPD78C14L (A)-xxx: 68-pin plastic (950 mil) Soldering Method Soldering Conditions Infrared reflow Package peak temperature: Time: Within higher), Count: Once, Maximum number days: Seven prebaking required hours) Package peak temperature: Time: Within higher), Count: Once, Maximum number days: Seven Note (after seven days, prebaking required hours) Partial heating Note temperature: less, Time: Within (per row) VP15-107-1
Note
Recommended Condition Symbol IR30-107-1 (after seven days,
Number storage days under storage conditions less after pack opened.
Caution several soldering methods together (except partial heating).
µPD78C14(A)
Table 8-2. Soldering Conditions Hole-Through Type
µPD78C14G(A)-xxx-36: 64-pin plastic QUIP
Soldering Method Wave Soldering (pin part only) Partial heating Soldering Conditions Soldering bath temperature: less, Time: Within temperature: less, Time: Within (per row)
Caution Apply wave soldering only pins careful bring solder directly contact with package.
µPD78C14(A)
APPENDIX DEVELOPMENT TOOLS
following development tools provided system development using µPD78C14(A): Language processor 87AD series relocatable assembler (RA87) This relocatable assembler program which converts program written mnemonics into object code that executed microcontroller. addition, contains automatic function symbol table generation branch instruction optimization processing. Host machine PC-9800 series PC/ATMS-DOS(Ver. 2.11 Ver. 5.00A Note) DOS(Ver. 3.1) Distribution media 3.5-inch 5-inch 3.5-inch 5-inch Ordering code (product name)
µS5A13RA87 µS5A10RA87 µS7B13RA87 µS7B10RA87
PROM write tools Hardware PG-1500 PG-1500 PROM programmer which enables program single chip microcontrollers containing PROM stand-alone host machine operation connecting attached board optional programmer adapter PG-1500. also enables program typical PROM devices Kbits Mbits. PA-78CP14GQ Software PG-1500 controller PROM programmer adapter µPD78CP14(A) connected PG-1500 use. PG-1500 host machine connected serial parallel interface PG-1500 controlled host machine. Host machine PC-9800 series PC/AT MS-DOS (Ver. 2.11 Ver. 5.00A Note) (Ver. 3.1) Distribution media 3.5-inch 5-inch 3.5-inch 5-inch Ordering code (product name)
µS5A13PG1500 µS5A10PG1500 µS7B13PG1500 µS7B10PG1500
Note Ver. 5.00/500A have task swap function. However, this function supported this software. Remark Operations assembler PG-1500 controller guaranteed only host machines under operating systems listed above.
µPD78C14(A)
Debugging tools In-circuit emulator (IE-78C11-M) provided µPD78C14(A) program debugging tools. system configuration listed below: Hardware Software IE-78C11-M control program controller) IE-78C11-M IE-78C11-M in-circuit emulator 87AD series. IE-78C11-M connected host machine efficient debugging. IE-78C11-M host machine connected RS-232-C IE-78C11-M controlled host machine. Host machine PC-9800 series PC/AT MS-DOS (Ver. 2.11 Ver. 3.30D) (Ver. 3.1) Remark Operation controller guaranteed only host machine under operating systems listed above. Distribution media 3.5-inch 5-inch 5-inch Ordering code (product name)
µS5A13IE78C11 µS5A10IE78C11 µS7B10IE78C11
µPD78C14(A)
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS
Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices HANDLING UNUSED INPUT PINS CMOS
Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS device behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices. STATUS BEFORE INITIALIZATION DEVICES
Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
MS-DOS trademark Microsoft Corporation. PC/AT trademarks Corporation.
µPD78C14(A)
export this product from Japan regulated Japanese government. export this product prohibited without governmental license, need which must judged customer. export reexport this product from country other than Japan also prohibited without license from that country. Please call sales representative.
part this document copied reproduced form means without prior written consent Corporation. Corporation assumes responsibility errors which appear this document. Corporation does assume liability infringement patents, copyrights other intellectual property rights third parties arising from device described herein other liability arising from such device. license, either express, implied otherwise, granted under patents, copyrights other intellectual property rights Corporation others. While Corporation been making continuous effort enhance reliability semiconductor devices, possibility defects cannot eliminated entirely. minimize risks damage injury persons property arising from defect semiconductor device, customer must incorporate sufficient safety measures design, such redundancy, fire-containment, anti-failure features. devices classified into following three quality grades: "Standard", "Special", "Specific". Specific quality grade applies only devices developed based customer designated "quality assurance program" specific application. recommended applications device depend quality grade, indicated below. Customers must check quality grade each device before using particular application. Standard: Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade devices "Standard" unless otherwise specified NEC's Data Sheets Data Books. customers intend devices applications other than those specified Standard quality grade, they should contact Sales Representative advance. Anti-radioactive design implemented this product.
94.11

µPD78C14(A) 8-BIT SINGLE-CHIP MICROCONTROLLER (WITH CONVERTER)

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