EPIC (Enhanced-Performance Implanted CMOS) Process Operating Range 5.5

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

EPIC (Enhanced-Performance Implanted CMOS) Process Operating Range 5.5

Datasheet Thumbnail

Top Searches for this datasheet

SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
EPIC (Enhanced-Performance Implanted CMOS) Process Operating Range 5.5-V Contain Flip-Flops With Single-Rail Outputs Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Latch-Up Performance Exceeds JESD Protection Exceeds JESD 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101) Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Very Small-Outline (DGV), Thin Shrink Small-Outline (PW), Ceramic Flat Packages, Ceramic Chip Carriers (FK), Standard Plastic Ceramic DIPs
SN54AHC174 PACKAGE SN74AHC174 DGV, PACKAGE (TOP VIEW)
SN54AHC174 PACKAGE (TOP VIEW)
internal connection OUTPUT
Copyright 2000, Texas Instruments Incorporated
'AHC174 devices positive-edge-triggered D-type flip-flops with direct clear (CLR) input designed 5.5-V operation.
Information data inputs that meets setup time requirements transferred outputs positive-going edge clock (CLK) pulse. Clock triggering occurs particular voltage level directly related transition time positive-going edge CLK. When either high level, input effect output. SN54AHC174 characterized operation over full military temperature range -55°C 125°C. SN74AHC174 characterized operation from -40°C 85°C.
FUNCTION TABLE (each flip-flop) INPUTS
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. EPIC trademark Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. POST OFFICE 655303
DALLAS, TEXAS 75265
description
SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
logic symbol
This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12. numbers shown DGV, packages.
logic diagram (positive logic)
Five Other Channels numbers shown DGV, packages.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, Input voltage range, (see Note Output voltage range, (see Note Input clamp current, Output clamp current, VCC) Continuous output current, VCC) Continuous current through Package thermal impedance, (see Note package 73°C/W package 82°C/W package 120°C/W package 67°C/W package 108°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD
recommended operating conditions (see Note
SN54AHC174 Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage High-level output current Low-level output current 3.85 1.65 SN74AHC174 3.85 1.65 UNIT
Input transition rise fall rate
Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS GND, 2.58 3.94 0.36 0.36 25°C SN54AHC174 2.48 SN74AHC174 2.48 0.44 0.44 UNIT
products compliant MIL-PRF-38535, this parameter production tested
timing requirements over recommended operating free-air temperature range, (unless otherwise noted)
25°C Pulse duration Setup time before Hold time, data after high Data inactive SN54AHC174 SN74AHC174 UNIT
timing requirements over recommended operating free-air temperature range, (unless otherwise noted)
25°C Pulse duration Setup time before Hold time, data after high Data inactive SN54AHC174 SN74AHC174 UNIT
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER fmax tPHL tPLH tPHL tPHL tPLH tPHL FROM (INPUT) (OUTPUT) LOAD CAPACITANCE 25°C 170* 4.5* 5.8* 5.8* 11.4* 14.9 14.5 14.5 1.5** SN54AHC174 13.5* 16.5 16.5 SN74AHC174 13.5 16.5 16.5 UNIT
tsk(o) products compliant MIL-PRF-38535, this parameter production tested. products compliant MIL-PRF-38535, this parameter does apply.
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER fmax tPHL tPLH tPHL tPHL tPLH tPHL FROM (INPUT) (OUTPUT) LOAD CAPACITANCE 25°C 130* 240* 4.1* 4.1* 7.6* 7.2* 7.2* SN54AHC174 110* 8.5* 8.5* 10.5 10.5 SN74AHC174 10.5 10.5 UNIT
tsk(o) products compliant MIL-PRF-38535, this parameter production tested. products compliant MIL-PRF-38535, this parameter does apply.
operating characteristics, 25°C
PARAMETER Power dissipation capacitance TEST CONDITIONS load, 15.2 UNIT
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
PARAMETER MEASUREMENT INFORMATION
Open
From Output Under Test (see Note
Test Point
From Output Under Test (see Note
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain
Open
LOAD CIRCUIT TOTEM-POLE OUTPUTS
LOAD CIRCUIT 3-STATE OPEN-DRAIN OUTPUTS Timing Input Data Input VOLTAGE WAVEFORMS SETUP HOLD TIMES tPZL tPZH Output Waveform (see Note tPLZ tPHZ
Input
VOLTAGE WAVEFORMS PULSE DURATION
Input tPLH In-Phase Output tPHL Out-of-Phase Output
tPHL
Output Control
tPLH
Output Waveform (see Note
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING
NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement.
Figure Load Circuit Voltage Waveforms
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments subsidiaries (TI) reserve right make changes their products discontinue product service without notice, advise customers obtain latest version relevant information verify, before placing orders, that information being relied current complete. products sold subject terms conditions sale supplied time order acknowledgement, including those pertaining warranty, patent infringement, limitation liability. warrants performance semiconductor products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS INVOLVE POTENTIAL RISKS DEATH, PERSONAL INJURY, SEVERE PROPERTY ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). SEMICONDUCTOR PRODUCTS DESIGNED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. INCLUSION PRODUCTS SUCH APPLICATIONS UNDERSTOOD FULLY CUSTOMER'S RISK. order minimize risks associated with customer's applications, adequate design operating safeguards must provided customer minimize inherent procedural hazards. assumes liability applications assistance customer product design. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used. TI's publication information regarding third party's products services does constitute TI's approval, warranty endorsement thereof.
Copyright 2000, Texas Instruments Incorporated

EPIC (Enhanced-Performance Implanted CMOS) Process Operating Range 5.5

Top Searches for this datasheet

Other recent searches