June 1998 Intel Corporation Order Number: 243835-001 Pentium
|
|
|
Top Searches for this datasheet
Pentium® XeonProcessor Server Platform System Management Guide
June 1998 Intel Corporation
Order Number: 243835-001
Pentium XeonProcessor Server Management Guide
Information this document provided connection with Intel products. license, express implied, estoppel otherwise, intellectual property rights granted this document. Except provided Intel's Terms Conditions Sale such products, Intel assumes liability whatsoever, Intel disclaims express implied warranty, relating sale and/or Intel products including liability warranties relating fitness particular purpose, merchantability, infringement patent, copyright other intellectual property right. Intel products intended medical, life saving, life sustaining applications. Intel make changes specifications product descriptions time, without notice. Designers must rely absence characteristics features instructions marked "reserved" "undefined." Intel reserves these future definition shall have responsibility whatsoever conflicts incompatibilities arising from future changes them. Pentium® Xeonprocessor contain design defects errors known errata which cause product deviate from published specifications. Current characterized errata available request.
two-wire communications bus/protocol developed Philips. SMBus subset theC bus/protocol developed Intel. Implementations bus/protocol SMBus bus/protocol require licenses from various entities, including Philips Electronics N.V. North American Philips Corporation.
Contact your local Intel sales office your distributor obtain latest specifications before placing your product order. Copies documents which have ordering number referenced this document, other Intel literature, obtained calling 1-800-548-4725 visiting Intel's website http://www.intel.com Copyright Intel Corporation 1998. Third-party brands names property their respective owners.
Pentium XeonProcessor Server Management Guide
Table Content
Reference Documents.4 System Management Overview.5 Introduction.5 Software Elements Server Platform Management Hardware Elements Server Platform Management Common Platform Architecture Pentium Xeon Processor Manageability Features. System Management Mode (SMM). Functional Redundancy Checking (FRC) 4.3.0 Power States Clock Control 4.3.1 Auto-Halt Power-Down State. 4.3.2 Stop-Grant State 4.3.3 Sleep State System Management (SMBus) 4.4.1 Processor Information (PIROM). 4.4.1.1 PIROM Processor Data 4.4.1.2 PIROM Core Data. 4.4.1.3 PIROM Cache Data 4.4.1.4 PIROM Cartridge Data 4.4.1.5 PIROM Part Numbers Data 4.4.1.6 PIROM Thermal Reference Data. 4.4.1.7 PIROM Features Data 4.4.2 Scratch EEPROM 4.4.3 Thermal Sensor Device Pentium Xeon Processor Manageability Benefits. Pentium Xeon Processor Fits Common Platform Architecture. Pentium Xeon Processor Benefits Asset Management Pentium Xeon Processor Benefits Configuration Management Pentium Xeon Processor Benefits Inventory Management. Pentium Xeon Processor Benefits Performance Management Pentium Xeon Processor Benefits Security Management Pentium Xeon Processor Benefits Server Management. APPENDIX Management Initiatives Background A.2.0 Manageability Management Areas A.2.1 Asset Management. A.2.2 Configuration Management A.2.3 Inventory Management A.2.4 Network Management A.2.5 Performance Management. A.2.6 Security Management. A.2.7 Server Management A.2.8 System Management APPENDIX Example Software Stack List Figures Figure Example Block Diagram Hardware Interconnects Managed Server Platform Figure Block Diagram Pentium XeonProcessor Management Components Figure Flow diagram software stack.
Pentium XeonProcessor Server Management Guide
List Tables Table Processor Information Data Position Format
Reference Documents
Additional information topics discussed here obtained through: Pentium® Xeon Processor 400MHz, Order Number 243770-001. Wired Management, Intel Corporation. http://www.intel.com/managedpc Intelligent Platform Management Interface Specification 1997, Intel Corporation. Web-Based Enterprise Management (WBEM). http://www.microsoft.com, http://www.freerange.com Desktop Management Task Force, Rev.2.0. http://www.dmtf.org January 1992, Signetics/ Philips Semiconductor. System Management Specification Intel Corporation.
Pentium XeonProcessor Server Management Guide
System Management Overview
This paper establishes common background system management providing simplified view management goals along with software hardware elements involved implementation. This discussion followed outlining Pentium® Xeonprocessor's manageability features benefits various aspects manageability. proliferation networked client server platforms proven effective business. same time, increasing administrative costs ongoing expenses incurred deploying managing systems become major burden departments. large network environment, departments challenged accurately maintain track network components, implement mass upgrade plans, eliminate unreliable equipment, prevent failures, provide support, service repair. properly address these issues, managers need access simple tools gathering detailed data from departmental networked servers client workstations. Such databases should detailed enough enable managers locate installed hardware software network, detect unreliable hardware, detect stressed operating environments, ensure intrusion-free networks. computing industry's first step towards deployment such tools introduction promotion industry-standard management software initiatives. Such standardization allows independent deployment management application software that articulates consistent instrumentation methodology across platforms. availability such tools addressed some managers' dilemmas. However, proprietary nature hardware architecture, fact that software tightly coupled hardware, proven costly inflexible scalability, portability extensibility. effectiveness such tools relies availability accurate information that benefits instrumentation. This addresses both asset configuration management, well monitoring hardware implementation, which targets system Reliability, Availability, Serviceability, Usability, Manageability (RASUM). industry's commitment creation open specifications resulted proposals industry open system management hardware implementation. Hardware common platform architectures eliminates drawbacks discrete proprietary implementations, which often translates higher cost, incoherent implementation methodologies, erroneous data collection interpretation. Adoption such industry open architecture de-couple software from hardware, allowing independent enhancement. benefit industry open-based implementation collection consistent accurate data, even when gathered across heterogeneous networks. microprocessors heart server platforms, which integrate highest transistor counts function highest system frequencies ever, critical hardware element proper continuous system operation. Most hardware management implementations designed monitor check system's operating environment, referencing processor's specification. This realtime monitoring critical ensure reliable system operation detection failure symptoms.
Pentium XeonProcessor Server Management Guide
Introduction
Pentium® Xeonprocessor introduces manageability features that enable enhancements instrumentation, improving asset management configuration management, well making available detailed information about processor's characteristics. Such features enabling fine-tuned hardware monitoring logic implementation. typical hardware management implementation focuses verifying that platform operating environment within microprocessor's characterized specification. this process, processor's core temperature, voltage, ambient temperature, cache interface internally generated (IERR) errors monitored. real-time monitoring processor's working environment critical ensuring reliable system operation detection failing system's symptoms. server platforms with Pentium Xeon processors, such data pre-programmed into cartridge accessible through system management (SMBus). SMBus seamlessly connects processor's system management components baseboard industry open format. Pentium Xeon processor integrates many discrete components required implement robust processor management, such thermal sensor, manageable platform, enhancing data accuracy lower cost. following management features incorporated into Pentium Xeon processor cartridge: SMBus Processor Information Read Only Memory (PIROM) Scratch EEPROM Thermal sensor devices
information contained within PIROM makes more data available about cartridge's characteristics configuration than preceding Intel processors. System management software apply this information generating databases that then used superior instrumentation, inventory control, tracking, networked server platform configuration. instrumentation enhanced displaying detailed accurate data about each processor cartridge each server platform, including: S-spec Number Processor Core Type Processor Core Family Processor Core Model Processor Core Stepping Maximum Core Frequency Core Voltage requirement Core Voltage Tolerance, High Core Voltage Tolerance, Cache Size Number SRAM Components Cache Voltage requirement Cache Voltage Tolerance, Cache/Tag Stepping Cartridge mechanical Revision Substrate Revision Software Processor Part Number Processor 64-bit unique identification number Thermal Reference Byte Processor Core Feature Flags
This information also used automatically configure processor voltage, temperature, frequency monitoring match specified operating ranges. Products that take advantage this capability eliminate manual configuration these ranges part system integration field upgrades.
Pentium XeonProcessor Server Management Guide
Software Elements Server Platform Management
Instrumentation basic requirement well-managed server platform. Instrumentation defines manageable data about hardware software components server platform, methods used make those data available management applications. Standardized access management data provided through software interfaces defined industry standards such SNMP (detailed information about these standards obtained visiting sites outlined references section). Appendix outlines simplified sample software stack quick reference summary. instrumented server platform with Pentium Xeonprocessor can: Display complete inventory processor cartridges part number Display complete inventory processors Display complete inventory cartridges substrate revisions Display complete configuration listing processor cartridges installed each server platform, speed cache sizes Display complete server performance data, including processor up-time (run time duration), maintaining up-time counter Scratch EEPROM Provide detailed alerts pending failures tracking number internal external errors detected processor's Machine check Architecture (MCA) Automatically processor cache voltages processor core thermal monitoring envelope Display processor's maximum thermal specification Display processor's configuration data allow proper matching Display dynamic operating status monitoring processor core thermal information Display correlate installed processor core cache voltage requirements with voltage modules installed Detect security breach tracking each processor unique electronic Display installed Micro-code storing data each processor's Scratch EEPROM.
instrumentation then manageable data about platform hardware software components. This covers manageable elements server platform, from component's temperature silicon stepping, network configuration topology, versions installed software. advanced instrumentation environment, it's feasible engineer proactive communication critical events remote enabling disabling component's functions. Component-level instrumentation consists maintaining attributes with up-to-the minute values that adjustments component's operational characteristics, based these values, managed.
Pentium XeonProcessor Server Management Guide Pentium Xeon processor-based server platforms, system management data available through SMBus, subset industry-standard serial bus. SMBus powered separately from processor, allowing this information available remote management application before system power-up boot. Some parameters, which represent processor's operating environment limitations, preprogrammed PIROM. This data used accurately monitor manage processor's operating environment. scratch EEPROM also provided cartridge substrate, which used OEMs proprietary fashion. Possible usage scratch EEPROM includes: Service information Inventory management (e.g., asset tag) Processor up-time duration Processor Micro-code Update revision Security
Pentium XeonProcessor Server Management Guide
Hardware Elements Server Platform Management
server platform, system management goal reducing total cost ownership (TCO) measured metrics associated with RASUM: Reliability: Continuous self-checking data correction, extensive redundancy higher reliability Availability: Up-time, automatic data correction, failure tolerance, error-alerting mechanism, boot resiliency Serviceability: Fault detection rapid repair Usability: Flexibility customization Manageability: Availability detailed information about platform components characteristics. Address asset management, inventory tracking, configuration management
hardware implementation server management focuses providing fault prediction, detection, resilience. case component failure, server management's goal provide rapid servicing problem minimize server downtime. Rapid server restoration requires remote notification, including Field Replaceable Unit (FRU) that failed, and, feasible, deployment remote mechanisms reconfiguration recovery. hardware monitoring mechanism's efficiency critical ensure reliable system operation. monitoring logic's efficiency improved once true characteristics processor compared measured parameters system. Prior Pentium® Xeonprocessor, processor's operating environment compared specifications outlined processor's data sheet. Since each processor have unique characteristics, implementing wide-tolerance monitoring that covers variations produce sub-optimal result. Pentium Xeon processor enhances accuracy such monitoring making data about characteristics operating limitations available through PIROM. This methodology maximizes system up-time efficiently matching processor's operating environment specification. PIROM also enables creation systems that eliminate manual configuration monitoring logic, such system clock speed cache sizes, management software.
Common Platform Architecture
first server management specification aimed common platform architecture managed platform "Intelligent Platform Management Interface," IPMI. Implementing IPMI architecture just example many implementations that used exploit unique management features Pentium Xeon processor. IPMI specification comprised three sub-specifications, which define interface platform hardware (IPMI), internal intelligent platform management (IPMB), external connecting additional IPMI-enabled systems. operates autonomously; critical sensors events monitored logged even processor operating system management software available. IPMI defines common interface message-based protocol accessing platform management hardware. This reduces improving server platform management functionality compatibility while de-coupling hardware software. This allows hardware advances without impacting server management software.
Pentium XeonProcessor Server Management Guide Pentium Xeon processor interfaces PRIOM, Scratch EEPROM thermal sensor baseboard through SMBus interface. SMBus, which two-wire interface subset industry-standard serial bus, compatible with IPMI private management interface protocol. This allows seamless, low-cost connection management components. major building blocks IPMI manageable platforms are:
Baseboard Management Controller (BMC): micro-controller connected
platform management components system through private bus, typically SMBus, other direct connection. controller operates autonomously, providing automatic monitoring recovery functions independent system processors, system software, operating system. This controller typically mapped device system interfacing with central processing unit through bus. baseboard management controller firmware either download-able permanently resident BMC.
System Interface Ports: Typically I/O-mapped interface bus. This
provides standardized registers that provides communication between instrumentation software platform management hardware.
System Management Software (SMS): Software executing system that
interprets management application requests retrieve management information management parameters. addition providing interface platform management hardware, system management software typically provides access management information from BIOS, add-in cards, operating system, well.
Private Management (PMB): Means which system management software
communicates with manageable devices; typically SMBus. Access manageable devices accomplished establishing command communication with through system interface ports. interprets requests from system management software performs requested operation targeted Private Management device.
Sensors: Voltage, temperature speed sensors typical data-retrieving devices
used software management properly control operating environment, provide failure prevention fault detection. IPMI, access sensors abstracted behind message-based interface that isolates system management software from hardware. example, sensor reading, system management software sends `Get Sensor Reading' command management controller, rather than performing low-level access directly monitoring hardware.
Pentium XeonProcessor Server Management Guide
Figure outlines example block diagram hardware interconnects managed server platform
System Cache Processor core Thermal Sensor PIROM Scratch EPROM Voltage, Temperature, Sensors IPMB Power Button Chassis Intrusion Private Management (SMbus)
Cache Processor core Thermal Sensor PIROM Scratch EPROM
Reset Button
Cache Processor core Thermal Sensor PIROM Scratch EPROM
Baseboard Management controller (BMC)
System Event
sideband signals
Cache Processor core Thermal Sensor PIROM Scratch EPROM System Controller North Bridge Peripheral controller South Bridge
Figure Example Block Diagram Hardware Interconnects Managed Server Platform
Pentium XeonProcessor Server Management Guide
Pentium® Xeon Processor Manageability Features
Pentium® Xeonprocessor maintains management features offered previous generations processors [system management mode (SMM), functional redundancy checking (FRC), power states clock control (halt, stop grant sleep states)], advances processor manageability integrating following management features: System Management Processor Information Scratch EEPROM Thermal Sensor Devices
Pentium Xeon processor, with initial core frequencies MHz, incorporated system management architectures that lends itself improve server platform RASUM. Server RASUM directly impacted accuracy parameters chosen monitoring manage processors' operating environment. Server platforms based Pentium Xeon processor enable creation management software firmware that automatically configure monitoring hardware based parameters obtained from each processor. These parameters programmed into PIROM during manufacturing test, closely matching each processor's characterized limitations. This ensures highly efficient reliable operating environment. manager ensure reliable, improved up-time decrease time-to-repair deploying server platform management that monitors system provides alerts once system parameters begin drift range. Automatic recovery actions provide information about cause failures clearly identify failure unit. Timely accurate component replacement eliminates opportunity user misconfigure system. This information obtained closely monitoring errors generated internally system bus, monitoring abnormal variations core ambient temperature, monitoring abnormal variations voltage regulator modules supplying voltages processor core cache modules. Integration management components Pentium Xeon processor cartridge enhances data accuracy lower cost. Pentium Xeon processor-based server platforms maintain operating environment within factory specifications, characterized individual processor. This includes: Processor core temperature Processor voltage requirement Processor voltage tolerance Processor core frequency Cache size Cache voltage requirement Cache voltage tolerance
Pentium XeonProcessor Server Management Guide Pentium Xeon processor enables system management software utilize PIROM information generating databases, which enhances inventory control tracking networked server platform configuration. This data includes: S-spec/QDF number Processor core family Processor core model Processor core stepping Cache/tag stepping Cartridge revision Substrate revision software Processor part number
This information also used automatically configure processor voltage, temperature, frequency monitoring match specified operating ranges. Products that take advantage this capability eliminate manual configuration these ranges part system integration field upgrades.
Processor Core Thermal Diode
SMBus Processor Information PIROM Thermal Sensor Device
Scratch EPROM
SMbus Write Protec SMBDATA, SMBCLK SA0, SA1, SMBALERT
Figure Block Diagram Pentium XeonProcessor Management Components
Pentium XeonProcessor Server Management Guide
System Management Mode (SMM)
feature preserved from previous generations Intel processors. Server platform designers choose various system management applications. example might error recovery mechanism. event detected internal errors, address parity errors system multi-bit data errors, routine deployed identify source error, error, disable malfunctioning hardware pieces. Another flush processor data cache content attempt preserve data ailing processor.
Functional Redundancy Checking (FRC)
Functional Redundancy Checking (FRC) allows Pentium Xeon processors configured pair, with processor acting master other checker. pair operates single processor, increasing system fault detection data integrity. case mismatch between processors, checker processor asserts FRCERR. This triggers master processor issue Machine Check Exception (MCE), which results software fault detection prevention mechanism possible recover from error. When this condition occurs, system management choose alert system administer system management instrumentation tools.
4.3.0 Power States Clock Control
Pentium Xeon processor allows three power-down states: HALT Stop-Grant Sleep
System management hardware take advantage these features implement temperature control logic purpose monitoring processor's core (via processor thermal sensor cartridge), cartridge, ambient temperatures. Once system management alerted abnormal temperature rise, management solution choose start processor power-down sequence and/or activate backup cooling system prevent damage cartridge. HALT Stop-Grant states, processor continues monitor system activities respond snoops. system management recovery mechanism choose flush content cache cartridge while rest unit attempts stabilize cartridge's thermal environment. this way, processor up-time improved, enhancing chances complete data recovery. multi-stage power-down sequencing adopted Pentium Xeon processor outlined following sections.
4.3.1 Auto-Halt Power-Down State
first power-down state entered executing HALT instruction. this state, while processor halted, continues snoop internal cache, allowing normal system operation. Depending stability system temperature, system management choose bring processor back normal operating environment issuing System Management Interrupt (SMI), choose enter lower level power state going through stop-clock/stop-clock acknowledge protocol, entering stop-grant state.
4.3.2 Stop-Grant State
Stop-Grant state entered asserting Stopclk# input receiving Stop-Clock Acknowledge from processor. This state entered from either normal operating mode from Auto HALT power-down state. This second-level power-down state where processor continues snoop internal cache allow system operation. case continuous temperature instability, system management software choose enter Sleep state. This preventive measure protects processor from permanent damage.
Pentium XeonProcessor Server Management Guide
4.3.3 Sleep State
This lowest-power state which processor maintains context. Sleep State only entered from Stop-Grant state. Since this state processor longer snoops internal cache ensure proper system operation, system management software must first flush processor's cache prior entering this state. Once system temperature stabilized, system management recovery mechanism bring processor back normal operating state, following same state transition protocol reverse.
System Management (SMBus)
Pentium Xeon processor incorporates SMBus interface, which allows access management components such PIROM, Scratch EEPROM thermal sensor residing processor substrate. This addition major enhancement Pentium Xeon processor cartridge, which provides mission-critical data system management software, enabling implementation advanced instrumentation superior RASUM. SMBus enables thermal monitoring, PIROM access, Scratch EEPROM access, common two-wire interface.
4.4.1 Processor Information (PIROM)
PIROM resides substrate Pentium Xeon processor, interfacing baseboard SMBus. PIROM contains detailed information about processor cartridge; parameters such Thermal Reference Byte determined during manufacturing burning test. Thermal Reference Byte closely matches each processor's thermal characteristics, which allows implementation efficient monitoring logic, further prolonging system up-time. following sections, contents PIROM discussed their applications management environment explored. addition PIROM, Pentium Xeon processor cartridge facilitates implementation superior instrumentation accurate fault detection prevention mechanisms component cartridge levels. PIROM content used Accurately configure platform frequency, thermal monitoring, voltage settings. Implement voltage monitoring logic higher degrees accuracy lower cost. Provide software-readable component type revision information that used inventory asset management. Provide software-readable component type revision information that used verify that supported processor versions being used system. Provide software-readable component type revision information that used verify that appropriately matched processors being used multiprocessor system.
Provide component authentication which preventive measure against manufacturing installation flaw.
Pentium XeonProcessor Server Management Guide
4.4.1.1 PIROM Processor Data
PIROM processor information provides information identifying cartridge specifications characteristics that benefit system management areas asset management, configuration management, server management, inventory management. Data contained this segment PIROM include: Engineering sample processor versus production processor S-spec Qualification Detail Form (QDF) number Checksum
These data identify processor core either engineering sample, with Qualification Detail Form (QDF) number along with specification revision production silicon. Management tools PIROM processor data closely match installed processors server platform. PIROM processor data used inventory configuration management, outlining detail information, such S-spec, Pentium Xeon processor cartridges installed. checksum byte validates accuracy reliability data programmed this segment PIROM.
4.4.1.2 PIROM Core Data
PIROM core data provides information identifying core specifications characteristics that benefit system management areas asset management, configuration management, performance management, inventory management. PIROM core contains: Processor core type Processor core family Processor core model Processor core stepping Maximum core frequency Core voltage I.D. Core voltage tolerance, high Checksum
PIROM core data outlines processor type, family, model stepping, this similar data obtained executing CPU-ID instruction. Such data helpful authenticating processor core installed cartridge. PIROM data identifying maximum core frequency used accurately configure system's clock circuitry. server platforms where switches used configure clock circuitry, accessing PIROM allows automatic configuration eliminates human intervention. PIROM core data enables additional means cross checking installed processor's clock rating, assisting configuration management ensuring consistent usage installed processors. PIROM data core Voltage (VID), millivolts, enables dynamic monitoring processor core voltage. Including processor core voltage requirement enables monitoring logic function higher degree accuracy comparison mechanisms adopted past. benefits closely monitoring core voltage implementation failure detection mechanism, targeting Voltage Regulating Module (VRM). This preventive approach ensuring that cartridge continuously operates within characterized environment, improving system reliability availability. cost voltage monitoring logic improve delegating this task management software, versus previous implementations that connects signals detection logic. system administrator choose stepping information identify cartridges ready upgrade replaced, either because obsolescence design improvements. multiprocessor environment, this information used check consistent (matched) stepping among installed
Pentium XeonProcessor Server Management Guide processors. checksum byte validates accuracy reliability data programmed this segment PIROM.
4.4.1.3 PIROM Cache Data
PIROM Level (L2) cache data provides information about cartridge cache specification characteristics. This information benefits system management areas asset management, configuration management, performance management, inventory management. data this segment PIROM includes: Level cache size Number synchronous components Level cache voltage I.D. Level cache voltage tolerance, high Cache/tag stepping I.D. Checksum
PIROM cache data size helpful authenticating cache sizing algorithms, implemented sizing testing cache during Power-On Self-Test (POST). Such authentication provide early indication cache malfunctioning. PIROM cache data additional means crosschecking installed processors' cache size stepping information. PIROM data cache (resolution millivolts), enables dynamic monitoring cache voltage. Including cache voltage requirement enables monitoring logic function higher degree accuracy, compared mechanisms adopted past. benefit closely monitoring cache voltage implementation failure detection mechanism, targeting VRM. This preventive approach ensuring that cartridge continuously operates within characterized environment, improving system reliability availability. returning this information voltage, system software does need compute operating voltage tolerance (range) values doing table lookup values. This isolates software case changes specification. voltage monitoring logic implementation cost improve delegating this task management software, versus previous implementations that connected signals detection logic. This information eliminates need bringing lines into platform management subsystem, which save significant amount wiring space multiprocessor system board. Lastly, system administrator choose Cache/TAG stepping identify cartridges necessary upgrade obsolescence design improvements. checksum byte validates accuracy reliability data programmed this segment PIROM.
4.4.1.4 PIROM Cartridge Data
PIROM cartridge cache data provides information identifying cartridge specification characteristics that benefits system management areas asset management, inventory management configuration management. This includes: Cartridge revision Substrate revision Checksum
PIROM cartridge data provides means cross-checking cartridge substrates installed server platform ensuring uniform installation. This information also used instrumentation platform configuration management, well inventory control system management. System administrators choose this data identifying cartridges required upgrade
Pentium XeonProcessor Server Management Guide obsolescence design improvements. checksum byte validates accuracy reliability data programmed this segment PIROM.
4.4.1.5 PIROM Part Numbers Data
PIROM part number data provides information identifying cartridge specification characteristics that benefit system management, asset management, security management configuration management. This data includes: Processor part number Processor I.D. Processor electronic signature Checksum
PIROM part number information provides means cross-checking product's part number This data provides detailed visibility bills material used each cartridge, enabling manager certain cartridges eliminate others. electronic signature unprecedented feature added Pentium Xeon processor cartridge that enables wide variety management-related implementations. electronic signature unique data each Pentium Xeon processor. signature provided processor inventory management asset tracking. signature programmed into PIROM during manufacturing test. Value-added security management features make this data, along with scratch EEPROM cartridge, track each processor specific baseboard prevent unauthorized removal cartridge from platform. checksum byte validates accuracy reliability data programmed this segment PIROM.
4.4.1.6 PIROM Thermal Reference Data
PIROM thermal reference data provides information that identifies cartridge specification characteristics that benefits system management areas reliability configuration management. data includes: Processor thermal reference byte Checksum
Thermal Reference Byte identifies processor's maximum allowable operating temperature, with high degree accuracy, 1°c. This value determined each Pentium Xeon processor during manufacturing test. This data obtained reading thermal sensor while processor operating high-power test environment, with thermal plate raised maximum specified temperature. system management software this data configure thermal sensor device cartridge (details 4.4.3). Availability thermal reference data ensures that each processor operating within factory-tested, worst-case temperature thus protecting cartridge from over temperature hazards. checksum byte validates accuracy reliability data programmed this segment PIROM.
Pentium XeonProcessor Server Management Guide
4.4.1.7 PIROM Features Data
PIROM feature data provides information identifying cartridge features enabled PIROM. system management software uses these bytes ensure validity data each segments PIROM. Processor core features flag Cartridge feature flags: Electronic signature present Thermal sensor present Thermal reference byte present Scratch EEPROM present cache present Checksum
System management software must these data validate PIROM content each segments. checksum byte validates accuracy reliability data programmed this segment PIROM.
Pentium XeonProcessor Server Management Guide
Header
Byte
Processor
Core
Cache
Cartridge
Part Numbers
Thermal Ref.
Features
Bits
Function Data Format Revision EEPROM Size Processor Data Address Processor Core Data Address Cache Data Address Cartridge Data Address Part Number Data Address Thermal Reference Data Address Feature Data Address Other Data Address Reserved Checksum S-spec/QDF Number Sample/Production Reserved Checksum Processor Core Type Processor Core Family Processor Core Model Processor Core Stepping Reserved Maximum Core Frequency Core Voltage Core Voltage Tolerance, High Core Voltage Tolerance, Reserved Checksum Reserved Cache Size Number SRAM Components Reserved Cache Voltage Cache Voltage Tolerance, High Cache Voltage Tolerance, Cache/Tag Stepping Reserved Checksum Cartridge Revision Substrate Revision Software Reserved Checksum Processor Part Number Processor Processor Electronic Signature Reserved Checksum Thermal Reference Byte Reserved Checksum Processor Core Features Flags Cartridge Feature Flags
Number Devices Chain Reserved Checksum
Notes 4-bit digits Size bytes Pointer byte (00h, present) Pointer byte (00h, present) Pointer byte (00h, present) Pointer byte (00h, present) Pointer byte (00h, present) Pointer byte (00h, present) Pointer byte (00h, present) Pointer byte (00h, present) Reserved future byte checksum 8-bit ASCII characters Sample only Reserved future byte checksum From CPUID From CPUID From CPUID From CPUID Reserved future 16-bit binary number Voltage Edge finger tolerance Edge finger tolerance Reserved future byte checksum Reserved future 16-bit binary number Kbytes 4-bit digit Reserved future Voltage Edge finger tolerance Edge finger tolerance 4-bit digit Reserved future byte checksum Four 8-bit ASCII characters 2-bit revision number Reserved future byte checksum Seven 8-bit ASCII characters 8-bit ASCII characters 64-bit unique identification number Reserved future byte checksum Reference byte Thermal Sensor Reserved future byte checksum From CPUID Electronic Signature Present Thermal Sensor Present Thermal Reference Byte Present Scratch EEPROM Present Core Present Cache Present 4-bit digit Reserved future byte checksum
Table Processor Information Data Position Format
Pentium XeonProcessor Server Management Guide
4.4.2 Scratch EEPROM
presence scratch EEPROM (128 bytes EEPROM) Pentium Xeon processor allows system management software store data processor cartridge. Scratch EEPROM interfaces system management controller through SMBus. write-protect cartridge-edge fingers used controller baseboard write-protect data scratch EEPROM. EEPROM used store unique asset processor. example, system management software choose store encoded data that allows implement tracking mechanism processors specific baseboard. following flow diagram outlines this implementation, which attempt prevent unauthorized removal cartridge from baseboards:
System Power
ctronic
EEPROM
rform cific EEPROM inst nform Syste Administra
sugge sting urity Environme
EEPROM
Match
EEPROM Continue
Other uses scratch EEPROM include: Keeping file last diagnostic cartridge Maintaining record processor micro-code updates Keeping track processor errors, i.e., errors detected Level cache inside processor Maintaining file each processor's up-time, which updated management software running monitoring power cycles.
Such error-logging mechanism used detect symptoms ailing processors managers eliminate unreliable equipment. example, processor replaced part system repair, there question whether processor indeed faulty trouble found), could `tagged' having been part previous replacement operation. faulty system, collaborating processor then pin-pointed checking history log-file. This type record-keeping allows managers decrease time-to-repair, routinely perform system diagnostics, replace units required.
4.4.3 Thermal Sensor Device
Pentium Xeon processor includes thermal sensor substrate cartridge. This device interfaces with system management controller through SMBus. This approach benefits processor thermal management providing improved degrees accuracy correlation with
Pentium XeonProcessor Server Management Guide processor temperature. Such implementation eliminates discrete components from baseboard achieves consistent performance lower cost. thermal sensor connected thermal diode processor core. thermal sensor provides earliest indication, asserts SMBALERT# abnormal thermal variation early indications possible violation processor's thermal operating environment. system designer choose SMBALERT# signal assertion invoke backup cooling mechanism initiate cool-down sequence low-power states (Halt, Stop-Grant, Sleep). This effort increase system up-time provide time data recovery graceful processor shutdown. Figure illustrates block diagram thermal diode thermal sensor processor. should noted that thermal diode integrated processor core, thermal sensor does report thermal status cache components. prevent scenario where processor core temperature lower temperature than cache, cartridge specifications must used overriding specification cases. thermal sensor values, times, guarantees represent cartridge temperature.
Pentium XeonProcessor Server Management Guide
Pentium® Xeon Processor Manageability Benefits
Pentium® Xeonprocessor designed with manageability needs real-world managers mind. These typically include: easy comprehensive asset management. lack simple tools gather inventory data creates major roadblock most departments. they upgrade hundreds thousands desktops servers they know what there? easier support. They need quick accurate repairs, implement errortracking prevention mechanisms, install user- friendly hardware inexperienced operators resolving issues quickly. Eliminating unreliable equipment.
Capture performance data doing capacity planning. This needed eliminate unreliable equipment, plan expansions based platform performance, system bandwidth performance monitoring. Capture dynamic system scanning data last minutes platform's operation prior failure.
Pentium® XeonProcessor Fits Common Platform Architecture
Addition SMBus Pentium Xeon processor cartridge, allows seamless integration with IPMI architecture, through private management bus. communication standard serial protocol readily supported using other management hardware implementations. Using Pentium Xeon processor, together with IPMI architecture, materializes benefits common platform architecture-based system management implementation. This allows: Flexible access platform management information Industry open implementation easier server-platform instrumentation De-coupling server management software from hardware, which enables hardware change without impacting software Reduced development time products enabling remote management
Pentium® XeonProcessor Benefits Asset Management
Server platforms with Pentium Xeon processor provide detailed information about cartridge, which helps manager perform asset tracking Cartridge part-number cartridge built Electronic signature cartridge Cartridge substrate revision Cartridge revision Cartridge cache size Processor core type Cartridge number
Pentium XeonProcessor Server Management Guide This enables managers build extensive database their existing inventory Pentium Xeon processor-based server platforms, re-arrange high-end server platform high performance demanded users detecting nodes which need upgraded serviced.
Pentium® XeonProcessor Benefits Configuration Management
Processor information allows creation configuration manager that inspect installed Pentium Xeon processors given server platform reading back information about cartridge: Core type stepping Maximum core frequency Level cache size Cartridge voltage requirements
configuration manager this information checking installed processors same kind, configured operate maximum clock frequency. This results best system resource optimization. Additional mechanisms deployed alert system administrator inefficient system usage possible processor over-clocking conditions.
Pentium® XeonProcessor Benefits Inventory Management
Server platforms with Pentium Xeon processor provide detailed information about cartridge installed platform, which helps manager determining: Cartridge part-number Cartridge Cartridge Electronic signature Cartridge substrate revision Cartridge revision Cartridge cache size Processor core type Cartridge number
Using this information, managers build extensive database Pentium Xeon processorbased servers, optimizing performance level matching demanding users with most highpowered servers. managers also such database detecting eliminating obsolete components.
Pentium® XeonProcessor Benefits Performance Management
Server platforms with Pentium Xeon processor provide detail information about cartridge installed platform, which enables managers determine: Maximum clock frequency Processor core type cache size
managers choose this data ensure that processors same kind performance being used same node prevent under-utilization processor cartridge.
Pentium® XeonProcessor Benefits Security Management
Pentium Xeon processor cartridge with electronic signature Scratch EEPROM allows creation system management software that ties cartridge specific baseboard. This prevents
Pentium XeonProcessor Server Management Guide unauthorized replacement cartridge from nodes restricted operating environments, tool aiding warranty tracking repair.
Pentium® XeonProcessor Benefits Server Management
Pentium Xeon processor cartridge provides detailed information about operating characteristics, enabling management hardware detect prevent failure conditions allowing safe fail-over, impacting server RASUM. mentioned, system management enhancement Pentium Xeon processor addresses concepts instrumentation RASUM areas. system management enhancements Pentium Xeon processor dramatically extend enhance existing processor management capabilities, enabling robust methodology monitoring, controlling, managing illustrating processor's operating environments, features characteristics. With strong instrumentation capabilities built into server platforms with Pentium Xeon processor, departments able accurately maintain track server network components, implementing upgrade planning eliminating unreliable equipment. Server platforms with Pentium Xeon processor numerous failure prevention mechanisms deliver improved reliable system operation. Pentium Xeon processor meets advance requirements well-managed server platform providing detailed information about itself, enhancing instrumentation levels never achieved preceding processors. Pentium Xeon processor designed with manageability mind.
Pentium XeonProcessor Server Management Guide
APPENDIX
Management Initiatives Background
first management initiative primarily focused cross-platform system management first introduced Desktop Management Task Force(DMTF) consortium more than vendors established 1992 committed make computing platforms easier use, configure manage. DMTF developed Desktop Management Interface (DMI) focusing defining standardizing software aspects system management implementation. Earlier protocols, such Simple Network Management Protocol (SNMP), complemented DMI. DMI-to-SNMP mapping software available that allows DMI-based instrumentation cleanly integrated into SNMP-based management environments. Since then additional system management initiatives, i.e., Wired Management (WfM), Web-Based Enterprise Management (WBEM), Zero Administration Windows Initiative(ZAW) were formed with common focus utilizing system management primary means reducing Total Cost Ownership (TCO). first server management specification aimed creating industry open hardware implementation managed platform "Intelligent Platform Management interface" IPMI. IPMI specification defines common interface message-based protocol accessing platform management hardware. This helps reduce improving server platform management functionality compatibility, while de-coupling hardware implementation from software. IPMI, industry open based implementation, allows hardware advancements implemented without impacting server management software.
A.2.0 Manageability Management Areas
Manageability defined technologies products enhance server RASUM (Reliability, Availability, Serviceability, Usability Manageability), thus increasing up-time reducing cost deployment, ownership administration. Manageability rests having range products, systems system components working together provide information interfaces that system management software, management applications operating systems improve RASUM. Manageability includes asset management, configuration management, inventory management, network management, performance management, security management, server management system management.
A.2.1 Asset Management
Asset management process maximizing assets produce revenue while minimizing overall costs. Manageable Server platforms contribute asset management capturing inventory tracking information, enabling organizations analyze cost variables better discern return investment (ROI) their technology purchases. data gathered manageable systems assist asset management issues such inventory consolidation rationalizing license issues, leasing considerations, analyzing training costs, analyzing software upgrades volume purchasing plans, evaluating cost-efficiency outsourcing improving warranty usage.
A.2.2 Configuration Management
Configuration management deals with tasks such optimizing user's configuration given task, discovering what hardware components Server platform ensure compatibility among them. This includes features that prevent detect system mis-configuration.
Pentium XeonProcessor Server Management Guide
A.2.3 Inventory Management
Inventory management addresses need identify system software components system. Instrumented platforms show complete inventory components subsystem's information that highly useful diagnosing problems remotely, maximizing assets optimizing configurations performance levels. important inventory information providing Field Replaceable Unit (FRU) data that assists rapid replacement modules during servicing. This turn improves system up-time decreasing time-to-repair.
A.2.4 Network Management
Network management three major components managing computing environment. Network management includes performance, configuration, security, failure analysis repair infrastructure components such switches, routers, bridges gateways LAN,WAN Internet/Intranet. Network management related, different management area than "System Management" that focuses management computer system hardware applications rather than network.
A.2.5 Performance Management
Performance management analyzes usage pattern attempts optimize system responsiveness network throughput. This enables remotely monitor utilization pinpoint user, application process that generating excessive demand.
A.2.6 Security Management
Security management addresses need protect systems data from unauthorized access. Examples include encryption, authentication, firewalls.
A.2.7 Server Management
Server management aims optimize RASUM performance network servers includes monitoring such factors disk capacity user accounts. Server hardware management includes reliability failure tolerance features that commonly found desktop systems. This includes features such multiprocessor monitoring recovery features, redundant cooling (fan) power supply management, redundant driver array (RAID) management, multiple system board management field replaceable unit identification, multiple chassis management.
A.2.8 System Management
System management refers controlling, configuring, installing monitoring applications, servers clients distributed computing environment.
Pentium XeonProcessor Server Management Guide
APPENDIX
Example Software Stack
architecture defines following software stack between application software managed components. manageable feature specified standard ASCII text file format called Management Information Format (MIF). Additional information obtained from Desktop Management Task Force their site http://www.dmtf.org. software stack illustration following:
Management console
Management Application(MA)
Management Application
(API)
Management Interface (MI)
(Local program) Service Provider (SP) Dbase
(API) Component Interface (CI)
Pentium Xeon(TM) Processor
Pentium Xeon(TM) Processor
Pentium Xeon(TM) Processor
Pentium Xeon(TM) Processor
Other Manageable products,i.e. (O.S., Software Application, Hardware products)
Figure Flow diagram software stack
Management Application (MA): Program that initiates management requests. uses
Service provider (SP) access data from Component Instrumentation Manager. also defines Management Information Format(MIF) where operating systems management applications make instrumentation purposes. application specific with following common usage: Graphical display system's manageable components Issue detailed alert pending failures Watch indicators potential security breach Provide configuration dynamic operational status determine system health
Management Interface(MI): that provides interface between Service Layer
management applications allows these applications access, manage control platform components. offers consistent interface management application various mechanisms used obtain information from products components within platform.
Pentium XeonProcessor Server Management Guide
Service Provider(SP): Program that resides platform responsible activities. This layer collects management information from products (whether system hardware, peripherals software, store that information DMI's database passes management applications requested. Component Interface (CI): that handles communication between manageable elements
DMI's Service Layer. gives hardware software components common method describing their management attributes features.
UNITED STATES, Intel Corporation 2200 Mission College Blvd., P.O. 58119, Santa Clara, 95052-8119 Tel: 765-8080 JAPAN, Intel Japan K.K. Tokodai, Tsukuba-shi, Ibaraki-ken 300-26 Tel: 81-29847-8522 FRANCE, Intel Corporation S.A.R.L. Quai Grenelle, 75015 Paris Tel: 1-45717171 UNITED KINGDOM, Intel Corporation (U.K.) Ltd. Pipers Way, Swindon, Wiltshire, England Tel: 1-793-641440 GERMANY, Intel GmbH Dornacher Strasse 85622 Feldkirchen/ Muenchen Tel: 89/99143-0 HONG KONG, Intel Semiconductor Ltd. 32/F Pacific Place, Queensway, Central Tel: +852 2844-4555 CANADA, Intel Semiconductor Canada, Ltd. Attwell Drive, Suite Rexdale, Ontario Tel: +416 675-2438
Other recent searches
PDS-3 - PDS-3 PDS-3 Datasheet
LRPS-2-25+ - LRPS-2-25+ LRPS-2-25+ Datasheet
LP3965 - LP3965 LP3965 Datasheet
GA3206 - GA3206 GA3206 Datasheet
GP523 - GP523 GP523 Datasheet
DP8051 - DP8051 DP8051 Datasheet
AN1766 - AN1766 AN1766 Datasheet
1C3613 - 1C3613 1C3613 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
