Digitally Controlled Programmable-Gain INSTRUMENTATION AMPLIFIER
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PGA202/203
Digitally Controlled Programmable-Gain INSTRUMENTATION AMPLIFIER
DIGITALLY PROGRAMMABLE GAINS: DECADE MODEL-PGA202 GAINS 100, 1000 BINARY MODEL-PGA203 GAINS BIAS CURRENT: 50pA FAST SETTLING: 0.01% NON-LINEARITY: 0.012% HIGH CMRR: 80dB TRANSCONDUCTANCE CIRCUITRY COST
APPLICATIONS
DATA ACQUISITION SYSTEMS AUTO-RANGING CIRCUITS DYNAMIC RANGE EXPANSION REMOTE INSTRUMENTATION TEST EQUIPMENT
DESCRIPTION
PGA202 monolithic instrumentation amplifier with digitally controlled gains 100, 1000. PGA203 provides gains Both have CMOS-compatible inputs easy microprocessor interface. Both have inputs transconductance circuitry that keeps bandwidth nearly constant with gain. Gain offsets laser trimmed allow without external components. Both amplifiers available ceramic plastic packages. ceramic package specified over full industrial temperature range while plastic package covers commercial range.
Adjust Filter 5.3pF* Front Logic Circuits
+VIN
Sense VOUT VREF
+VIN
5.3pF* *±20%
Filter
Digital Common
Covered U.S. PATENT #4,883,422 International Airport Industrial Park Mailing Address: 11400 Tel: (520) 746-1111 Twx: 910-952-1111 Cable: BBRCORP Tucson, 85734 Street Address: 6730 Tucson Blvd. Tucson, 85706 Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
©1989 Burr-Brown Corporation
PDS-1006C
PGA202/203
Printed U.S.A. August, 1993
SPECIFICATIONS
ELECTRICAL
+25°C, ±15V unless otherwise noted. PGA202/203AG PARAMETER GAIN Error Nonlinearity Gain Temperature CONDITION 1000 1000 1000 1000 1000 |IOUT Typical Perf. Curve |VOUT 0.05 0.002 0.02 ±(0.5 5/G) 50/G) 250/G 1000 INPUT NOISE Noise Voltage 10Hz Noise Density 10kHz OUTPUT NOISE Noise Voltage 10Hz Density 1kHz DYNAMIC RESPONSE Frequency Response Full Power Bandwidth Slew Rate Settling Time (0.01%) Overload Recovery Time DIGITAL INPUTS Digital Common Range Input Threshold Input Current Input High Voltage Input High Current POWER SUPPLY Rated Voltage Voltage Range Quiescent Current TEMPERATURE RANGE Specification Operating Storage Same PGA202/203AG NOTES: specifications apply both PGA202 PGA203. Values given gain same gain other values interpolated. Measured with load. analog inputs internally diode clamped. Adjustable zero. VNOISE (RTI) INPUT)2 OUTPUT/Gain)2. Threshold voltages referenced Digital Common. From input change gain change. 1000 1000 1000 1000 1000 1000 1000 1000 -VCC 1000 24/G) ±(24 240/G) 900/G 3200 1600 0.25 0.015 0.06 PGA202/203BG 0.08 12/G) ±(12 120/G) 450/G 0.15 0.012 0.04 PGA202/203KP UNITS ppm/°C ppm/°C ppm/°C µV/°C µV/Month µV/V
RATED OUTPUT Voltage Over Specified Temperature Current Impedance ANALOG INPUTS Common-Mode Range Absolute Voltage Impedance, Differential Common-Mode OFFSET VOLTAGE (RTI) Initial Offset 25°C Temperature Offset Time Offset Supply INPUT BIAS CURRENT Initial Bias Current: 25°C 85°C Initial Offset Current: 25°C 85°C
Damage
±VCC
µVp-p nV/Hz µVp-p nV/Hz V/µs
COMMON-MODE REJECTION RATIO
°C/W
PGA202/203
CONFIGURATION
View
+VCC VREF Filter Adjust Digital Common -VCC Sense Filter Adjust
ABSOLUTE MAXIMUM RATINGS
Supply Voltage ±18V Internal Power Dissipation 750mW Analog Digital Inputs ±(VCC 0.5V) Operating Temperature Range: Package -55°C +125°C Package -40°C +100°C Lead Temperature (soldering, 10s) 300°C Output Short Circuit Duration Continuous Junction Temperature 175°C
PACKAGE INFORMATION
MODEL PGA202KP PGA202AG PGA202BG PGA203KP PGA203AG PGA203BG PACKAGE 14-Pin Plastic 14-Pin Ceramic 14-Pin Ceramic 14-Pin Plastic 14-Pin Ceramic 14-Pin Ceramic PACKAGE DRAWING NUMBER(1)
NOTE: detailed drawing dimension table, please data sheet, Appendix Burr-Brown Data Book.
ORDERING INFORMATION
TEMPERATURE MODEL PGA202KP PGA202AG PGA202BG PGA203KP PGA203AG PGA203BG GAINS 100, 1000 100, 1000 100, 1000 PACKAGE Plastic Ceramic Ceramic Plastic Ceramic Ceramic RANGE +70°C -25°C +85°C -25°C +85°C +70°C -25°C +85°C -25°C +85°C OFFSET VOLTAGE (mV) 24/G) 24/G) 12/G) 24/G) 24/G) 12/G)
information provided herein believed reliable; however, BURR-BROWN assumes responsibility inaccuracies omissions. BURR-BROWN assumes responsibility this information, such information shall entirely user's risk. Prices specifications subject change without notice. patent rights licenses circuits described herein implied granted third party. BURR-BROWN does authorize warrant BURR-BROWN product life support devices and/or systems.
PGA202/203
TYPICAL PERFORMANCE CURVES
+25°C, ±15V unless otherwise noted.
GAIN FREQUENCY Gain (dB)
GAIN ERROR FREQUENCY
1000
Gain Error
10-1 10-2
10-3
Frequency (Hz)
Frequency (Hz)
CMRR FREQUENCY 100, 1000
PSRR FREQUENCY
1000
CMRR (dB)
PSRR (dB)
Frequency (Hz)
Frequency (Hz)
INPUT NOISE FREQUENCY
OUTPUT NOISE FREQUENCY
Noise (nV/Hz)
Noise (nV/Hz)
Frequency (Hz)
Frequency (Hz)
PGA202/203
TYPICAL PERFORMANCE CURVES (CONT)
+25°C, ±15V unless otherwise noted.
QUIESCENT CURRENT POWER SUPPLY
INPUT BIAS CURRENT POWER SUPPLY Input Bias Current (pA)
(mA)
Power Supply (±V)
Power Supply (±V)
INPUT RANGE POWER SUPPLY
OUTPUT SWING POWER SUPPLY +25°C
VOUT
-25°C
Power Supply (±V)
Power Supply (±V)
OUTPUT SWING LOAD
SETTLING TIME FILTER CAPACITOR
Settling Time (µs)
1000 Load 1500 2000
VOUT
Filter Capacitor (pF)
PGA202/203
TYPICAL PERFORMANCE CURVES (CONT)
+25°C, ±15V unless otherwise noted.
QUIESCENT CURRENT TEMPERATURE
INPUT BIAS CURRENT TEMPERATURE
Input Bias Current (pA)
(mA)
Temperature (°C)
Temperature (°C)
CURRENT LIMIT TEMPERATURE
SLEW RATE TEMPERATURE
Slew Rate (V/µs)
ILIM (mA)
Temperature (°C)
Temperature (°C)
OUTPUT SWING TEMPERATURE
LARGE SIGNAL RESPONSE
5V/Div
1µs/Div Temperature (°C)
PGA202/203
TYPICAL PERFORMANCE CURVES (CONT)
+25°C, ±15V unless otherwise noted.
PGA202 VOUT
SMALL SIGNAL RESPONSE
5mV/Div
+VCC -VCC
1µs/Div
FIGURE Basic Circuit Connections.
DISCUSSION PERFORMANCE
simplified diagram PGA202/203 shown first page. design consists digitally controlled, differential transconductance front stage using precision buffers classical transimpedance output stage. Gain switching accomplished with novel current steering technique that allows fast settling when changing gains. result high performance, programmable instrumentation amplifier with excellent speed gain accuracy. input stage uses circuit topology that includes buffers give extremely input bias currents. differential input voltage converted into differential output current with transconductance gain selected steering input stage bias current between four identical input stages differing only value gain setting resistor. Each input stage individually laser-trimmed input offset, offset drift, gain. output stage differential transimpedance amplifier. Unlike classical difference amplifier output stage, common-mode rejection limited resistor matching. However, output resistors laser-trimmed help minimize output offset drift. BASIC CONNECTIONS Figure shows proper connections power supply signal. power supplies should decoupled with tantalum capacitors placed close amplifier possible maximum performance. avoid gain errors introduced external components, should connect grounds indicated. resistance sense line (pin VREF line (pin will lead gain error, these lines should kept short possible. also maintain stability, avoid capacitance from output input offset adjust pins.
OFFSET ADJUSTMENT Figure shows offset adjustment circuits PGA202/ 203. input offset output offset both separately adjustable. Notice that because PGA202/203 change between four different input stages change gain, input offset voltage will change slightly with gain. systems using computer autozeroing techniques, neither offset drift major concern, should noted that since input offset does change with gain, these systems should perform autozero cycle after each gain change optimum performance. output offset adjustment circuit, choice buffering very important. needs have output impedance wide bandwidth maintain full accuracy over entire frequency range PGA202/203. these reasons recommend OPA602 excellent choice this application.
+VCC
VOUT 100k OPA602 -VCC +VCC
PGA202
FIGURE Offset Adjustment Circuits.
PGA202/203
GAIN SELECTION Gain selection accomplished application 2-bit digital word gain select inputs. Table shows gains different possible values digital input word. logic inputs referred their separate digital common pin, which connected voltage between minus supply below positive supply. gains internally trimmed initial accuracy better than 0.1%, external gain adjustment required. However, necessary gains increased external attenuator around output stage shown Figure Recommended resistor values certain selected output gains given Table
PGA202 GAIN 1000 ERROR 0.05% 0.05% 0.05% 0.10% GAIN PGA203 ERROR 0.05% 0.05% 0.05% 0.05%
OUTPUT SENSE output sense been provided allow greater accuracy connecting load. attaching this feedback point load load site, drops load currents eliminated since they inside feedback loop. Proper connection shown Figure When more current required, power booster placed feedback loop shown Figure Buffer errors minimized loop gain output amplifier.
OPA633
PGA202
VOUT
TABLE Software Gain Selection.
OUTPUT GAIN
FIGURE Current Boosting Output. OUTPUT FILTERING summing nodes output amplifier have also been made available allow output filtering. placing matched capacitors parallel with existing internal capacitors shown Figure lower frequency response output amplifier. This will reduce noise amplifier, cost slower response. nominal frequency responses some selected values capacitor shown Table III.
TABLE Output Stage Gain Control.
PGA202
VOUT
OPA602
CEXT
PGA202 VOUT
FIGURE Gain Increase with Buffered Attenuator. COMMON-MODE INPUT RANGE Unlike classical three type circuit, input common-mode range PGA202/203 does depend differential input gain. standard three circuit, input common-mode signal must kept below maximum output voltage input amplifier minus final output voltage. example, these amplifiers swing ±12V, then output must restrict input common-mode voltage only circuitry PGA202/203 such that commonmode input range applies either input regardless output voltage.
CEXT
FIGURE Output Filtering.
CUTOFF FREQUENCY 1MHz 100kHz 10kHz None 47pF 525pF
TABLE III. Output Frequency Filter Capacitors.
PGA202/203
INPUT CHARACTERISTICS Because PGA202/203 have inputs, bias currents drawn through input source resistors have negligible effect accuracy. picoamp currents produce more than microvolts through megohm sources. inputs also internally diode clamped supplies. Thus, input filtering input series protection easily achievable. return path input bias currents must always provided prevent charging stray capacitance. Otherwise, amplifier could wander saturate. resistor from input common will return floating sources such thermocouples AC-coupled inputs (see Applications Section, Figures DYNAMIC PERFORMANCE PGA202 PGA203 fast-settling input programmable gain instrumentation amplifiers. Careful attention minimize stray capacitance necessary achieve specified performance. High source resistance will interact with input capacitance reduce speed overall bandwidth. Also, maintain stability, avoid capacitance from output input offset adjust pins. Applications with balanced source impedance will provide best performance. some applications, mismatched source impedances required. impedance negative input exceeds that positive input, stray capacitance from output will create negative feedback improve stability circuit. however, impedance positive input greater, then feedback stray capacitance will positive instability result. degree positive feedback will, course, depend source impedance imbalance well board layout operating gain. addition small bypass capacitor about 50pF directly across input terminals PGIA will generally eliminate instability arising from these stray capacitances. errors source imbalance will also reduced addition this capacitor. PGA202 PGA203 designed fast settling response changes either input voltage gain. bandwidth settling times mostly determined output stage therefore independent gain, except highest gain PGA202 where other factors input stage begin dominate.
PGA203 VOUT
Digital OptoCoupler
FIGURE Isolated Programmable Gain Instrumentation Amplifier.
PGA202 VOUT
Down
2-Bit Up/Down Counter
Dual Comparator
FIGURE Auto Gain Ranging.
APPLICATIONS
addition general purpose applications, PGA202/203 designed handle important demanding classes applications: inputs with high source impedances, rapid scanning data acquisition systems requiring fast settling time. Because user access output sense output common pins, current sources also constructed with minimum external components. Some basic application circuits shown Figures through
VOUT
PGA202
Gain Control
FIGURE AC-Coupled Differential Amplifier Frequencies Above 0.16Hz.
PGA202/203
VOUT
PGA202
VOUT
PGA203
Gain Control
VOUT
PGA202
FIGURE Floating Source Programmable Gain Instrumentation Amplifier.
FIGURE Programmable Differential In/Differential Amplifier.
OPA27
+VCC
VOUT
IOUT
PGA203
PGA203
OPA27
Gain Control
Gain Control
FIGURE Noise Differential Amplifier with Gains 100, 200, 400, 800. FIGURE Programmable Current Source.
PGA203 VOUT
GAIN 1000 2000 4000 8000
PGA202
FIGURE Cascaded Amplifiers.
PGA202/203
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