Volt 16-Mbit Mask with Page Mode organization (byte mode) (word m
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MX23C1611
Volt 16-Mbit Mask with Page Mode
organization (byte mode) (word mode) Fast access time Random access: 100ns (max.) Page access: 50ns (max.) Page Size double words page Current Operating: 60mA Standby: 100uA Supply voltage 5V±10% Package (500mil) PDIP (600mm) TSOP (20mm 12mm)
ORDER INFORMATION
Part Access Page Access Package Time MX23C1611MC-10 100ns MX23C1611MC-12 120ns MX23C1611PC-10 100ns MX23C1611PC-12 120ns MX23C1611TC-10 MX23C1611TC-12 100ns 120ns Time 50ns 60ns 50ns 60ns 50ns 60ns PDIP PDIP TSOP TSOP
DESCRIPTION
Symbol A0~A19 D0~D14 Function Address Inputs Data Outputs (Word Mode)/ Address (Byte Mode) Chip Enable Input Output Enable Input Word/ Byte Mode Selection Power Supply Ground Connection
CONFIGURATION
BYTE D15/A-1
PDIP
BYTE D15/A-1
D15/A-1 Byte
MX23C1611
MODE SELECTION
P/N:PM0241
Byte
MX23C1611
D31/A-1 Output Input
D0~D15 High High D0~D7 D0~D7
D16~D31 High High D8~D15 High
Mode Word Byte
Power Stand-by Active Active Active
REV. 2.1, JUL. 2001
MX23C1611
TSOP (Normal Type)
BYTE D15/A-1
MX23C1611 (Normal Type)
BLOCK DIAGRAM
A0/(A-1) BYTE Address Buffer Memory Array Page Buffer Page Decoder Word/ Byte Output Buffer D15/(D7)
Note: Chip Enable active input activates chip's control logic, Address buffer Page buffer.
P/N:PM0241
REV. 2.1, JUL. 2001
MX23C1611
ABSOLUTE MAXIMUM RATINGS
Item Voltage Relative Ambient Operating Temperature Storage Temperature Symbol Topr Tstg Ratings -1.3V VCC+2.0V (Note) -40° -65° 125°
Note: Minimum voltage input pins -0.5V. During voltage transitions, inputs undershoot -1.3V periods 20ns. Maximum voltage input pins VCC+0.5V. During voltage transitions, input overshoot VCC+2.0V periods 20ns.
CHARACTERISTICS 70°C, 5V±10%)
Item Output High Voltage Output Voltage Input High Voltage Input Voltage Input Leakage Current Output Leakage Current Operating Current Standby Current (TTL) Standby Current (cmos) Input Capacitance Output Capacitance Symbol ICC1 ISTB1 ISTB2 COUT MIN. 2.4V 2.2V -0.3V MAX. 0.4V VCC+0.3V 60mA 100uA 10pF 10pF Conditions -1.0mA 2.1mA
100ns, output open CE>VCC-0.2V 1MHZ 1MHZ
CHARACTERISTICS 70°C, 5V±10%)
Item Read Cycle Time Address Access Time Chip Enable Access Time Page Mode Access Time Output Enable Time Output Hold After Address Output High Delay Symbol tACE 23C1611-10 MIN. MAX. 100ns 100ns 100ns 50ns 50ns 10ns 20ns 23C1611-12 MIN. MAX. 120ns 120ns 120ns 60ns 60ns 10ns 20ns
Note:Output high-impedance delay (tHZ) measured from going high, this parameter guaranteed design over full voltage temperature operating range tested.
P/N:PM0241 REV. 2.1, JUL. 2001
MX23C1611
Test Conditions
Input Pulse Levels Input Rise Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 2.4V 10ns 1.5V 0.8V 2.0V Figure
(load)=-1mA DOUT (load)=2.1mA
C<100pF
Note: output loading present tester load board. Active loading used under software programming control.
TIMING DIAGRAM
RANDOM READ
Output loading capacitance includes load board's stray capacitance.
tACE
DATA
VALID
VALID
VALID
PAGE READ
A3-A19
VALID
(A-1),A0,A1,A2
1'st
2'nd VALID VALID
3'rd
DATA
VALID
Note: enable. Page size words 16-bit mode, bytes 8-bit mode.
P/N:PM0241
REV. 2.1, JUL. 2001
MX23C1611
PACKAGE INFORMATION
42-PIN PLASTIC DIP(600 mil)
P/N:PM0241
REV. 2.1, JUL. 2001
MX23C1611
44-PIN PLASTIC
P/N:PM0241
REV. 2.1, JUL. 2001
MX23C1611
48-PIN TSOP
P/N:PM0241
REV. 2.1, JUL. 2001
MX23C1611
Revision History
Revision Description tACE->1000ns changes tACE->100ns Characteristics: 10ns Typing error correction Modify Package Information Page P5~7 Date JUL/20/1998 FEB/01/1999 JAN/18/2000 JUL/18/2001
P/N:PM0241
REV. 2.1, JUL. 2001
MX23C1611
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