Semiconductor MSM6895/6896 Semiconductor Multi-Function CODEC

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Semiconductor MSM6895/6896 Semiconductor Multi-Function CODEC

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E2U0022-28-81
Semiconductor MSM6895/6896
Semiconductor Multi-Function CODEC
This version: Aug. 1998 MSM6895/6896 Previous version: Nov. 1996
GENERAL DESCRIPTION
MSM6895/MSM6896, developed especially low-power multi-function applications ISDN telephone terminals, single power supply CODEC devices. devices consist analog speech paths directly connectable handset, calling circuit directly connectable piezosounder, push-button scanning interface between push buttons control processors, dial tone generator, B-channel interface, CODEC, processor interface. functions controlled 8-bit data bus.
FEATURES
Single Power Supply Power Dissipation Power Mode Typ. Max. CODEC Power Down Mode Typ. Max. compliance with ITU-T's companding m-law MSM6895 A-law MSM6896 Transmission clocks Continuous 128, Burst 192, 384, 768, 1536, 2048 Built-in Built-in Reference Voltage Supply Ringing Tone Controlled processor, modes Ringing Tone Combination Controlled processor, modes Information Tone Controlled processor, modes Built-in Tone Generator B-Channel Selectable General Latch Output Speech path Control bits Watchdog Timer Scanning Output bits Input bits Direct Connection Handset Built-in Preamplifier Loudspeaker Handfree Interface Digital Analog Interface phone-conference speech paths Package: 80-pin plastic (QFP80-P-1420-0.80-BK) (Product name MSM6895GS-BK) (Product name MSM6896GS-BK)
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Semiconductor
MSM6895/6896
BLOCK DIAGRAM
TMX1I TPAO TPBI MLDY TMX2I TEST CK1536 TEST CHANNEL SELECTOR CK64 F-TONE R-TONE RMO0
TPAI
CODEC AOUT
HANDSET
RMO1
DTMF TONE INTF.
RESET 8BIT Data INTT TIME 4BIT LOSS
S-TONE
LATCH
BUZZER SGGEN VSGC SCANNING OUTPUT INTF. DATA INPUT CONT.
SWITCH HOOK
PUSH-BOTTON SWITCH
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Semiconductor
MSM6895/6896
CONFIGURATION (TOP VIEW)
RESET
TIME
RMO0 RMO1 TMX2I MLDY TPBI TMX1I
INTT
CK64
TPAO
VSGC
TEST
CK1536
connect 80-Pin Plastic
LOSS
TPAI
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Semiconductor
MSM6895/6896
DESCRIPTION
Symbol RMO0 RMO1 TMX2I MLDY TPBI TMX1I TPAI TPAO Type Description Data Latch Output Data Latch Output Data Latch Output Sounder Tone Select Sounder Tone Select Digital Ground Analog Ground Sounder Output Sounder Output Receive Main Input Receive MainAmp Output Receive MainAmp Output Speaker Pre-Amp Output Receive Pre-Amp Output Receive Addition Signal Input Receive Signal Input
Transmit Addtion Signal Input
Symbol VSGC TEST CK1536 CK64 LOSS INTT
Type
Description Analog Power Supply Analog Signal Input CODEC Bypass Capacitor Signal Ground Analog Signal Output from CODEC Control Input Test Clock Input Test Transmission Colck Input Frame Synchronous Clock Input Howler Tone Control Signal Scanning Signal Output Scanning Signal Output Scanning Signal Output Scanning Signal Output Scanning Signal Output Scanned Data Input Scanned Data Input Scanned Data Input Scanned Data Input Scanned Data Input Scanned Data Input Scanned Data Input Scanned Data Input Interrupt Output Data Data Data Data Data Data
Hold Tone Input Transmit Pre-Amp Input
Transmit Addtion Signal Input
Transmit Pre-Amp Input Signal Ground Transmit Pre-Amp Output Transmit Signal Output Transmit Signal Output
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Semiconductor
MSM6895/6896
DESCRIPTION (Continued)
Symbol Type Description Data Data Address Data Digital Power Supply Address Data Input Write Signal Input Read Signal Input Chip Enable Channel Transmit Output Channel Transmit Output Symbol RESET TIME Type Description Channel Recive Input Channel Recive Input Channel Selector Transmit Data Channel Selector Transmit Data Channel Selector Receive Data Channel Selector Receive Data Reset Input Timer Output Hold Tone Control Output Data Latch Output
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MSM6895/6896
FUNCTIONAL DESCRIPTIONS
General latch outputs external control. Statuses these outputs controlled processor interface. Refer description control data details.
SW0, External control signal inputs setting tone combination ringing tone. When external control setting tone combination selected, tone combination these pins.
Tone combination Tone combination Tone combination Tone combination Wambling Cycle 1000 1000 1333 1000 1000 1333
Wambling Cycle Time
Digital Ground.
Analog Ground.
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Semiconductor SA0,
MSM6895/6896
Sounder (ringing tone) driving outputs. output signal inverted against signal SA0. sounder circuit easily configured connecting piezo-sounder between SA1. Through processor control, ringing tone volume selectable from four levels tone combinations selectable. Initially, ringing tone volume maximum tone combination externally. these pins used with no-load, tone volume cannot controlled. When tone volume control required, load resistor must connected between SA1.
RMI, RMO0, RMO1 Receive main amplifier input outputs. main amplifier input RMO0 RMO1 main amplifier outputs. output signal RMO1 inverted against RMO0, earphone piezo electric-type handset directly connected between RMO0 RMO1. input connected receive preamplifier output (RPO). adjusting receive path frequency characteristics required, insert following circuit adjustment. During initial setting, speech path from RMO0 RMO1 disconnected output RMO0 RMO1 level (VA/2). speech path provided processor control.
circuit example adjustment frequency characteristics
Output preamplifier speaker. Since driving capability load directly drive speaker. During initial setting, non-signal state (VSG level), speech signal, RTONE0, RTONE1, FTONE, hold acknowledge tone, signal acknowledge tone output through processor control.
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Semiconductor R1I, R2I,
MSM6895/6896
Receive preamplifier inputs output. inputs output receive preamplifier. Normally, connected AC-coupling capacitor CODEC analog output (CAO), used mixing signal input pin. During initial setting, output non-signal state (VSG level), speech signal, RTONE1, RTONE2, FTONE, acknowledge tone, side tone signal output through processor control. three-party speech function required, connected analog output other CODEC.
MLDY Hold tone signal input. This connected output external melody Through processor control, signal applied MLDYI output from output hold tone transmit path, from output hold acknowledge tone receive path.
TPBI Transmit signal input. When handset used, TPBI connected transmit preamplifier output (TPAO). adjustment frequency characteristics transmit path required, insert circuit adjustment characteristic between TPAO TPBI. Through processor control, signal applied this output pins transmit path output side tone pin.
circuit example adjustment frequency characteristics
TPAO
TPBI
TMX1I, TMX2I Transmit addition signal inputs. Through processor control, input signals TMX1I TMX2I added transmit signal output respectively.
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Semiconductor TPAI, TPAO
MSM6895/6896
transmit preamplifier input output. TPAI input TPAO output. Connect TPAI microphone handset ACcoupling capacitor offset appears transmit signal (offset from SGT). transmit path from TPAI TPAO always established regardless processor control.
Signal ground level output. output level equal half power supply voltage.
VSGC Bypass capacitor connecting signal ground level. Insert capacitor with good higher frequency characteristic, between VSGC VAG.
power supply. analog circuit digital supply. Connect both analog path system.
CODEC analog output. Connect T1O.
CODEC analog output. Connect AC-Coupling capacitor.
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Semiconductor TEST, CK1536
MSM6895/6896
External master clock inputs. Since MSM6895 MSM6896 contain internally, external clock signal eliminated. device operate with external clock through these pins. When these pins used, leave these pins open
Mode Internal External master clock TEST Digital CK1536 open Input signal 1536
When external clock used, CK1536 signal required synchronized phase with signal.
CK64 CODEC data input output shift clock input. When continuous clock set, frequency kHz, kHz, kHz. When burst clock used, 192, 384, 768, 1536, 2048 available. BCLOCK signal applied, synchronization goes into self-running mode.
Synchronous signal input. CODEC data sent sequencially from rising edge CK64 signal synchronization with rise synchronous signal. data should entered from synchronization with rise synchronous signal. data shifted falling edge CK64 signal. Since signal used trigger signal clock signal tone generator, this signal applied, only tone output, also goes synchronization goes into self-running mode. This signal synchronous with CK64 signal frequency must within ensure CODEC characteristics (mainly frequency characteristics). LOSS Signal output controlling external circuits. When howler tone sounder selected through processor control, output digital "1". Initially, this output digital "0".
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Semiconductor PO0, PO1, PO2, PO3, PO4, PO5, PO6,
MSM6895/6896
scanning outputs. These output pins need external pull-up resistors because their open- drain circuits. Through processor control, these outputs open digital "0". Initially, these outputs opened state.
PI0, PI1, PI2, PI3, PI4, PI5, PI6, scanning inputs. READ mode, data read processor data (DB0 DB7).
INTT Interrupt signal output processor. INTT outputs interrupt signals (digital "0") intervals interrupt release control signal from processor. INTT does output signal while signal input.
Interrupt release signal from processor
INTT output
DB0, DB1, DB2, DB3, DB4, DB5, DB6, Data inputs outputs.
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Semiconductor AD0,
MSM6895/6896
Address data inputs internal control registers. Addressing internal control registers executed address data, DB6.
Write Read Sounder Control Control function acknowledge tone tone control Control internal control latch general-purpose latch, Reset control watch timer. Control channel selector scanning output control, interrupt release control Volume control tone combination control sounder CODEC power down control Level control transmit path, tone, Hold tone, Gain control receive path Frequency control howler tone Read scanning data Function
Write signal internal control registers. Data data written into registers rising edge under condition digital (Chip Enable). While digital state, becomes invalid. Write cycle minimum CK64 signals silent, write cycle requires minimum minimum specified write cycle valid after CK64 signals input. Read signal input read processor. When digital state, digital values output onto data buses DB7. While digital state, signal becomes invalid.
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Semiconductor Chip Enable signal input. When digital state, valid.
MSM6895/6896
B1T, B2T, B1R, channel interface inputs outputs. outputs, inputs. Through channel control processor, various data paths set. CODEC input output signals input output these pins. Initially outputs fixed digital "1", inputs neglected.
BR1, BR2, BT1, External digital inputs outputs B-channel. outputs, inputs. Through channel control processor, digital paths between these input output pins channel. These signals applied another CODEC interface three-party speech path interface kbps rate adaptor circuit. Initially outputs fixed digital "1", inputs neglected. RESET Reset signal input. Digital input RESET makes internal control registers initialized. When powered this RESET signal should input initializing system. TIME Watchdog timer output. When processor does reset timer, period (Digital digital signal continuously output. When RESET digital "0", this timer reset. And, about after RESET goes digital "1", first timer output signal issued then timer signal output intervals signal input, TIME signal output.
Control signal output external hold tone generator. goes digital state when hold tone transmit mode transmit path hold acknowledge tone mode receive path selected. During initialized state, digital state.
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Semiconductor
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ABSOLUTE MAXIMUM RATINGS
Parameter Power Supply Voltage Analog Input Voltage Digital Input Voltage Storage Temperature Symbol VAIN VDIN TSTG Condition VAG, VAG, VAG, Rating -0.3 -0.3 +150 Unit
RECOMMENDED OPERATING CONDITIONS
Parameter Power Supply Voltage Operating Temperature Input High Voltage Input Voltage Digital Input Rise Time Digital Input Fall Time Digital Output Load Symbol Condition (Voltage must fixed) Digital Input Pins Digital Input Pins Digital Input Pins Digital Input Pins Output Min. 4.75 Typ. Max. 5.25 Unit
Recommended Operating Conditions (CODEC Digital Interface)
Parameter Clock Frequency Sync Pulse Frequency Clock Duty Ratio Symbol Sync Pulse Setting Time Sync Pulse Width Data Setup Time Data Hold Time Allowable Jitter Width Condition CK64 CK64 Fig.1 Fig.1 B1R, B1R, Min. CK64 Typ. Max. Unit
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Semiconductor Recommended Operating Conditions (Processor Digital Interface)
Parameter Write Pulse Period Write Pulse Width Read Pulse Width Address Data Setup Time Address Data Hold Time Setup Time Hold Time Data Setup Time Data Hold Time Reset Pulse Width Symbol tAW1 tAR1 tAW2 tAR2 tCW1 tCR1 tCW2 tCR2 tDW1 tDW2 tWRES AD0, AD0, RESET Fig.2 Condition Min. 2000 Typ.
MSM6895/6896
Max.
Unit
Recommend Operating Conditions (Analog Interface)
Parameter Symbol TPAI TPBI TMX1I, TMX2I (Transmit Gain: Typ.) Analog Input Voltage VAIN MLDYI (Transmit Gain: Typ.) R1I, (Transmit Gain: Typ.) TPAO, T1O, T2O, Analog Load Resistance RPO, SPO, RMO0, RMO1 Analog Load Capacitance TPAO, T1O, T2O, RPO, SPO, RMO0, RMO1 TPAI, TPBI, Allowable Analog Input Offset Voltage Voff MLDYI, TMX1I, TMX2I R1I, Condition Min. -100 Typ. Max. 0.24 0.31 2.40 1.90 1.20 0.51 2.40 +100 Unit
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ELECTRICAL CHARACTERISTICS
Digital Interface Characteristics
(VDD ±5%, -10°C +70°C) Parameter Symbol IDD1 Power Supply Current IDD2 IDD3 IDD4 Input High Voltage Input Voltage High Input Leakage Current Input Leakage Current Digital Output High Voltage Digital Output Voltage Digital Output Leakage Current Analog Output Offset Voltage Input Capacitance Analog Input Resistance Voff Condition Operating Mode Signal, Sounder OFF) CODEC Receive Power Down CODEC Transmit Power Down CODEC Transmit/Receive Power Down -1.6 TPAO, T1O, T2O, CAO, RPO, RMO1, RMO2, TPAI, TPBI, MLDYI, TMX1I, TMX2I, R1I, (fin kHz) Voltage Drive Current ISGF ISGS FORCE Current SINK Current Min. -100 VA/2 -0.05 Typ. VA/2 Max. 10.0 +100 VA/2 +0.05 Unit
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Semiconductor Characteristics (CODEC)
MSM6895/6896
(VDD ±5%, -10°C +70°C) Parameter Symbol Freq. Level (Hz) (dBm0) Loss Loss Loss Loss Loss Loss Loss Loss Loss Loss Loss 1020 2020 3000 3400 1020 2020 3000 3400 Condition Min. -0.15 -0.15 -0.15 -0.15 -0.15 -0.15 -0.3 -0.3 -0.6 -1.5 -0.2 -0.2 -0.4 -0.8 Typ. +0.07 Reference -0.03 +0.06 0.38 -0.03 Reference -0.02 +0.15 0.56 43.0 41.0 38.0 31.0 26.5 43.0 41.0 40.0 34.0 31.0 +0.01 Reference +0.13 +0.32 +0.64 Reference -0.06 -0.20 -0.27 Max. +0.20 +0.20 +0.20 0.80 +0.20 +0.20 +0.20 0.80 +0.3 +0.3 +0.6 +1.5 +0.2 +0.2 +0.4 +0.8 Unit
Transmit Frequency Response
Receive Frequency Response
Transmit Signal Distortion Ratio
1020
Receive Signal Distortion Ratio
1020
Transmit Gain Tracking
1020
Receive Gain Tracking
1020
Notes:
Psophometric filter used Upper specified MSM6895, lower MSM6896
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Semiconductor Characteristics (CODEC) (Continued)
MSM6895/6896
(VDD ±5%, -10°C +70°C) Parameter Symbol Freq. Level (Hz) (dBm0) Nidle Idle Channel Noise Nidle Absolute Amplitude Absolute Delay Time 1020 1020 1000 2600 2800 1000 2600 2800 1020
Condition Transmit CODEC Receive CODEC CK64
Min. 0.5671 0.5671
Typ. -73.5 -77.8 0.6007 0.6007 0.58 0.19 0.12 0.02 0.05 0.08 0.09 0.12 32.0 -37.5
Max.
Unit
dBmOp
0.6363 0.6363 0.60 0.75 0.35 0.125 0.125 0.75 0.75 0.35 0.125 0.125 0.75 Vrms
Transmit Group Delay
Receive Group Delay
Crosstalk Attenuation Discrimination Out-of-band Signal Spurious Intermodulation Distortion Power Supply Noise Rejection Ratio
mVpp
Transmit Receive Receive Transmit 4000 2fa-fb
dBmO dBmO
3400
Notes:
Psophometric filter used Upper specified MSM6895, lower MSM6896 data MSM6895: data MSM6896: "11010101" Minimum value group delay distortion measurement under idle channel noise
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Semiconductor Characteristics (Transmit Path)
MSM6895/6896
(VDD ±5%, -10°C +70°C) Parameter Pre-Amp Gain Transmit Path Gain Transmit Path Gain Transmit Addition Signal Gain Transmit Addition Signal Gain
Symbol
GTPA
Freq. (Hz) 1020 1020 1020
Level (dBV) -24.4 -22.1 -4.4
Condition TPAI-TPAO TPBI-T1O TPBI-T2O TMX1I-T1O TMX1I-T2O typical gain typical gain
Min. 18.0 15.7 15.7 -2.0 -2.0
Typ. Max. 20.0 17.7 17.7 22.0 19.7 19.7 +2.0 +2.0
Unit
GTPB1 GTPB2 GTMX1 GTMX2 VPBT1
-17.4 -15.4 -13.4 -17.4 -15.4 -13.4 -5.0 -8.0 -0.9 -4.0 -4.0 -5.0 -8.0 -3.0 -6.0 -2.0 -2.0 -3.0 -6.0 -1.0 -4.0 +0.9
In-Channel Signal Output Level
VPBT2 GPBT1
In-Channel Signal Output Level Setting In-Channel Signal Frequency Deviation In-Channel Signal Distortion
typical setting
GPBT2 DfPBT THDPBT GPAT1
T1O,
In-Band Distortion MLDYI-T1O
Hold Tone Path Gain
1020
-22.4
typical MLDYI-T2O gain
-1.0 -4.0
GPAT2
Hold Tone Path Gain Setting 1020 -22.4
typical setting
Idle Channel Noise
TPAI: termination
Meature TPAO
T1O, TPAO, T1O,
Maximum Output Voltage Swing
T2O,
Note:
Noise band width: kHz, non-weighted
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Semiconductor Characteristics (Receive Path)
MSM6895/6896
(VDD ±5%, -10°C +70°C) Parameter Receive Main Amp. Gain Receive Main Amp. Output Gain Difference Receive Main Amp. Output Phase Difference Receive Signal Path Gain Symbol GRMO0 GRMO1 DGRMO DPRMO GRPA RPA1 Receive Signal Path Gain Setting RPA2 RPA3 Receive Addition Signal Path Gain Receive Addition Signal Path Gain Setting GRPB RPB1 RPB2 RPB3 1020 -14.4 1020 -14.4 1020 -23.4 Freq. (Hz) 1020 1020 1020 1020 Level (dBV) -19.4 -19.4 -19.4 -19.4 -14.4 Condition RMI-RMO0 RMI-RMO1 RMO0/RMO1 RMO0/RMO1 R1I-RPO typical setting R2I-RPO typical setting R1I-SPO Speaker Preamp. Gain 1020 -4.4 R2I-SPO Hold Acknowledge Tone Path Gain GPAS Acknowledge Tone Output Level Acknowledge Tone Frequency Difference Acknowledge Tone Distortion Side Tone Path Gain VPBRP VPBRP DfPBR GSIDE Idle Channel Noise 1020 1020 -7.4 -21.4 typical typical typical typical Min. 13.2 13.2 -8.0 -8.0 -8.0 -8.0 -5.0 Typ. Max. 15.3 15.3 -0.01 -179.6 -6.0 -6.0 -6.0 -6.0 -3.0 17.3 17.3 -4.0 11.0 -4.0 11.0 -4.0 -4.0 -1.0 Unit
MLDYI-SPO RPO, RPO, TPBI-RPO RMI, RMO0, RMO1
-32.1 -30.1 -28.1 -30.2 -28.2 -26.2 -0.9 10.9 +0.9 12.9
Note:
Noise band width: kHz, non-weighted
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Semiconductor Characteristics (Receive Path) (Continued)
MSM6895/6896
(VDD ±5%, -10°C +70°C) Parameter Symbol Maximum Output Amplitude RTONE0 Output Amplitude RTONE1 Output Amplitude FTONE Output Amplitude VRT0 VRT1 VFTRP VFTSP Freq. (Hz) Level (dBV) Condition RPO, RMO0, RMO1 Min. 77.2 Typ. Max. 91.7 Unit
109.0 mVPP
132.0 157.0 187.0 mVPP 135.5 161.0 191.5 159.0 189.0 224.6 mVPP
Notes:
PDT, SDT, CRBT, RBT, T250
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Semiconductor Characteristics (Ringing Tone Output Circuit)
MSM6895/6896
(VDD ±5%, -10°C +70°C) Parameter Symbol VST1 Calling Tone Output Amplitude VST2 VST3 VST4 Howler Tone Output Amplitude VHOW Freq. (Hz) Level (dBV) Condition SA0SA1 Min. Typ. Max. 1.28 0.47 0.28 1.98 0.65 0.45 Unit
Volume 3.25 Volume 0.73 Volume 0.13 3.25
Volume 0.25
Note:
IR-1, IR-2, SIR-1, SIR-2, T1K,
Digital Interface Characteristics
(VDD ±5%, -10°C +70°C) Parameter Digital Output (Latch) Delay Time Scanning Output Delay Time Digital Output (Data) Delay Time Digital Path Delay Time CODEC Data Output Delay Time Symbol Condition PO1, PO2, PO3, Pull-up resistor Min. Typ. Max. Unit tPDLA LML, LOSS tPDSCN
tPDDATA tPDPATH
tPDCOD
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Semiconductor
MSM6895/6896
TIMING DIAGRAM
CK64
Figure CODEC Timing
tAW1 tCW1 tDW1 tDW2 tPDSCN tPDDATA tCW2 tCR1 tCR2 tAW2 tAR1 tAR2
tPDDATA
tPDLA
Latch Output
Figure Processor Interface Timing
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Semiconductor
FUNCTIONAL DESCRIPTION
Control Data Description Sounder control WRITE Mode Address Data
Control Data Output Tone IR-1 IR-2 SIR-1 SIR-2 CRBT Frequency (Hz) Wamble Tone Wamble Tone Wamble Tone Wamble Tone Wamble Tone Wamble Tone 400/16 0.25 0.125 Continuous 0.125 0.25 0.125 0.25 Tone Output: RPO, Refer Table 0.25 0.125 Make/Break Timing Make (Sec) Break1 (Sec) Break2 (Sec) 0.125 0.25 Continuous Continuous 0.125 0.25 Remarks Tone Output: SA0,
2.25
400/16 Suspends tones above.
MSM6895/6896
PDC: This used CODEC power-down control. making this valid, "0"s must written control data bits described later section. CODEC power-down mode. CODEC operation mode. When indicated, LOSS output "1". Otherwise "0". above specification, data contents written later valid. signal sounder path (SA0, SA1) signal receive path (RPO) output simultaneously.
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Semiconductor
Control function acknowledge tone WRITE Mode Address Data
Control Data NTTC Output Tone T250 FTONE FTONE Frequency (Hz) 0.25 Continuous Continuous Suspends tone Suspends T250 tone Suspends FTONE Suspends above tones Make/Break Timing Make (Sec) Break1 (Sec) Break2 (Sec) 0.25 2.25 Remarks Tone output: RPO,
NTTC when initial state set. NTTC PBTC when tone set, data written into NTTC later valid. When NTTC FTONE FTONE signals output from SPO. When NTTC these signals output from RPO. NTTC when FTONE tone stopped. When more signals specified IIT, T250 FTONE, output signals compounded three tones. definition Make/Break Timing follows;
Break1 Break2
Make
MSM6895/6896
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Semiconductor
tone control WRITE Mode Address Data
Control Data Output Frequency High 1209 1336 1477 1633 1209 1336 1477 1633 1209 1336 1477 1633 1209 1336 1477 1633 When initial state tone suspended, conditions internal control signals MUTN NTTC When PBTC tone output only from receive path SPO. signal output from transmit path. conditions internal control signals MUTN NTTC receive path RPO. conditions internal control signals MUTN NTTC Remarks When PBTC tone output from transmit path
PBTC
Suspends tone
MSM6895/6896
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Semiconductor
Latch control timer reset WRITE Mode Address Data
Control data Latch output LML1 LMX1 LML2 LMX2 Sets corresponding latches listed above "0". Sets latches listed above "0". Resets watch timer. These general latches external control. correspond external symbols independently. Initially, latches "0". output when either LML1, LML2, "1". Remarks These latch internal control used control speech path. Initially latch "0". details speech path control, refer Table Each latch specified independently.
Latch codes described above
MSM6895/6896
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Semiconductor
Table Transmit speech path setting list
Status Symbol TA-1 TA-2 TA-3 TA-4 TA-5 TA-6 TA-7 TB-1 TB-2 TB-3 TB-4 TB-5 TB-6 TB-7 Control Symbol LML1 LMX1 LML2 LMX2 MUTN Output Signal TMX1 Output Signal TMX2
Notes:
MUTN Control Signal PBTC (DB4). MUTN when initial state set. MUTN when PBTC MUTN when PBTC= Signal ground, Transmit signal, TMX1: Transmit addition signal TMX2: Transmit addition signal PBt: signal, Hold tone signal output signals signals added signals indicated "1"s each column.
MSM6895/6896
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Semiconductor
Table Receive speech path setting list (RPO output)
Control Signal MUTN NTTC Output Signal
Table Control receive main amplifier
Control Signal Output signal RMO0 RMO1 Input signal
Status Symbol RP-1 RP-2 RP-3 RP-4 RP-5 RP-6 RP-7 RP-8 RP-9 RP-10 RP-11 RP-12 RP-13 RP-14
Notes:
Receive signal Receive signal Side tone signal, RT0: PDT, SDT, CRBT, IIT, RT1: RBT, T250, FTONE PBr: acknowledge signal. Output Signal signal added signal indicated "1"s each column. "0"s Control Signal NTTC equivalent "1"s Output Signals PBr, "1"s equivalent "0"s Output Signals. Control Signals MUTN NTTC internal control signals. Initially, both signals "1"s. MUTN controlled PBTC controlling tone. MUTN when PBTC MUTN when PBTC NTTC controlled PBTC controlling tone NTTC controlling function acknowledge tone, NTTC data written later valid. NTTC when PBTC NTTC when PBTC
MSM6895/6896
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Semiconductor
Table Receive speech path setting list (SPO)
Status Symbol RS-1 RS-2 RS-3 RS-4 RS-5 RS-6 RS-7 RS-8 RS-9 RS-10 RS-11 Control Signal NTTC Output Signal
Notes:
Signal ground, Receive signal Receive signal Hold acknowledge tone, PBr: acknowledge tone, FTONE, RT0: PDT, SDT, CRBT, RT1: RBT, T250. Output Signal signal added signal indicated "1"s each column. Control Signal NTTC defined equally Notes
MSM6895/6896
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Semiconductor
Channel selector control WRITE Mode Address Data
Control Data Status Symbol Main Connection Status Remarks
connection Different groups independently. setting same group, data written later connection valid. Refer Table details. initial statuses
MSM6895/6896
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Semiconductor
Table Output connection status channel selector control
Status Symbol Output Connection Status DOUT DOUT Initial Setting Remarks Initial Setting
Table Output status combination
Setting Setting Output Connection Status Remarks Initial Setting
Notes: According combination (Table statuses held. statuses held. statuses statuses whichever written later, held. When setting performed before setting group, setting must performed after setting group statuses pins indicated affected. connected digital input CODEC DOUT connected digital output CODEC. 32/43
When writing performed sequence setting setting output status becomes B2R, when writing performed sequence setting setting output status becomes B1R. MSM6895/6896
Semiconductor
scanning output control interrupt WRITE Mode Address Data
Control Data Remarks data output from output pins PO0, respectively. output statuses held until data rewritten. When data "0", output goes "0", when data "1", output left open. Initially, left open.
Output Data
Resets INTT output sets "1". This control data valid only when written, held.
MSM6895/6896
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Semiconductor
Sounder, volume, tone combination WRITE Mode Address Data
Control Data Volume (High) Volume (Medium) Volume (Low1) Volume (Low2) Tone combination setting (Initial setting) external control (SW0, SW1) Tone combination (1.0 kHz, Wamble period) Tone combination (0.8 kHz, Wamble period) Tone combination (0.8 kHz, Wamble period) Tone combination (0.5 0.65 kHz, Wamble period) Tone combination (0.4 kHz, Wamble period) Tone combination (0.4 kHz, Wamble period) Initially high volume set, tone combination externally. Control Remarks setting volume tone combination performed simultaneously, independently.
MSM6895/6896
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Semiconductor
CODEC power down control WRITE Mode Address Data
Contorol Data control. (Initial setting) CODEC power-on CODEC power-down CODEC Transmit power-down CODEC Receive power-down CODEC Transmit Receive power-down CODEC power-down release Control CODEC power-down controlled (DB4) during sounder Remarks Data written later valid.
MSM6895/6896
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Semiconductor
Gain control WRITE Mode Address Data
value.(Initial setting) Sets transmit tone hold tone level below typical value. Sets transmit tone hold tone level below typical value. Sets receive gain typical value. (Initial setting) Sets receive gain above typical value. Sets receive gain above typical value. Sets receive gain above typical value.
Control Sets transmit tone hold tone level typical Remarks gain setting transmit path receive path performed simultaneously, independently.
MSM6895/6896
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Semiconductor
Howler tone color combination WRITE Mode Address Data
Control Data Control Howler tone frequency: Howler tone frequency: kHz, Wamble period Initial setting Remarks
scanning data read READ Mode Address Data
Control data input pins output from DB0, respectively.
MSM6895/6896
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analog Melody Tone Generation 0.47 Swith sounder tone combination TPAO TPBI TMX1I TMX2I MLDY
0.47
TPAI
Semiconductor
Line Interface
Line
APPLICATION CIRCUIT
Handset
RMO0
MSM6895
RMO1
Controller
0-20W
Speaker VSGC
Driver
analog analog
Sounder
CK64 TEST CK1536 INTT TIME RESET
Matrix
MSM6895/6896
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Semiconductor
MSM6895/6896
Application circuit Signal Data Rate 192, 384, 768, 1536 2048 kbps.
BCLOCK signal When signal data rate 192, 384, 768, 1536, 2048 kbps, input 9-bit burst clock corresponding frequency equivalent each data rates, CK64 signal.
CK64 PCMIN/OUT
Burst clock generator
Equivalent 74LS161
Continuous Clock
MSM6895/6896 CK64
Syncronous Signal
Continuous Clock
Syncronous Signal
Burst Clock
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Semiconductor
MSM6895/6896
Application Circuit Three-party Speech Path
Speaker
TPAI TPAO TPBI
Handset
TMX2I TMX1I RMO0 RMO1 MSM6895
Speaker
Speaker
Note: indicates voice signal speaker
AOUT
MSM7508
PCMOUT PCMIN
Speech path setting (Speech through handset) Transmit: Receive: Channel selector control TA-4 (LT1 LMX1 MUTN TB-4 (LT2 LMX2 MUTN RP-8 (LT1 MUTN
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SPEECH PATH GAIN
Semiconductor
TPAO
TPBI
MLDY
TMX2I
TMX1I
(Maximum input Vop)
TPAI +17.7 -6dB -6dB
RMO0 RMO1 +15.3 -6.8
-6.8 -8.8
RTONE1 RTONE2 FTONE
91.7 mVPP (DT, PDT, SDT, CRBT) mVPP (RBT, T250) mVPP tone
Generator
-21.4 (240 mVPP signal)
MSM6895/6896
FTONE mVPP (Maximum input Vop)
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Semiconductor
MSM6895/6896
RECOMMENDATIONS ACTUAL DESIGN
assure proper electrical characteristics, bypass capacitors with excellent high frequency characteristics power supply keep them close possible device pins. Connect each other close possible. Connect system ground with impedance. Mount device directly board when mounted PCBs. sockets. socket unavoidable, short lead type socket. When mounted frame, electro-magnetic shielding, electro-magnetic wave source such power supply transformers surround device. Keep voltage lower than -0.3 even instantaneously avoid latchup phenomenon when turning power noise (particularly, level type high frequency spike noise pulse noise) power supply avoid erroneous operation degradation characteristics these devices. Unused analog input pins must connected unused digital pins must connected pin.
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Semiconductor
MSM6895/6896
PACKAGE DIMENSIONS
(Unit
QFP80-P-1420-0.80-BK
Mirror finish
Package material Lead frame material treatment Solder plate thickness Package weight
Epoxy resin alloy Solder plating more 1.27 TYP.
Notes Mounting Surface Mount Type Package SOP, QFP, TSOP, SOJ, (PLCC), surface mount type packages, which very susceptible heat reflow mounting humidity absorbed storage. Therefore, before perform reflow mounting, contact Oki's responsible sales person product name, package name, number, package code desired mounting conditions (reflow method, temperature times).
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Semiconductor MSM6895/6896 Semiconductor Multi-Function CODEC

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