Semiconductor MSC1201-xx This version:MSC1201-xx Nov. 1997 Previo
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E2C0017-27-Y2
Semiconductor MSC1201-xx
This version:MSC1201-xx Nov. 1997 Previous version: Jul. 1996
60-Bit Tube Driver with Digital Dimming Conversion Function
GENERAL DESCRIPTION
MSC1201-xx duty vacuum fluorescent display tube driver implemented Bi-CMOS technology. This consists 64-bit shift registers, latches, conversion circuit, digital dimming circuit, 30-segment driver 2-grid driver. MSC1201-xx both digital dimming circuit conversion circuit which converts signal lamp dimming control signal tube dimming control, dimming control realized without external circuit. interface with done only with wires (CS, DATA CLOCK signals). Also, DATA CLOCK signal lines shared with other peripherals because chip select function signal. general purpose code, code number -01. (Product name: MSC1201-01GS-2K) custom code, code number will ordered time.
FEATURES
Single supply voltage (built-in logic regurator) Operating temperature range -40°C +85°C 30-segment driver outputs (IOH 2-grid pre-driver outputs (IOH Built-in digital dimming circuit (11-bit resolution) Built-in oscillation circuit (external fOSC MHz) Built-in Power-On-Reset circuit. Lamp signal Buil-in conversion circuit vacuum fluorescent display tube. Built-in Oscillation (external Correspondence between shift register output segment settable optionally using built mask programmable PLA. Package 44-pin plastic (QFP44-P-910-0.80-2K)(Product name: MSC1201-xxGS-2K) indicates code number
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MSC1201-xx
BLOCK DIAGRAM
SEG1 Circuit DATA CLOCK 30-Segment Driver
SEG30
GRID1
GRID2
2-Grid Driver
Matrix
Control Circuit
Multiplexer
Latch 64-Bit Shift Register D48-59 Mode Selector OSC0 OSC1 Timing Generator Conversion Circuit Digital Dimming Circuit Selector Test Mode DATA
PWMIN
TEST1
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MSC1201-xx
INPUT OUTPUT CONFIGURATION
Schematic Diagrams Logic Portion Input Schematic Diagrams Logic Portion Input Circuit Circuit
Reg.) TEST1 INPUT Reg.)
Schematic Diagrams Logic Portion Output Schematic Diagrams Driver Output Circuit Circuit
Reg.) Reg.)
OUTPUT
OUTPUT
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MSC1201-xx
CONFIGURATION (TOP VIEW)
SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15
SEG14
SEG13
SEG12
SEG11
SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30
SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 DATAOUT
DATA
GRID1 GRID2
TEST1
OSC1
OSC0
44-Pin Plastic Package
CLOCK
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MSC1201-xx
DESCRIPTIONS
24-44 Symbol SEG1-30 GRID1, OSC0 OSC1 Segment output Grid Grid output pins oscillation pins. Connect resistor between OSC1 OSC0 capacitor between OSC0 pin. Chip select input. Only when high level input this pin, interfacing with available through "CLOCK" "DATA" pins. Therefore, 2-signal lines "CLOCK" "DATA" shared with other peripherals. Input which receives display data digital dimming data from MCU. Data shifted rising edge shift clock. Serial clock input. Data that input through "DATA" input output synchronization with rising edge serial clock. Serial data output. Data shifted rising edge serial clock with delay 64-bit time. This used cascading this with other drivers such driver. signal input. Dimming select input. When high level input, daylight-mode output duty cycle about 100% each grid time conversion digital dimming mode. When level input, dark-mode output duty cycle determined duty cycle signal input digital dimming output duty cycle determined digital dimming data. Blank Display input with built-in pull-up resistor. When "L", drivers output "L". When display duly controlled this signal, leave this open. Test signal input pin. this used shipping test LSI, leave open normal operation mode. Power Supply Ground Description
DATA CLOCK DATA PWMIN
TEST1
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MSC1201-xx
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Input Voltage Storage Temperature Range Power Dissipation Symbol TSTG Condition inputs 85°C Rating -0.3 -0.3 +150 Unit
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage High Level Input Voltage High Level Input Voltage High Level Input Voltage Level Input Voltage Level Input Voltage Clock Frequency Frequency Frame Frequency Operating Temperature Range Symbol VIH1 VIH2 VIH3 VIL1 VIL2 fOSC Condition inputs except OSC0, OSC0 inputs except OSC0 OSC0 4.7kW, C=22pF fOSC Min. Typ. Max. Unit
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MSC1201-xx
ELECTRICAL CHARACTERISTICS
Characteristics
+85°C, Parameter Hight Level Input Voltage Hight Level Input Voltage Hight Level Input Voltage Level Input Voltage Level Input Voltage Hight Level Input Current Hight Level Input Current Hight Level Input Current Level Input Current Level Input Current Level Input Current High Level Output Voltage High Level Output Voltage Symbol VIH1 VIH2 VIH3 VIL1 VIL2 IIH1 IIH2 IIH3 IIL1 IIL2 IIL3 VOH1 VOH2 VOH3-1 High Level Output Voltage VOH3-2 VOL1-1 Level Output Voltage VOL1-2 VOL1-3 Level Output Voltage Power Supply Current VOL2 Condition VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IOH1 IOH2 IOH3-1 -200 Output Open IOL1-1 IOL1-2 IOL1-3 IOL2 fOSC MHz, load Min. -0.6 -320 VDD-0.8 VDD-0.8 Max. -0.1 Unit
Notes:
Applicable input pins (except OSC0 pin) Applicable OSC0 Applicable CLOCK, DATA, PWMIN Applicable TEST1 Applicable Applicable pins SEG1 SEG30 Applicable GRID1 GRID2 Applicable DATA Applicable Applicable input pins (except OSC0 pin)
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Semiconductor Characteristics
MSC1201-xx
+85°C, Parameter Oscillation Frequency OSC0 Input Frequency Clock Frequency Clock Pulse Width Data Set-up Time Data Hold Time Pulse Width Time Set-up Time CS-Clock Time Hold Time Clock-CS Time Data Output Delay Clock-Data Time GRID Output Delay from Slew Rate (All Drivers) Power-on Time Power-off Hold Time Power-on Rise Time Frame Frequency Symbol fOSC fOSCI tCSW tCSL tCSS tCSH tODS tPCS tPOF tPRZ Condition 4.7kW, 22pF External input only 100pF 100pF, When Unit mounted When Unit mounted Min. Max. Unit
Conversion Characteristics
+85°C, Parameter Input Frequency Input Threshold Voltage Input Duty Cycle Symbol fPWM Condition Min. Typ. Max. Unit
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MSC1201-xx
TIMING DIAGRAM
tCSW 3.8V 0.8V tCSS 3.8V 0.8V tCSH tCSL
CLOCK
3.8V 0.8V
VALID
VALID
DATA
Fig. Data Input Timing
3.8V 0.8V
CLOCK
DATA 3.8V 0.8V
Fig. Data Output Timing
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MSC1201-xx
TIMING DIAGRAM (Continued)
tPRZ tPOF tPCS 3.8V 0.8V
Fig. Power-On Timing
tCSW 3.8V 0.8V tODS SEG1-30 GRID1, tODS
Fig. GRID Driver Output Timing
Frequency (fPWM) Input Threshold Voltage PWMIN
Duty Cycle A/(A+B)
Fig. Input Waveform
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MSC1201-xx
FUNCTIONAL DESCRIPTION
Power-On-Reset status internal circuit after power-on reset follows; Shift registers latches reset. conversion mode selected. DATA Input Data input available only when high level applied "CS" pin. Input data shifted into shift registers through "Data" rising edge shift clock. data automatically loaded latches falling edge "CS" signal. When "0", input data should include display data (total bits data should input.) when "1", input data should exclude display data (Total 16-bit data should input.) [Data Format] Display Data Input Mode Input Data bits Display Data bits Mode Select Data bits
First Display Data
Display Data
Mode Data
Segment outputs/Shift Registers Correspondence Table content table depends code. This table modeled general purpose code -01. Segment output positions changed dependent code, segment-bit correspondence cannot changed.
SEGn GRID1
GRID2
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Semiconductor Digital Dimming Data Input Mode Input Data bits Digital Dimming Data bits Mode Select Data bits
MSC1201-xx
First
Dimming Data (MSB) INPUT DATA (LSB)
Mode Data DUTY CYCLE 0/2048 1/2048 2032/2048 2032/2048
Function Mode
Mode Display Data Input Digital Dimming Data Input Conversion Select Display Data Input Conversion Select Digital Dimming Select Display Data Input Digital Dimming Select Function
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Semiconductor Conversion
MSC1201-xx
conversion mode, "lamp PWM", which used dimming control back-light instrument clusters other displays, used generate signal tube dimming control. lamp input "PWM converted signal tube with built-in conversion look-up table (User-Programmable Mask ROM). duty cycle lamp defined follows:
PWMIN
Input Frequency 80Hz Duty Cycle (A+B)
Note: duty cycle lamp signal measured with reference point typ. reference point threshold voltage "PWM pin, deviates some value between process parameter deviation. Therefore, conversion error increases rise/fall time lamp increases. GRID/SEG Driver Operation Digital/Analog Dimming Operation Figure shows output timing GRID Driver when level. Output timings GRID drivers shown figure digital dimming mode operation figure conversion mode operation. GRID drivers output timings when
Frame (4096-bit times) GRID1
GRID2 2032-bit times 6-bit times SEG1-30
16-bit times
2038-bit times
10-bit times
Fig. GRID Output Timing "H") Note: time 2/fOSC typ.
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MSC1201-xx
GRID driver output timing when Digital Dimming Mode.
Frame (4096-bit times) GRID1
GRID2 Max. 2032-bit times 6-bit times SEG1-30
16-bit times
Max. 2038-bit times
10-bit times
Fig. GRID Output Timing (digital dimming mode) Notes: above indicates timing digital dimming mode with duty cycle 2032/2048 VPARK level. On-times GRID specified with bits digital dimming data. time 2/fOSC typ. GRID driver output timings when Conversion Mode
Frame (2048-bit times) GRID1
GRID2 Max. 256-bit times 3-bit times SEG1-30 Max. 259-bit times
8-bit times
Fig. GRID Driver Output Timing (PWM conversion mode) Notes: above indicates GRID Drivers Timing when conversion mode level selected. time 4/fOSC typ. 14/20
Semiconductor Conversion Table MSC1201-01
STEP LAMP DUTY CYCLE 100.00% 98.75% 97.50% 96.25% 95.00% 93.75% 92.50% 91.25% 90.00% 88.75% 87.50% 86.25% 85.00% 83.75% 82.50% 81.25% 80.00% 78.75% 77.50% 76.25% 75.00% 73.75% 72.50% 71.25% 70.00% 68.75% 67.50% 66.25% 65.00% 63.75% 62.50% 61.25% 60.00% DUTY CYCLE 12.50% 12.30% 12.11% 11.91% 11.72% 11.52% 11.33% 11.13% 10.94% 10.74% 10.55% 10.35% 10.16% 9.96% 9.77% 9.57% 9.38% 9.18% 8.98% 8.79% 8.59% 8.40% 8.20% 8.01% 7.81% 7.62% 7.42% 7.23% 7.03% 6.84% 6.64% 6.45% 6.25% STEP LAMP DUTY CYCLE 58.75% 57.50% 56.25% 55.00% 53.75% 52.50% 51.25% 50.00% 48.75% 47.50% 46.25% 45.00% 43.75% 42.50% 41.25% 40.00% 38.75% 37.50% 36.25% 35.00% 33.75% 32.50% 31.25% 30.00% 28.75% 27.50% 26.25% 25.00% 23.75% 22.50% 21.25% 20.00%
MSC1201-xx
DUTY CYCLE 6.05% 5.86% 5.66% 5.47% 5.27% 5.08% 4.88% 4.69% 4.49% 4.30% 4.10% 3.91% 3.71% 3.52% 3.32% 3.13% 2.93% 2.73% 2.54% 2.34% 2.15% 1.95% 1.76% 1.56% 1.37% 1.17% 0.98% 0.78% 0.59% 0.39% 0.20% 0.10%
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Semiconductor Code Table MSC1201-01
MSC1201-xx
BIT10, BIT11, BIT12, BIT13, BIT14, BIT15, BIT16, BIT17, BIT18, BIT19, BIT20, BIT21, BIT22, BIT23, BIT24, BIT25, BIT26, BIT27, BIT28, BIT29, BIT30,
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MSC1201-xx
Name SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15
Output 1,31 2,32 3,33 4,34 5,35 6,36 7,37 8,38 9,39 10,40 11,41 12,42 13,43 14,44 15,45
Name SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30
Output 16,46 17,47 18,48 19,49 20,50 21,51 22,52 23,53 24,54 25,55 26,56 27,57 28,58 29,59 30,60
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MSC1201-xx
APPLICATION CIRCUITS
Digital Dimming Mode
Duty Tube
SEG1
SEG30
G1,G2
Microcontroller DATA CLOCK OSC1 MSC1201-xx
OSC0
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Semiconductor Conversion Mode
MSC1201-xx
Duty Display Tube
SEG1
SEG30
Microcontroller DATA CLOCK OSC1 OSC0 Daylight Mode Dark Mode Illumination Switch Illumination Lamp Dashboard Lamp Lamp Signal MSC1201-xx
PWMIN
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MSC1201-xx
PACKAGE DIMENSIONS
(Unit QFP44-P-910-0.80-2K
Mirror finish
Package material Lead frame material treatment Solder plate thickness Package weight
Epoxy resin alloy Solder plating more 0.41 TYP.
Notes Mounting Surface Mount Type Package SOP, QFP, TSOP, SOJ, (PLCC), surface mount type packages, which very susceptible heat reflow mounting humidity absorbed storage. Therefore, before perform reflow mounting, contact Oki's responsible sales person product name, package name, number, package code desired mounting conditions (reflow method, temperature times).
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