Semiconductor ML9261/62 Semiconductor 60-Bit Vacuum Fluorescent D

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Semiconductor ML9261/62 Semiconductor 60-Bit Vacuum Fluorescent D

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E2C0043-19-74
Semiconductor ML9261/62
Semiconductor 60-Bit Vacuum Fluorescent Display Tube Grid/Anode Driver
This version:ML9261/62 Jul. 1999
GENERAL DESCRIPTION
ML9261/62 monolithic designed directly driving grid anode vacuum fluorescent display (VFD) tube. device contains 60-bit shift register, 60-bit register circuit, tube driving circuits single chip. Display data serially stored shift register rising edge clock pulse. Setting allows tube driving circuits driven low, which makes possible display blanking. Also, setting both pins high allows tube driving circuits driven high, which provides easy testing lights after final assembly tube panel.
FEATURES
Logic Supply Voltage (VCC) +3.3V±10% +5.0V±10% Driver Supply Voltage (VHV): +60V Driver Output Current IOHVH1 (Only driver output "H") -40mA (VDISP=40V) IOHVH2 (All driver outputs "H") -120mA (VDISP=40V) IOHVL:1mA Directly connected tube using push-pull output (Pull-down resistors needed) Data Transfer Speed: 4MHz Package 70-pin plastic SSOP (SSOP70-P-500-0.80-K) (Product names ML9261MB ML9262MB)
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Semiconductor
ML9261/62
BLOCK DIAGRAM
VDISP
RESET
PO-1
PO-2 60-Bit Shift Register
60-Bit Register
P0-60
D-60 O-60
HVO60
L-GND D-GND
DOUT
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ML9261/62
INPUT OUTPUT CONFIGURATION
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CONFIGURATION (TOP VIEW)
ML9261
VDISP DOUT L-GND D-GND
70-Pin Plastic SSOP (SSOP70-P-500-0.80-K)
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ML9261/62
CONFIGURATION (TOP VIEW)
ML9262
D-GND L-GND DOUT VDISP
70-Pin Plastic SSOP (SSOP70-P-500-0.80-K)
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ML9261/62
DESCRIPTION
Symbol Type Description Shift register clock input pin. Shift register reads data from while data shift register shifted from stage next stage rising edge clock. Serial data input shift register. Display data (positive logic) input synchronization with clock. Serial data output shift register. Data output from DOUT synchronization with signal. Latch strobe input pin. contents parallel outputs (PO1 PO60) shift register read rising edge (edge-triggered). When rises while high, parallel outputs (PO1 PO60) latch outputs O60) low. Clear input with built-in pull-down resistor. normally high. high low, driver outputs (HV01 HV60) phase with corresponding register outputs O60). high high, driver outputs (HV01 HV60) high irrespective states register outputs. low, driver outputs driven irrespective states register outputs. This allows display blanking set. Input testing (with pull-down resistor). normally low. high, driver outputs (HV01 HV60) phase with corresponding register outputs O60). low, driver outputs (HV01 HV60) irrespective states register outputs. high, driver outputs driven high irrespective states register outputs. This provides easy testing lights after final assembly. High voltage driver outputs driving tube. high low, driver outputs phase with corresponding register outputs O60). direct connection grid anode tube eliminates pull-down resistors. Power supply driver circuits tube Power supply logic driver circuits tube. Since D-GND connected L-GND, connect this external L-GND. logic circuits. Since L-GND connected D-GND, connect this external D-GND.
DOUT
VHO1-60
VDISP D-GND L-GND
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ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Supply Voltage Input Voltage Output Voltage Output Current Symbol VDISP VHVO Rj-a TSTG Condition Applicable logic supply Applicable driver supply Applicable input pins Applicable DOUT Applicable HVO1 Applicable HVO1 25°C 25°C Rating -0.3 +6.5 -0.3 -0.3 +0.3 -0.3 +0.3 -0.3 VDISP +0.3 +150 Unit °C/W
Withstand Output Voltage Power Dissipation Package Thermal Resistance Storage Temperature
Notes: Supply Voltage with respect L-GND D-GND Permanent damage caused voltage supplied over rating value. Package Thermal Resistance (between junction ambient) junction temperature (Tj) expressed equation indicated below should exceed 150°C. Tj=P Rj-a+Ta Maximum power consumption)
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RECOMMENDED OPERATING CONDITIONS-1
Unit Power Supply: 5.0V (Typ.)
Parameter Power Supply Power Supply Input Voltage Input Voltage Driver Output Current Frequency Operating Temperature Symbol VDISP IOHVH1 IOHVH2 fCLK Condition Applicable inputs Applicable inputs Only output outputs 0.7VDD Typ. 0.3VDD -120 Unit
RECOMMENDED OPERATING CONDITIONS-2
Unit Power Supply: 3.3V (Typ.)
Parameter Power Supply Power Supply Input Voltage Input Voltage Driver Output Current Frequency Operating Temperature Symbol VDISP IOHVH1 IOHVH2 fCLK Condition Applicable inputs Applicable inputs Only output outputs 0.8VDD Typ. 0.2VDD -120 Unit
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ELECTRICAL CHARACTERISTICS
Characteristics-1
(VDD=4.5 5.5V, VDISP=40V, Ta=-40 +85°C) Parameter Input Voltege Input Voltage Input Current Input Current Input Capacitance Output Voltage Output Voltage Supply Current (Design Goal) Symbol Applicable IIH1 IIH2 VOH1 VOH2 VOL1 VOL2 IDD1 IDD2 IDISP1 IDISP2 inputs inputs DIN, CLK, inputs inputs DOUT HVO1 DOUT HVO1 VDISP VDISP Condition VDD=VIN=5.5V VDD=VIN=5.5V VDD=5.5V,VIN=0V Ta=25°C IOH=-0.1mA IOH=-40mA IOL=0.1mA IOL=1mA load inputs: inputs: inputs: inputs: 0.7VDD -1.0 -1.0 VDD-1 VDISP-4 Typ. 0.3VDD +1.0 +1.0 10.0 10.0 10.0 10.0 Unit
Characteristics-2
(VDD=3.0 3.6V, VDISP=40V, Ta=-40 +85°C) Parameter Input Voltege Input Voltage Input Current Input Current Input Capacitance Output Voltage Output Voltage Supply Current (Design Goal) Symbol Applicable IIH1 IIH2 VOH1 VOH2 VOL1 VOL2 IDD1 IDD2 IDISP1 IDISP2 inputs inputs DIN, CLK, inputs inputs DOUT HVO1 DOUT HVO1 VDISP VDISP Condition VDD=VIN=3.3V VDD=VIN=3.3V VDD=3.3V,VIN=0V Ta=25°C IOH=-0.1mA IOH=-40mA IOL=0.1mA IOL=1mA load inputs: inputs: inputs: inputs: 0.8VDD -1.0 -1.0 VDD-1 VDISP-4 Typ. 0.2VDD +1.0 +1.0 10.0 10.0 10.0 10.0 Unit
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Characteristics-1
(VDD=4.5 5.5V, VDISP=40V, Ta=-40 +85°C) Parameter Pulse Width Setup Time Hold Time CLK-LS Setup Time LS-CLK Setup Time CLK-LS Hold Time LS-CHG Setup Time LS-CL Setup Time Pulse Width Pulse Width Pulse Width DOUT Delay time Driver Output Delay Time Symbol (CLK) (D-CLK) (CLK-D) (CLK-LS) (LS-CLK) (L-CLK) (CLK-L) (LS-CHG) (LS-CL) (LS) (CHG) (CL) tPD, tPRD tDLH tDHL tDRHL Driver Output Slew Rate tTLH tTHL Load: 2.0kW resistance parallel with 20pF capacitance Load: 30pF Load: 2.0kW resistance parallel with 20pF capacitance During normal operation display data reset display data reset Condition Min. Max. Unit
Characteristics-2
(VDD=3.0 3.6V, VDISP=40V, Ta=-40 +85°C) Parameter Pulse Width Setup Time Hold Time CLK-LS Setup Time LS-CLK Setup Time CLK-LS LS-CHG Setup Time LS-CL Setup Time Pulse Width Pulse Width Pulse Width DOUT Delay time Driver Output Delay Time Symbol (CLK) (D-CLK) (CLK-D) (CLK-LS) (LS-CLK) (L-CLK) (CLK-L) (LS-CHG) (LS-CL) (LS) (CHG) (CL) tPD, tPRD tDLH tDHL tDRHL Driver Output Slew Rate tTLH tTHL Load: 2.0kW resistance parallel with 20pF capacitance Load: 30pF Load: 2.0kW resistance parallel with 20pF capacitance During normal operation display data reset display data reset Condition Min. Max. Unit
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Normal Display Operation
TIMING DIAGRAM
Semiconductor
1/fCLK T1/2 tSU(D-CLK) tH(CLK-D) T3/4
tW(CLK) T59/60 T1/2 T3/4
DOUT tSU(CLK-LS) tSU(LS-CLK) tW(LS) tSU(LS-CHG) tW(CHG) tSU(LS-CL) tDLH tDLH tDHL tDHL tW(CL) tW(CL) tW(CHG)
(OTHERS) tTLH tTLH tTHL tTHL
ML9261/62
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Display Data Reset Operation
Semiconductor
T1/2
T3/4
T59/60
T1/2
tPRD DOUT tSU(L-CLK) tH(CLK-L)
tDRHL
(OTHERS)
ML9261/62
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FUNCTIONAL DESCRIPTION
Display Data Reset When power turned shift register outputs (PO1 PO60) register outputs O60) indeterminate. Consequently display tube flickers because unnecessary driver outputs high. prevent such flicker, required perform following operations. Turn logic power supply while input kept low. input high. Switch input from level high level least once. performing above operations, shift register outputs (PO1 PO60) register outputs O60) low. Enter display data. input high. Data Transfer Write display data using serial transfer. Serial data input shift register rising edge input pulse. When input rises, display data written latch. Driver Output Control turn driver outputs using display data transfered into shift register, input high input low. driver outputs low, input low. driver outputs high, input input high time.
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Semiconductor Function Table Shift register
Input PO1n Shift Register Parallel PO1n PO2n PO2n PO59 PO58n PO58n PO59n PO60 PO59n PO59n PO60n
ML9261/62
Output DOUT PO59n PO59n PO60n
Don't Care PO1n PO59n: PO59 data just before CLOCK rises.
Register
Input Don't Care, Shift Register Parallel Latch Output Change
Driver output
Input Latch Output Output HVOm
Don't Care,
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Semiconductor Test circuit
20pF VDISP HVO1 1.0kW 20pF HVO1 1.0kW 30pF DOUT L-GND D-GND HVO1
ML9261/62
1.0kW 20pF
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PACKAGE DIMENSIONS
(Unit
SSOP70-P-500-0.80-K
Mirror finish
Package material Lead frame material treatment Solder plate thickness Package weight
Epoxy resin alloy Solder plating more 2.15 TYP.
Notes Mounting Surface Mount Type Package SOP, QFP, TSOP, SOJ, (PLCC), surface mount type packages, which very susceptible heat reflow mounting humidity absorbed storage. Therefore, before perform reflow mounting, contact Oki's responsible sales person product name, package name, number, package code desired mounting conditions (reflow method, temperature times).
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E2Y0002-29-62
NOTICE
information contained herein change without notice owing product and/or technical improvements. Before using product, please make sure that information being referred up-to-date. outline action examples application circuits described herein have been chosen explanation standard action performance product. When planning product, please ensure that external conditions reflected actual circuit, assembly, program designs. When designing your product, please product below specified maximum ratings within specified operating ranges including, limited operating voltage, power dissipation, operating temperature. assumes responsibility liability whatsoever failure unusual unexpected operation resulting from misuse, neglect, improper installation, repair, alteration accident, improper handling, unusual physical electrical stress including, limited exposure parameters beyond specified maximum ratings operation outside specified operating range. Neither indemnity against license third party's industrial intellectual property right, etc. granted connection with product and/or information drawings contained herein. responsibility assumed infringement third party's right which result from thereof. products listed this document intended general electronics equipment commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products authorized system application that requires special enhanced quality reliability characteristics system application where failure such system application result loss damage property, death injury humans. Such applications include, limited traffic automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, life-support systems. Certain products this document need government approval before they exported particular countries. purchaser assumes responsibility determining legality export these products will take appropriate necessary steps their expense these. part contents contained herein reprinted reproduced without prior permission. MS-DOS registered trademark Microsoft Corporation.
Copyright 1999 Electric Industry Co., Ltd.
Printed Japan

Semiconductor ML9261/62 Semiconductor 60-Bit Vacuum Fluorescent D

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