Athlon Processor Model Model Revision Guide Publication 2255

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Athlon Processor Model Model Revision Guide Publication 2255

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Version Created August 2000
Athlon Processor
Model Model Revision Guide
Publication 22557 Rev: Issue Date: August 2000
2000 Advanced Micro Devices, Inc. rights reserved. contents this document provided connection with Advanced Micro Devices, Inc. ("AMD") products. makes representations warranties with respect accuracy completeness contents this publication reserves right make changes specifications product descriptions time without notice. license, whether express, implied, arising estoppel otherwise, intellectual property rights granted this publication. Except forth AMD's Standard Terms Conditions Sale, assumes liability whatsoever, disclaims express implied warranty, relating products including, limited implied warranty merchantability, fitness particular purpose, infringement intellectual property right. products described herein contain design defects errors ("Product Errata") that causes products deviate from published specifications. Currently characterized Product Errata available upon request. AMD's products designed, intended, authorized warranted components systems intended surgical implant into body, other applications intended support sustain life, other application which failure AMD's product could create situation where personal injury, death, severe property environmental damage occur. reserves right discontinue make changes products time without notice.
Trademarks AMD, logo, combinations thereof, Athlon, AMD-K7, AMD-751, AMD-756 trademarks Advanced Micro Devices, Inc. Other product names used this publication identification purposes only trademarks their respective companies.
22557D/0-August 2000
AthlonProcessor Model Model Revision Guide
AthlonProcessor Revision Guide
purpose AthlonProcessor Revision Guide communicate updated product information Athlon model model processors designers computer systems software developers. This guide consists five sections:
Product Marking Identification: This section, which starts page provides product types, product revisions, OPNs (Ordering Part Numbers), product marking information. Product Errata: This section, which starts page provides detailed description product errata, including potential effects system operation suggested workarounds. erratum defined deviation from product's specification. Product errata cause behavior Athlon processor deviate from published specifications. Product Enhancements: This section, which starts page provides description product enhancements. Revision Determination: This section, which starts page shows Athlon processor identification numbers returned CPUID instruction each revision processor. Technical Documentation Support: This section, which starts page provides listing available technical support resources. also lists corrections, modifications, clarifications listed documents.
Revision Guide Policy
Occasionally, identifies deviations from changes specification Athlon processor. These changes documented Athlon Processor Model Model Revision Guide errata. Descriptions written assist system software designers using Athlon processor, corrections AMD's documentation Athlon processor included. This release documents currently characterized product errata.
Preliminary Information AthlonProcessor Model Model Revision Guide
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Product Marking Identification
Production Marking
Dynamic Marking Product
(Laser Marking)
Product Naming
(Pad Printed)
AthlonProcessor
Copyright Info
AMD-K7750MTR52B
219927999994
Serial
(Laser Marking)
2000 (Pad Printed)
Code (44x44)
(Laser Marking)
AMD-K7
Reserved Characters blank spaces positioned before this character.) FSB: B=200 Cache Divisor: 1=Standard/Generic cache, 2=Standard/Generic 2.5:1 cache Size Cache: 5=512Kbytes, 1=1Mbytes, 2=2Mbytes, etc. Case Temperature: 70°C (uses current codes) Operating Voltage: character 1.03-2.05V Package Type: M=Card Module, P=PGA, others Speed: 550MHz, 600MHz, 650MHz, 700MHz, 750MHz, etc. Family/Architecture: AMD-K7 Architecture
(OPN codes, Spec. 16-018.7,
Note: Spaces added number illustrated above viewing clarity only.
Figure Example AthlonProcessor Model Table Valid Ordering Part Number Combinations Model
AMD-K7550MTR51B AMD-K7600MTR51B AMD-K7650MTR51B AMD-K7700MTR51B AMD-K7750MTR52B AMD-K7800MPR52B AMD-K7850MPR52B
Notes:
Package Type Card Module Card Module Card Module Card Module Card Module Card Module Card Module
Operating Voltage 1.55V-1.65V 1.55V-1.65V 1.55V-1.65V 1.55V-1.65V 1.55V-1.65V 1.65V-1.75V 1.65V-1.75V
Plate Temperature 0°C-70°C 0°C-70°C 0°C-70°C 0°C-70°C 0°C-70°C 0°C-70°C 0°C-70°C
This table lists configurations planned supported volume this device. Consult local sales office confirm availability specific valid combinations check newly-released combinations.
22557D/0-August 2000
AthlonProcessor Model Model Revision Guide
Product Naming
(Pad Printed)
Dynamic Marking Product
(Laser Marking)
AthlonProcessor
Copyright Info
AMD-K7550MTR51B
219927999994
Serial
(Laser Marking)
2000 (Pad Printed)
Code (44x44)
(Laser Marking)
AMD-K7
Reserved Characters blank spaces positioned before this character.) FSB: B=200 Cache Divisor: 1=Standard/Generic cache Size Cache: 5=512Kbytes, 1=1Mbytes, 2=2Mbytes, etc. Case Temperature: 70°C (uses current codes) Operating Voltage: character 1.03-2.05V Package Type: M=Card Module, P=PGA, others Speed: 500MHz, 550MHz, 600MHz, 650MHz, etc. Family/Architecture: AMD-K7 Architecture
(OPN codes, Spec. 16-018.7,
Note: Spaces added number illustrated above viewing clarity only.
Figure Example AthlonProcessor Model
Table
Valid Ordering Part Number Combinations Model
Package Type Card Module Card Module Card Module Card Module Card Module Operating Voltage 1.55V-1.65V 1.55V-1.65V 1.55V-1.65V 1.55V-1.65V 1.55V-1.65V Plate Temperature 0°C-70°C 0°C-70°C 0°C-70°C 0°C-70°C 0°C-70°C
AMD-K7500MTR51B AMD-K7550MTR51B AMD-K7600MTR51B AMD-K7650MTR51B AMD-K7700MTR51B
Notes:
This table lists configurations planned supported volume this device. Consult local sales office confirm availability specific valid combinations check newly-released combinations.
Preliminary Information AthlonProcessor Model Model Revision Guide
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Product Errata
This section documents Athlon processor model model product errata. errata divided into categories assist referencing particular errata. unique tracking number each erratum been assigned within this document user convenience tracking errata within specific revision levels. Table cross-references revisions processor each erratum. indicates that erratum applies stepping. absence indicates that erratum does apply stepping. Shading within table indicates addition modification from previous release this document. Note: There missing errata numbers. Errata that have been resolved from early revisions processor have been deleted, errata that have been reconsidered have been deleted renumbered.
Table
Cross-Reference Product Revision Errata
Revision Numbers Errata Numbers Description Processor Internals Model
Model
Self-Modifying Code Case: Execution Stale Instruction Unit Control Register 408H Returns Incorrect Information Hangs During Microsoft Windows Suspend/Resume Sequence
PREFETCH
Interaction PREFETCH Followed Stores Writethrough, Cache-Disabled, Write-Protected (WT/CD/WP) Memory Types
Large Page Mappings
Large Page Mappings Suppressed When TSEG Range Enabled Large Page Mappings Suppressed When ASEG Range Enabled
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AthlonProcessor Model Model Revision Guide
Processor Internals
Self-Modifying Code Case: Execution Stale Instruction
Products Affected. Normal Specified Operation. Code-modifying store flushes in-flight instructions from pipeline. Non-conformance. Under specific extreme conditions, in-flight instruction escape detection internal self-modifying code mechanisms, resulting possible execution stale instruction. following conditions required this erratum occur:
instruction being modified initially present instruction cache data cache simultaneously. code modifying store correctly determines that instruction cache line invalidation required. stale instruction fetched launched in-flight just invalidation arrives. other instructions from that cache line in-flight anywhere processor.
Under these conditions, one-time execution unmodified (stale) instruction occur, even though line correctly invalidated from instruction cache. Potential Effect System. None expected. This non-conformance never been detected real system software. Suggested Workaround. None. Resolution Status. planned future Revision.
Preliminary Information AthlonProcessor Model Model Revision Guide
22557D/0-August 2000
Unit Control Register 408H Returns Incorrect Information
Products Affected. Normal Specified Operation. System reads 408h, Unit Control Register, should return correct information. Non-conformance. Reads Machine Check Architecture (MCA) Unit Control 408h return incorrect information. returns information stored upper bits Status 409h instead. Potential Effect System. system reads this control register, upper bits, which reported EDX, contain unexpected data. Suggested Workaround. This register only implemented 32-bit register. Ignore upper bits which reported EDX. Resolution Status. planned.
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AthlonProcessor Model Model Revision Guide
Hangs During Microsoft Windows Suspend/Resume Sequence
Products Affected. Normal Specified Operation. processor should resume properly after wakeup event while system suspend mode. Non-conformance. Some processor modules contain cache SRAMs that support low-power mode. During suspend/resume sequence (e.g. Microsoft Windows suspend), processor directs these SRAMs enter exit low-power mode. However, elevated temperatures, small percentage SRAM devices properly exit this mode. result cache corruption possible system lockup. Potential Effect System. Some processor modules cause system hang. Suggested Workaround. BIOS prevent these cache SRAMs from entering low-power state during Microsoft Windows suspend mode. Please "AMD Athlon Processor Cache Initialization Application Note" order number 23165, revision description recommended change. Resolution Status. planned.
Preliminary Information AthlonProcessor Model Model Revision Guide
22557D/0-August 2000
PREFETCH
Interaction PREFETCH Followed Stores Writethrough, Cache-Disabled, Write-Protected (WT/CD/WP) Memory Types
Products Affected. Normal Specified Operation. processor maintains cache coherency. Non-conformance. line prefetched subsequently stored (within execution dozen instructions before intervening loads), then just-prefetched line invalidated when store sent external system. line prefetched subsequently stored (within execution dozen instructions before intervening loads), then just-prefetched line written when store sent external system. Other versions failure also encountered several aliased, page-mapping scenarios:
Prefetch line, store mapping Prefetch line, store mapping Prefetch line, store mapping
Potential Effect System. None expected because these memory types generally used with PREFETCH instruction. However, PREFETCH used with WT/WP memory types, store goes bus, leaving just prefetched line cache incoherent state. Suggested Workaround. None. These memory types generally used with PREFETCH. Resolution Status. planned future Revision.
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AthlonProcessor Model Model Revision Guide
Large Page Mappings
Large Page Mappings Suppressed When TSEG Range Enabled
Products Affected. Normal Specified Operation. When TSEG range enabled, Athlon processor should suppress large page Mbytes/4 Mbytes) mappings that overlap this range. Non-conformance. This erratum result slight performance degradation. There functional impact. Athlon processor suppresses large page mappings when TSEG range enabled-whether they intersect that region not. Potential Effect System. system that employs TSEG range does derive performance benefit from using large pages. large page mappings decomposed into 4-Kbyte fragments cached normal 4-Kbyte TLBs. This behavior does depend whether processor time. Rather, occurs whenever TSEG range enabled system. Suggested Workaround. following workarounds possible:
nothing. This erratum performance issue only. TSEG range (use only legacy ASEG range). Enable TSEG range only while processor (from ASEG range).
Resolution Status. planned future Revision.
Preliminary Information AthlonProcessor Model Model Revision Guide
22557D/0-August 2000
Large Page Mappings Suppressed When ASEG Range Enabled
Products Affected. Normal Specified Operation. When ASEG range enabled, Athlon processor should suppress large page Mbytes/4 Mbytes) mappings that overlap that range. Non-conformance. When ASEG range enabled, Athlon processor does suppress large page mappings that overlap that range. Potential Effect System. This non-conformance been observed system software. This non-conformance consequence because system that uses ASEG range (the legacy range) also uses fixed range MTRRs first Mbyte address space. enabling fixed range MTRRs itself causes required large page decomposition behavior this region. problem could only made visible system (that used large page mapping first Mbytes/4 Mbytes) employed ASEG range employ fixed range MTRRs. such system known exist. Suggested Workaround. None Resolution Status. planned future Revision.
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AthlonProcessor Model Model Revision Guide
Product Enhancements
Enhancements Model Stepping Greater
PDEs PTEs Cacheable DRAM
force cacheable (TLBC) hardware control register (bit HWCR) forces reload accesses DRAM cacheable, independent MTRR configuration. This ignored cache disabled. reset state this cleared. When TLBC set, processor assumes PDEs PTEs cacheable memory. This feature allows potential performance improvements. detailed information regarding this enhancment, Athlon Processor BIOS Developers Guide, order number 21656.
Preliminary Information AthlonProcessor Model Model Revision Guide
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Revision Determination
Table shows Athlon processor identification numbers returned CPUID instruction each revision processor.
Table
CPUID Values Revisions AthlonProcessor
Revision
CPUID
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AthlonProcessor Model Model Revision Guide
Technical Documentation Support
Documentation Support
following documents provide additional information regarding operation Athlon processor:
AthlonProcessor Data Sheet (order# 21016) AMD-751System Controller Data Sheet (order# 21910) AMD-756Peripheral Controller Data Sheet (order# 22548) AthlonSystem Specification (order# 21902) AthlonProcessor BIOS, Software, Debug Tools Developers Guide (order# 21656)
latest updates, refer www.amd.com download appropriate files. documents under NDA, please contact your local sales representative updates.

Athlon Processor Model Model Revision Guide Publication 2255

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