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Am486® Microprocessor Customer Development Platform
User's Manual
Order #22408A
Am486® Microprocessor Customer Development Platform User's Manual
1998 Advanced Micro Devices, Inc. rights reserved. part this publication reproduced, stored retrieval system, transmitted form means, electronic, mechanical, photocopying, recording, otherwise, without prior written permission Advanced Micro Devices, Inc. Use, duplication, disclosure Government subject restrictions forth subdivision (b)(3)(ii) Rights Technical Data Computer Software clause 252.227-7013. Advanced Micro Devices, Inc., 5204 White Blvd., Austin, 78741. AMD, logo, combinations thereof, Comm86, E86, E86MON, PCnet trademarks Am486, MACH, registered trademarks FusionE86 service mark Advanced Micro Devices, Inc. Vantis trademark Vantis Corporation. Microsoft Windows registered trademarks Microsoft Corp. Other product brand names used solely identification trademarks registered trademarks their respective companies.
HAVE QUESTIONS, WE'RE HERE HELP YOU.
customer service network includes U.S. offices, international offices, customer training center. Technical assistance available from worldwide staff field application engineers factory support staff answer E86and Comm86microcontroller family hardware software development questions. Frequently accessed numbers listed below. Additional contact information listed back this manual. AMD's site lists latest phone numbers.
Technical Support
Answers technical questions available online, through e-mail, telephone. AMD's home page www.amd.com follow Service link latest technical support phone numbers, software, Frequently Asked Questions. technical support questions Comm86 products, send e-mail epd.support@amd.com Canada) euro.tech@amd.com Europe UK). also call Corporate Applications Hotline (800) 222-9323 44-(0) 1276-803-299 Toll-free U.S. Canada U.K. Europe hotline
Support
specific information Comm86 products, access home page www.amd.com follow Embedded Processors link. These pages provide information upcoming product releases, overviews existing products, information product support tools, list technical documentation. Support tools include online benchmarking tools CodeKitsoftware-tested source code example applications. Many technical documents available online form. Questions, requests, input concerning AMD's pages sent e-mail webmaster@amd.com.
Documentation Literature Support
Data books, user's manuals, data sheets, application notes, product free with simple phone call. Internationally, contact your local sales office product literature. order literature, call: (800) 222-9323 (512) 602-5651 (512) 602-7639 Toll-free U.S. Canada Direct dial worldwide
Third-Party Support
FusionE86SM program partners provide array products designed meet critical time-to-market needs. Products solutions available include emulators, hardware software debuggers, board-level products, software development tools, among others. site Family Products Development Tools order #21058, describe these solutions. addition, mature development tools applications platform widely available general marketplace.
Am486® Microprocessor Customer Development Platform
Contents
About Customer Development Platform
Evaluation Board Features xiii Am486® Microprocessor xiii Core Logic Chipset xiii DRAM Main Memory. Boot Flash Memory. Onboard Cache Compatibility.xv PC-Style Super I/O.xv Keyboard Mouse Controller Onboard 10/100-Mbit/s Ethernet Expansion Support Development Support. Form Factor BIOS Software Customer Development Platform Documentation xvii About This Manual xvii Suggested Reference Material. xviii Documentation Conventions.
Am486® Microprocessor Customer Development Platform
Chapter
Quick Start
Setting Installation Requirements. Board Installation Starting from Diskette Starting from Hard Drive Installation Troubleshooting.
Chapter
Board Functional Description
Feature Layout Diagrams. Jumper Functions. Board Restrictions Board Features Am486 Microprocessor (M14). Core Logic Chipset (M8, I13, D15) 2-11 Onboard Ethernet Controller (F7) 2-13 4-Kbyte Serial EEPROM (C4) 2-14 Development Support. 2-15 (I7). 2-19 Level-2 Cache Memory (K19-N19 N11). 2-20 DRAM Main Memory (P7). 2-20 Boot (C16). 2-21 Flash Memory (F20) 2-23 Flash Memory (L21) 2-25 Real-Time Clock (G17) 2-27 Interface (A7). 2-28
Am486® Microprocessor Customer Development Platform
Super (C19). 2-28 Hard Drive M4). 2-31 Keyboard (O1) 2-31 Mouse (M1). 2-31 Voltage Adjustment (Q15-Q16). 2-32 Power Supply Connectors 2-33 Reset Interrupt Switches Headers. 2-34 Resistor Options 2-35
Appendix
Default Settings
Appendix
Bill Materials Schematics
Board Bill Materials (BOM) .B-2 Schematics.B-10
Index
Am486® Microprocessor Customer Development Platform
List Figures
Figure 0-1. Overview. Figure 2-1. Overview (Same Figure 0-1). Figure 2-2. Block Diagram. Figure 2-3. Layout Figure 2-4. Am486 Microprocessor Block Diagram. 2-10 Figure 2-5. JP32 JP33 Jumper Configuration (B14-C14). 2-22 Figure 2-6. Typical Memory With Flash Memory 2-24 Figure 2-7. Serial Port Connector Pins (J8, 2-29 Figure 2-8. Parallel Port Socket (J4) 2-30 Figure 2-9. Voltage Jumper Default Configuration (Q15-Q16) 2-32 Figure 2-10. Ground Wire Connections 2-33
viii
Am486® Microprocessor Customer Development Platform
List Tables
Table 0-1. Table 1-1. Table 2-1. Table 2-2. Table 2-3. Table 2-4. Table 2-5. Table 2-6. Table 2-7. Table 2-8. Table 2-9. Notational Conventions Installation Troubleshooting Board Jumper Summary Configuration Addressing 2-11 Analyzer Headers 2-16 Master Test Points 2-17 Interrupt Usage 2-18 Interrupt Routing. 2-19 SIMM Socket Population Chart 2-21 Serial Port Pin/Signal Table 2-29 Parallel Port Pin/Signal Table 2-30
Table 2-10. Switch Summary 2-34 Table 2-11. Resistor Options 2-35 Table A-1. Default Jumper Settings
Am486® Microprocessor Customer Development Platform
Am486® Microprocessor Customer Development Platform
About Customer Development Platform
Congratulations your decision design with Am486® microprocessor. Am486 microprocessor customer development platform (CDP) provides reference design embedded Am486 microprocessor-based systems using Peripheral Component Interconnect (PCI) with onboard 100-Mbit/s Ethernet connection. includes Mbytes Flash memory, expansion connectors, standard peripherals allow customers develop benchmark network-ready firmware applications their embedded products. addition, platform's cost, off-the-shelf components makes suitable example training reference customer hardware designs. demonstrates that fifth-generation microprocessor required include customer designs. Note: Advanced Micro Devices does assume responsibility maintenance this evaluation tool. Changes schematics will made only board required back through layout. Refer Am486 microprocessor documentation (listed page xviii) detailed information Am486 microprocessor. Figure page provides overview CDP's features.
Am486® Microprocessor Customer Development Platform
Am486® Microprocessor
JTAG Port Logic Analyzer Headers In-Circuit Emulator Support Zero-Insertion-Force Socket Fan/Heat Sink Included
Level-2 Cache
Kbyte Write-Back Policy
DRAM
Three 72-pin SIMM Sockets Supports Mbytes DRAM Mbytes 60-ns DRAM Installed
Flash Memory
Addressed fourth DRAM bank 8-Mbyte Flash Memory Faster than Flash Memory Coexists with Mbyte DRAM
M1489
Cache, Memory, DRAM Controller (Northbridge Chip) Logic Analyzer Headers NMI, SMI, Reset Switches
Ethernet Controller
Am79C972 Device 10/100Base-T Port Three Connection Status LEDs Extra EEPROM User Data
Interface
Supports Four Devices Connector Status LEDs
Expansion
Connectors
M1487
Bridge (Southbridge Chip) Arbiter
Boot Socket
Bits Wide BIOS Included
Expansion
Connectors
DS1685 Real-Time Clock Year-2000 Compliant Bytes Nonvolatile
Flash Memory
Mbyte, Bits Wide
Super
IrDA Module Serial Ports with Status LEDs Parallel Port Floppy Disk Interface
M5042 Keyboard Controller
Keyboard Controller PS/2 Mouse Controller
Display
Port 80h, Bits Wide Port 680h, Bits Wide
Test Interface Port
Figure 0-1. Overview
Am486® Microprocessor Customer Development Platform User's Manual
Evaluation Board Features
This section describes following features CDP: Am486® Microprocessor, page xiii Core Logic Chipset, page xiii DRAM Main Memory, page Boot Flash Memory, page Onboard Cache, page Compatibility, page PC-Style Super I/O, page Keyboard Mouse Controller, page Onboard 10/100-Mbit/s Ethernet, page Expansion Support, page Development Support, page Form Factor, page BIOS Software, page
Am486® Microprocessor
Am486 microprocessor included. Supports Am486 DX2, DX4, microprocessors (168-pin pin-grid array (PGA), 3.45 Zero insertion force (ZIF) microprocessor socket emulator support. voltage jumper selectable.
Core Logic Chipset
Acer Labs FINALi chipset M1489 Cache, Memory, Controller M1487 Bridge Controller M5402 Mouse/Keyboard Controller
Am486® Microprocessor Customer Development Platform
xiii
DRAM Main Memory
Mbyte 60-ns DRAM installed. Supports one, two, three banks 36-bit-wide DRAM using industry standard 72-pin SIMMs. DRAM fast page mode (FPM) extended data (EDO). Supports 16-Mbit technology DRAMs. Three SIMM sockets. banks socket. Three banks DRAM maximum. DRAM accessible masters. L1/L2 cache snoop cycles generated master memory accesses. Wait-state timing configurable through chipset registers.
Boot Flash Memory
socket provided 8-bit-wide boot ROM, logically bus. Mbyte 16-bit-wide Flash memory soldered board, logically bus. 8-Mbyte Flash memory execute-in-place (EIP) applications, located memory place DRAM bank. Flash implemented using 22V10 PAL® device glue logic.
Onboard Cache
512-Kbyte cache size, configured 32-bit-wide memory. Write-back write-through protocol configurable through chipset registers. 32-Kbyte SRAM cache space, soldered board. Four 128-Kbyte SRAMs cache data space, soldered board. 2-1-1-1 (read) 2-2-2-2 (write) burst timing with 15-ns data 10-ns SRAMs.
Am486® Microprocessor Customer Development Platform User's Manual
Compatibility
interface chipset. Standard chipset configuration registers, known BIOS DOS. Off-the-shelf chipset provides common functions found 82C59 interrupt controllers (SMI, NMI, support) 82C54 programmable interval timer 82C37 controllers (seven channels) External boot chip-select signal PC-style real-time clock (RTC) (non-Y2K-compliant, disabled default) DS1285 Y2K-compliant chip. DS1285 disabled, non-Y2K enabled, removing resistor populating another.
PC-Style Super
PC-AT compatible I/O. 16550-compatible serial ports. parallel port. Supports enhanced parallel port (EPP) extended capabilities port (ECP) modes. Floppy disk interface. IrDA port with external transceiver (115 Kbyte/s).
Keyboard Mouse Controller
8042-compatible controller chip (included chipset). keyboard interface. PS/2 Mouse interface.
Am486® Microprocessor Customer Development Platform
Onboard 10/100-Mbit/s Ethernet
PCnetTM-Fast+ Ethernet Controller Chip, Am79C972. 32-bit interface with mastering capability. Integrated 12-Kbyte buffer. External transceiver full duplex operation Mbit/s. IEEE802.3, PC97, PC98, NetPC compliance. Preprogrammed 1-Kbyte serial EEPROM included Ethernet configuration. Extra 4-Kbyte serial EEPROM included user nonvolatile data.
Expansion Support
expansion connectors, desktop style. 16-bit expansion connectors, desktop style.
Development Support
In-circuit emulator (ICE) support with socketed microprocessor package. Logic analyzer headers signals. Switches (push-button) NMI, SMI, RESET. LEDs IDE, serial port, Ethernet activity, Ethernet link speed. port 680h hexadecimal displays. Am486 microprocessor JTAG support. Connector embedded systems Test Interface Port (TIP) board.
Form Factor
Baby-AT motherboard form factor. Fits standard desktop-PC-style chassis.
BIOS Software
included diskette contains information about included BIOS additional utility demonstration software CDP.
Am486® Microprocessor Customer Development Platform User's Manual
Customer Development Platform Documentation
Am486® Microprocessor Customer Development Platform User's Manual provides information design function development platform. software shipped with board described README files online BIOS manual included with your kit. included online documentation text Adobe Acrobat (PDF) format. latest Acrobat Reader available from Adobe's site World Wide (currently www.adobe.com).
About This Manual
Chapter "Quick Start" helps quickly start using CDP. Chapter "Board Functional Description" contains descriptions basic sections evaluation board: layout, microprocessor, core logic chipset, Ethernet controller, DRAM, boot Flash memory, interfaces, super I/O, keyboard mouse, drives, interrupt switches. Appendix "Default Settings" summarizes jumper configuration resistor positions when shipped. Appendix "Bill Materials Schematics" shows bill materials evaluation board, actual schematics used build board.
Am486® Microprocessor Customer Development Platform
xvii
Suggested Reference Material
following documentation interest user. information ordering literature, page iii. Enhanced Am486®DX Microprocessor Family Data Sheet, order #20736 Am486®DX/DX2 Microprocessor Hardware Reference Manual, order #17965 Am486® Microprocessor Software User's Manual, order #18497 Am79C972 PCnetTM-FAST+ Enhanced 10/100 Mbps Ethernet Controller with OnNow Support Data Sheet, order #21485 Family Products Development Tools order #21058 Flash Memory Products Data Book, order 11796 current application notes technical bulletins, World Wide page www.amd.com. following non-AMD documents also recommended: Application Note DS1585/87, DS1685/87, DS17x85/87 Accessing Extended User Software Dallas Semiconductor, www.dalsemi.com. DS1685/DS1687 Volt/5 Volt Real Time Clock Data Sheet Dallas Semiconductor, www.dalsemi.com. FINALi M1489/1487 Chip Preliminary Data Sheet Acer Laboratories Inc., www.acerlabs.com contact information. Related BIOS guidelines, errata, application documents also available. M5113: Enhanced Super Controller Data Sheet Acer Laboratories Inc., www.acerlabs.com contact information.
xviii
Am486® Microprocessor Customer Development Platform User's Manual
Documentation Conventions
Advanced Micro Devices Am486® Microprocessor Customer Development Platform User's Manual uses conventions shown Table (unless otherwise noted). These same conventions used family support product manuals. Table 0-1. Notational Conventions Symbol Boldface Usage Indicates that characters must entered exactly shown, except that alphabetic case only significant when indicated. Indicates descriptive term replaced with user-specified term. Indicates computer text input output example listing. Encloses optional argument. include information described within brackets, type only arguments, brackets themselves. Encloses required argument. include information described within braces, type only arguments, braces themselves. Indicates inclusive range. Indicates that term repeated. Separates alternate choices list only choices entered. Indicates that terms either side sign equivalent.
Italic Typewriter face
Am486® Microprocessor Customer Development Platform
Am486® Microprocessor Customer Development Platform User's Manual
Chapter Quick Start
This chapter provides information that helps quickly start using Am486® microprocessor customer development platform (CDP). shipped with BIOS that been configured specifically chipset used this platform. BIOS contains code that enables function standard AT-compatible using AT-compatible displays, display adapters, keyboards. Details BIOS found BIOS documentation shipped diskette with your kit. AT-compatible operating system software. start system with either bootable diskette (IDE) hard disk drive that already operating system installed. Embedded BIOS software typically supports configuration onboard Flash memory resident flash disk (RFD) that also boot device. online BIOS manual included with your kit. information CDP, page 1-2. Boot from diskette, page 1-6. Boot from hard disk drive, page 1-7. Troubleshoot installation problems, page 1-8.
Am486® Microprocessor Customer Development Platform
Setting
CAUTION: with computer equipment, damaged electrostatic discharge (ESD). Please take proper precautions when handling board.
Warning: Read before using this development platform
Before applying power, following precautions should taken avoid damage misuse board: Make sure power supply connectors (from standard system power supply) plugged onto board correctly. grounds (usually black wires) must meet center power supply connectors board. "Power Supply Connectors P2)" page 2-33. Figure page connector positions. Check diskette that shipped with your README errata documentation. Read information carefully before continuing. current application notes technical bulletins, World Wide page www.amd.com follow link Embedded Systems.
Am486® Microprocessor Customer Development Platform User's Manual
Installation Requirements
need provide following items addition from kit). Required setups: VGA-compatible monitor PCI- ISA-bus video card that supports cable connect monitor video card AT-compatible keyboard PS/2-style mouse needed your operating system) standard AT-style power supply boot from floppy diskette: AT-compatible 3.5-inch 5.25-inch diskette drive bootable diskette standard 34-wire diskette drive cable boot from hard disk drive: ATA-compatible hard disk drive AT-compatible operating system (preinstalled hard disk drive) standard 40-pin cable install both floppy diskette drive hard disk drive, boot from either device. Only boot disk image (floppy hard disk) required. example, boot from floppy then install operating system blank hard disk drive. CAUTION: configuration described here when first start CDP. Before using other features, read appropriate sections Chapter "Board Functional Description."
Am486® Microprocessor Customer Development Platform
Board Installation
Note: Figure page block diagram board. Figure page layout diagram board, including connector locations referenced this section. DANGER: Make sure power supply monitor plugged into electrical outlet during following steps.
Remove board from shipping carton. Visually inspect board verify that damaged during shipment. board contains several jumpers. following steps assume jumpers factory default configuration (settings listed Appendix "Default Settings"). installing diskette drive, perform following steps: Inspect 34-wire, diskette-drive cable that providing. wire along edge ribbon cable indicates wire Most cables have connector board more connectors along length. There different drive connectors each location accommodate different drive types. Connect diskette-drive cable 34-pin connector (connector location E20) (with wire oriented towards middle board). there twist span cable, connect opposite board. Connect another connector diskette-drive cable diskette drive, just would standard installation. there twist cable, position determines whether drive responds (typically drive connects cable, beyond twist). connector's orientation should indicated drive documentation, marked near connector drive. Usually wire oriented towards drive's power cable connector. Find 4-wire power connectors from power supply attach 4-pin connector diskette drive just would standard installation.
Am486® Microprocessor Customer Development Platform User's Manual
installing hard disk drive, perform following steps: Inspect 40-wire cable that providing. wire along edge ribbon cable indicates wire Connect 40-wire cable hard drive just would standard installation. connector's orientation should indicated drive documentation, marked near connector drive. Usually wire oriented towards drive's power cable connector. Connect other 40-wire cable first 40-pin connector (connector location (with wire oriented towards edge board, near power supply connector). Find 4-wire power connectors from power supply attach 4-pin connector hard drive just would standard installation. Make sure heat sink securely attached microprocessor connect heat sink power wires spare disk drive power connector. power supply connectors same. Check voltage printed connect wires correct voltage pins appropriate power supply connector. Insert PCI- ISA-bus VGA-compatible video card into appropriate slot CDP. slots labeled SLT1 SLT2. slots labeled SL2. Connect monitor cable from monitor D-connector video card just would standard Connect keyboard keyboard connector (connector location O1). Connect PS/2 mouse used) mouse connector (connector location M1). Connect connectors (usually marked from standard power supply into board's power connectors location location N2). connects (the pins closest corner board); connects other pins. Make sure black ground wires from meet middle board's connectors. CAUTION: Failure verify power supply connections result total destruction CDP.
Am486® Microprocessor Customer Development Platform
Starting from Diskette
following steps start from bootable diskette: Make sure have installed correctly described "Setting CDP" page 1-2. CAUTION: Failure verify power supply connections result total destruction CDP.
Plug monitor into electrical outlet turn Insert bootable diskette (not included) disk drive. Apply power connecting power supply electrical outlet. power supply equipped with switch, turn power supply should start running, port LEDs should start display power-on self-test (POST) status codes. Then speaker should beep monitor should start displaying startup information. Make sure heat sink running. operate microprocessor without functioning heat sink fan. first time start system, BIOS might display message reporting CMOS error some other BIOS configuration problem. Follow instructions shown screen enter Setup utility. Once Setup utility, system's date, time, startup drive, other options. more information included BIOS, online BIOS manual included with your kit. Save exit setup utility. system should boot from diskette just like standard encounter problems, "Installation Troubleshooting" page 1-8.
Am486® Microprocessor Customer Development Platform User's Manual
Starting from Hard Drive
following steps start from hard drive which have preinstalled operating system (while connected another PC): Make sure have installed correctly described "Setting CDP" page 1-2. CAUTION: Failure verify power supply connections result total destruction CDP.
Plug monitor into electrical outlet turn diskette drive installed, make sure empty. Apply power connecting power supply electrical outlet. power supply equipped with switch, turn power supply hard disk should start running, port LEDs should start display power-on self-test (POST) status codes. Then speaker should beep monitor should start displaying startup information. Make sure heat sink running. operate microprocessor without functioning heat sink fan. first time start system, BIOS might display message reporting CMOS error some other BIOS configuration problem. Follow instructions shown screen enter Setup utility. Once Setup utility, system's date, time, startup drive, other options. BIOS setup utility, automatic configuration option Drive Select either physical addressing logical block addressing (LBA) appropriate your hard disk drive. more information included BIOS, online BIOS manual included with your kit. Save exit setup utility. system should boot using operating system hard disk. encounter problems, "Installation Troubleshooting" page 1-8.
Am486® Microprocessor Customer Development Platform
Installation Troubleshooting
Table 1-1. Installation Troubleshooting Problem Port readout blank after turn power supply. Port readout stuck nothing monitor hear beeps from speaker. hear head synchronization diskette drive attached). Port readout displayed some power-on-selftest (POST) numbers, then stopped number before system finished starting. hear beep speaker nothing monitor. Solution Check power supply connectors Ensure processor reset pressing Reset button, location Check that BIOS microprocessor correctly installed, that jumpers JP32 JP33 both off. Make sure cables connected properly, adapters seated firmly their slots, CMOS battery correctly installed. online BIOS documentation included with your list POST numbers meanings. Check that monitor plugged turned Check that monitor correctly connected video card. Check that video card correctly seated appropriate slot. Check that video card supports VGA. startup information monitor memory test stops incorrect memory size. Mbyte equals 1024 Kbyte.) startup information monitor says there's battery problem CMOS checksum error system doesn't finish booting. Make sure SIMMs that came with securely installed SIMM sockets.
Follow BIOS instructions Setup utility configure CMOS save settings.
Am486® Microprocessor Customer Development Platform User's Manual
Table 1-1. Installation Troubleshooting (Continued) Problem configured CMOS saved settings, settings lost next time turn CDP. don't hear sound from diskette drive system does boot from diskette. Solution Make sure fresh 3.0-V 20-mm coin cell installed correctly ("+" side facing battery holder location E12. Check that 34-wire cable diskette drive properly connected both drive board (board connector location E20). wire should oriented towards both drive board. Check that CMOS setup indicates that drive correct size capacity your diskette drive. hear diskette being accessed error message "Non System disk" "Drive found." Check that diskette drive bootable, just would standard Make sure diskette drive connected properly last connector cable. BIOS setup utility, make sure BIOS configured boot from diskette, that diskette size density configured properly. "Missing Keyboard" error message monitor during boot-up. BIOS debugging monitor prompt displayed. Check that AT-style keyboard properly connected.
Make sure switch pressed. Check that DRAM ISA-bus devices installed correctly known functional.
Am486® Microprocessor Customer Development Platform
Table 1-1. Installation Troubleshooting (Continued) Problem have installed hard disk with preinstalled operating system, won't access hard disk. Solution Check that 40-wire cable properly connected both drive board (board connector location L4). Check that CMOS setup configured correctly your drive. Make sure board will start from bootable diskette drive Then directory listing drive directory listing works, drive functioning there problem with drive's boot block system image. (Note that some operating systems will display error list empty directory. this happens, copying file drive; then directory listing again. this fails, check drive boot block viruses.) Make sure drive functions properly different system. There problem cannot resolve. Check that board default settings (see Appendix "Default Settings"). Contact Technical Support Hotline (see page iii).
1-10
Am486® Microprocessor Customer Development Platform User's Manual
Chapter Board Functional Description
Am486® microprocessor customer development platform (CDP) provides test development platform Am486 microprocessor-based designs. Read following sections learn more about board: Feature Layout Diagrams, page Jumper Functions, page Board Restrictions, page Board Features, page Am486 Microprocessor (M14), page Core Logic Chipset (M8, I13, D15), page 2-11 Onboard Ethernet Controller (F7), page 2-13 4-Kbyte Serial EEPROM (C4), page 2-14 Development Support, page 2-15 JTAG Ports (Q14 D17), page 2-15 Logic Analyzer Headers, page 2-15 In-Circuit Emulator Compatibility (M14, Q15-Q16), page 2-17 Hexadecimal Display (H23, J23), page 2-17 Test Interface Port (TIP) (A16), page 2-18 (I7), page 2-19 Level-2 Cache Memory (K19-N19 N11), page 2-20 DRAM Main Memory (P7), page 2-20 Boot (C16), page 2-21 Flash Memory (F20), page 2-23 Flash Memory (L21), page 2-25 Real-Time Clock (G17), page 2-27 Interface (A7), page 2-28 Super (C19), page 2-28 Serial Ports (E23 C23), page 2-29 IrDA Interface (A19), page 2-29 Parallel Port (A22), page 2-30 Floppy Disk Drive (E20), page 2-30
Am486® Microprocessor Customer Development Platform
Hard Drive M4), page 2-31 Keyboard (O1), page 2-31 Mouse (M1), page 2-31 Voltage Adjustment (Q15-Q16), page 2-32 Power Supply Connectors P2), page 2-33 Reset Interrupt Switches Headers, page 2-34 Resistor Options, page 2-35
appendices information about default board settings, bill materials, schematics.
Feature Layout Diagrams
following figures summarize features layout CDP. Figure page provides overview platform's features. Figure page block diagram platform. Figure page shows platform layout component locations.
Am486® Microprocessor Customer Development Platform User's Manual
Am486® Microprocessor
JTAG Port Logic Analyzer Headers In-Circuit Emulator Support Zero-Insertion-Force Socket Fan/Heat Sink Included
Level-2 Cache
Kbyte Write-Back Policy
DRAM
Three 72-pin SIMM Sockets Supports Mbytes DRAM Mbytes 60-ns DRAM Installed
Flash Memory
Addressed fourth DRAM bank 8-Mbyte Flash Memory Faster than Flash Memory Coexists with Mbyte DRAM
M1489
Cache, Memory, DRAM Controller (Northbridge Chip) Logic Analyzer Headers NMI, SMI, Reset Switches
Ethernet Controller
Am79C972 Device 10/100Base-T Port Three Connection Status LEDs Extra EEPROM User Data
Interface
Supports Four Devices Connector Status LEDs
Expansion
Connectors
M1487
Bridge (Southbridge Chip) Arbiter
Boot Socket
Bits Wide BIOS Included
Expansion
Connectors
DS1685 Real-Time Clock Year-2000 Compliant Bytes Nonvolatile
Flash Memory
Mbyte, Bits Wide
Super
IrDA Module Serial Ports with Status LEDs Parallel Port Floppy Disk Interface
M5042 Keyboard Controller
Keyboard Controller PS/2 Mouse Controller
Display
Port 80h, Bits Wide Port 680h, Bits Wide
Test Interface Port
Figure 2-1. Overview (Same Figure 0-1)
Am486® Microprocessor Customer Development Platform
JTAG
Power
Jumpers Logic Analyzer Header(s): Signals
DRAM 72-pin SIMM Socket DRAM 72-pin SIMM Socket DRAM 72-pin SIMM Socket
Am486® Microprocessor Grid Array (ZIF Socket)
Address
Onboard 512K Cache
Data
Control
Cache Control
DRAM-to-Flash Interface
Memory Address
8-Mbyte Flash Memory Execute-In-Place
M1489 Cache, Memory, Controller
Control Logic Analyzer Header(s): Signals
Connector Connector
Interface
MHz,
Am79C972 PCNet Fast+ Ethernet
M1487 Bridge Controller
1-Kbyte Config SEEPROM 4-Kbyte User SEEPROM Expansion Connector DS1685 Expansion Connector
Expansion Connector Expansion Connector
IrDA
M5113A Super Chip
Boot Socket (x8)
1-Mbyte FLASH Memory (x16)
Floppy Disk Connector Serial Port1 Connector Serial Port2 Connector Parallel Port Connector
E/net SIO1 SIO2 IDE0 IDE1 Reset
MACH® Logic M5042 Keyboard Controller
LEDs Debug
Board Interface
Keyboard Connector PS/2 Mouse Connector
LEDs
Switches
System Clocks
System Power
Figure 2-2. Block Diagram
Am486® Microprocessor Customer Development Platform User's Manual
Ethernet Conn.
Mouse
Power Conn.
Hard Disk Conn.
M5042 Kbd/ Mouse
Hard Disk Conn.
DRAM SIMM Slots
Am79C972
Slots
Ethernet Controller
Slots
M1489
Northbridge
Battery M1487
Southbridge
Am486® Microprocessor
Speaker
Conn.
Boot
MACH® Logic Chip
1685
Parallel Port
Floppy Conn.
Super
M5113
Flash
Flash Memory
Figure 2-3. Layout
Am486® Microprocessor Customer Development Platform
Jumper Functions
Table describes configuration jumpers CDP. Table 2-1. Board Jumper Summary Part Signal Description Location App. Figure Schematics Page Sheet More Info., See: page 2-32
CPUVCC3
Used with select either voltage adjustable voltage jumper JP4. Both must positioned same. Used with select either voltage adjustable voltage jumper JP4. Both must positioned same. Selects voltage used when "ADJ." selectable voltages 3.45 Used configure boot address signal A17. Used configure boot address signal A18.
CPUVCC3
Sheet
page 2-32
CPUV1, CPUV2, CPUV3
Sheet
page 2-32
JP32 JP33
Boot Boot
Sheet Sheet
page 2-21 page 2-21
Am486® Microprocessor Customer Development Platform User's Manual
Board Restrictions
Using chipset with Am486 microprocessor fast effective design working system, system's features limited chipset's capabilities. chipset used supports devices only. Three devices supported: onboard Ethernet controller slots. Except adjustable supply voltage 3.3-V Ethernet controller, uses power throughout. (The Am486 microprocessor provides 5V-tolerant I/O.) chipset does directly support Flash memory devices except boot ROM. possible implement Flash memory DRAM, bus, chipset only allows booting from boot ROM. ISA-bus Flash memory limited Mbyte because addressing considerations. implements banks execute-in-place (EIP) Flash memory place DRAM bank. Flash memory timing requirements limit chipset's DRAM interface Fast (not Fastest) speed when Flash memory used. This equivalent using 70-ns fast-page-mode (FPM) DRAM. chipset allows only three banks DRAM attached without external buffers. Buffering DRAM adds wait state reduces available performance. "DRAM Main Memory (P7)" page 2-20 describes additional DRAM device configuration limits. peripherals provided M1487 chip configured standard PC-AT compatibility, there much flexibility assigning interrupts channels. does implement OnNow Advanced Configuration Power Interface (ACPI) power management.
Board Features
remainder this chapter describes features CDP. number parentheses following each heading indicates part's location Figure page 2-5. addition, other locations referenced found figure.
Am486® Microprocessor Customer Development Platform
Am486 Microprocessor (M14)
includes Am486 microprocessor 168-pin, pin-grid-array package (part U25). microprocessor zero-insertion-force (ZIF) socketed heat sink provided cooling. debugging analysis, access provided Am486 microprocessor's JTAG debugging port microprocessor signals, support provided Intel-compatible in-circuit emulators. "Development Support" page 2-15. Enhanced Am486DX Microprocessor Family boosts system performance incorporating 16-Kbyte cache existing flexible clock control enhanced System Management mode (SMM) features CPU. Enhanced Am486DX Microprocessor Family following characteristics: Industry-standard write-back cache support Frequent instructions execute clock 105.6-million bytes/second burst Flexible write-through write-back address control Advanced 0.35-µ CMOS-process technology 3.3-V 3.45-V core with tolerant Dynamic data sizing 16-, 32-bit buses (the uses 32bit data bus) 32-bit address 32-bit registers Supports "soft reset" capability 16-Kbyte unified code data cache Four-way set-associative Write-through write-back policy (the uses write-back policy) Floating-point unit Paged, virtual memory management Stop clock control reduced power consumption Industry-standard two-pin System Management Interrupt (SMI) power management independent processor operating mode operating system
Am486® Microprocessor Customer Development Platform User's Manual
Static design with Auto Halt power-down support Wide range chipsets supporting available allow product differentiation (the uses Acer Laboratories Inc. FINALi chipset) Support available through FusionE86 Program
Am486® Microprocessor Customer Development Platform
VOLDET Power Plane 32-Bit Data 32-Bit Data Clock Generator 32-Bit Linear Address PCD, Barrel Shifter Register File Segmentation Unit
Paging Unit
VCC,
Clock Interface CLKMUL STPCLK
Interface Cache Unit Address Drivers Write Buffers 4x32 Copyback Buffers 4x32 Writeback Buffers 4x32 Data Transceivers D31-D0 A31-A2 BE3-BE0
Physical Address
Descriptor Registers Limit Attribute
Translation Lookaside Buffer Physical Address
16-Kbyte Cache
Displacement Micro-instruction Code Stream Floating Point Unit Central Protection Test Unit Decoded Instruction Path Instruction Decode 32-Byte Code Queue 2x16 Bytes Prefetcher
Control Request Sequencer
Floating Point Register File
Control
ADS, W/R, D/C, M/IO, PCD, PWT, RDY, LOCK, PLOCK, BOFF, A20M, BREQ, HOLD, HLDA, RESET, INTR, NMI, FERR, IGNNE, SMI, SMIACT, SRESET
Burst Control Size Control
BRDY, BLAST BS16,
Cache Control
KEN, FLUSH, AHOLD, CACHE, EADS, INV, WB/WT, HI
Parity Generation Control JTAG
PCHK, DP3-DP0 TDI, TCK, TDO,
Figure 2-4. Am486 Microprocessor Block Diagram
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Am486® Microprocessor Customer Development Platform User's Manual
Core Logic Chipset (M8, I13, D15)
uses Acer Laboratories Inc. FINALi chipset. chipset consists very-large-scale-integration (VLSI) devices that provide interface peripheral functions used system, plus M5042 keyboard mouse controller. "Keyboard (O1)" page 2-31. M1489 Cache, Memory, Controller (often called northbridge chip) interfaces Am486 microprocessor memory bus. M1489 (part location performs following functions: Controls DRAM accesses refresh cycles. "DRAM Main Memory (P7)" page 2-20 Provides 33-MHz, 2.0-compliant interface with signalling. "PCI (I7)" page 2-19 Maintains Level-1 Level-2 cache coherency PCI-master-initiated memory cycles. "Level-2 Cache Memory (K19-N19 N11)" page 2-20 Provides controller hard disk drive. "IDE Hard Drive M4)" page 2-31 routes three address signals series resistors IDSEL pins slots onboard Ethernet controller. chipset asserts these signals configure each device according device number written chipset's configuration address register. Table relates each device device number signal routing. Table 2-2. Configuration Addressing Device Device Number Slot SLT1 Slot SLT2 Ethernet Controller Device Device Device Address Signal PAD19 PAD20 PAD21 Select Signal PCIID1 PCIID2 PCIID3 App. schematics Sheet Sheet Sheet Sheet
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signals routed logic analyzer headers. "Development Support" page 2-15. M1487 Bridge Controller (often called southbridge chip) interfaces provides standard, PC-compatible peripherals devices common desktop computers. M1487 (Part location I13) provides following peripheral functions: 82C59 interrupt controllers 82C54 programmable interval timer 82C37 controllers real-time clock (RTC) (optional CDP, "Real-Time Clock (G17)" page 2-27) External boot decoding M1487's integrated peripherals configured standard PC-AT compatibility, there much flexibility assigning interrupts channels. M1487 also contains arbiter, which allows three additional masters. board uses master request/grant interface onboard Am79C972 Ethernet controller. other master interfaces routed expansion slots. M1489 M1487 communicate with each other across their proprietary LinkBus. LinkBus separate pins, instead uses address pins A17. LinkBus handles RTC, keyboard controller, boot transactions well; this address pins routed these devices schematics. chipset asserts Am486 microprocessor's AHOLD input three-state address pins when LinkBus use.
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Am486® Microprocessor Customer Development Platform User's Manual
Onboard Ethernet Controller (F7)
includes onboard, full-duplex 10/100BaseT Ethernet port based Am79C972 PCnetTM-FAST+ Ethernet Controller (part U51). separate voltage regulator provides 3.3-V power Ethernet controller. Ethernet port part location board. Three LEDs near port indicate transmit receive activity link speed. link lights Mbit/s operation established. Ethernet controller's interrupt output (INTA) routed chipset's INT2 signal. initialization code dynamically assigns INT2 interrupt request (IRQ) chipset's INTx routing table mapping registers. chipset documentation details mapping registers. Am79C972 PCnet-FAST+ device highly integrated 10/100 Mbps Ethernet controller. includes IEEE 802.3-compliant Ethernet Media Access Controller (MAC) with Auto-Negotiation Mbps half- fullduplex operation, Media Independent Interface (MII) connection standard IEEE 802.3 compliant 10/100 Mbps physical layer (PHY) device. Am79C972 contains high performance 32-bit master interface, well large, flexible internal memory buffers, provide high-speed data throughput system utilization. configuration, Ethernet controller accessed device number Am79C972 configured configuration space mechanism download configuration from 1-Kbyte serial EEPROM (part location D6). uses serial EEPROM interface configure Am79C972 device. EEPROM preprogrammed with Ethernet configuration suitable CDP. addition Ethernet configuration EEPROM, 4-Kbyte serial EEPROM provided user nonvolatile data. "4-Kbyte Serial EEPROM (C4)" page 2-14. customer designs, PCnet-FAST+ controller offered with AMD's extensive suite industry-proven PCnet software drivers, remote boot firmware (not supported CDP), complete supporting utilities design tools. Follow Networking link www.amd.com information about networking software, support, tools.
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PCnet-FAST+ device supports industry's specification. PCnetFAST+ device also complies with Microsoft's PC97 PC98 requirements fully supporting OnNow ACPI power management initiatives; however, does implement OnNow ACPI. customer design could support these technologies using ATX-style power supply motherboard design.
4-Kbyte Serial EEPROM (C4)
extra NM93C66M8 4-Kbyte serial EEPROM (part U81) connected Am79C972 Ethernet controller's serial EEPROM interface. This provides additional EEPROM space storing user nonvolatile data. M1487 device's CLKCTL signal (controlled chipset register 40h) used multiplex Ethernet controller's EEPROM chip select between 1-Kbyte EEPROM 4-Kbyte EEPROM. When CLKCTL asserted (the default), Ethernet controller's 1-Kbyte configuration EEPROM (part U54) accessed normally. When CLKCTL deasserted, Ethernet controller's EEPROM interface registers used access 4-Kbyte EEPROM store retrieve user data. Sheet schematics Appendix Software using 4-Kbyte EEPROM provided with CDP. readme file diskette that came with your information about available utilities.
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Am486® Microprocessor Customer Development Platform User's Manual
Development Support
includes following facilities development support: JTAG port CPU-bus PCI-bus logic analyzer headers Port Port hexadecimal displays board interface These features described following paragraphs.
JTAG Ports (Q14 D17)
Am486 microprocessor provides IEEE Standard 1149.1-1990 (JTAG) compliant test access port boundary-scan architecture. JTAG port provides scan interface testing microprocessor production environment. microprocessor's JTAG port available connector location Q14. attempt second JTAG port (part location D17). This port used program VantisMACH® programmable logic device. Reprogramming MACH device cause improper system operation. MACH device controls Flash memory space Port 680h hexadecimal displays. "ISA Flash Memory (F20)" page 2-23 "Hexadecimal Display (H23, J23)" page 2-17.
Logic Analyzer Headers
interface signals buffered routed headers logic analyzer. signals logic analyzer headers arranged compatible with disassembler 16500 Logic Analyzer, analyzer used. Table lists available headers, their locations Figure 2-3, Appendix schematics sheet which they appear. Sheet schematics includes usage notes.
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Table 2-3. Analyzer Headers Part Description Location Figure Page App. Schematics Sheet Sheet Sheet
Microprocessor data (GD) signals Microprocessor data (GD) signals Microprocessor control signals, plus qualifier (see note schematics Sheet Microprocessor address (GA) signals Microprocessor control signals Microprocessor address (GA) signals, including logicderived signals
Sheet Sheet Sheet
Address Data (PAD) signals Address Data (PAD) signals control signals control signals Miscellaneous microprocessor control signals C12-D13 C9-D10
Sheet Sheet Sheet Sheet Sheet
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Am486® Microprocessor Customer Development Platform User's Manual
addition logic analyzer headers, separate three-pin headers provided each device's request grant signals. These headers listed Table 2-4: Table 2-4. Master Test Points Part Signal Location Figure Page App. Schematics Sheet
JP29
PREQJ0 PGNTJ0 PREQJ1 PGNTJ1 PREQJ2 PGNTJ2
JP30
Sheet
JP31
Sheet
In-Circuit Emulator Compatibility (M14, Q15-Q16)
used with in-circuit emulator that mates pin-gridarray (PGA) zero-insertion-force (ZIF) socket place Am486 microprocessor. support emulators that Intel microprocessor, necessary power-supply jumpers provided board will work with Intel chips. "CPU Voltage Adjustment (Q15-Q16)" page 2-32. When connecting in-circuit emulator, risers might required allow proper placement relative microprocessor socket slots.
Hexadecimal Display (H23, J23)
includes 2-digit hexadecimal displays port port 680h debugging messages. change display value, perform 8-bit write port 680h, respectively. value written latched display cannot read back software.
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Test Interface Port (TIP) (A16)
includes connector Test Interface Port (TIP) board. board used testing debugging embedded product customer development platforms. connects through ribbon cable connector platform. board provides collection peripherals, such LEDs, hexadecimal displays, display, serial ports, parallel port, Ethernet controller, Flash memory, that convenient system development. CDP's connector resides interrupt request (IRQ) signals board connected. Individual connector signals listed Table 2-5. board documentation addressing information. Table 2-5. Interrupt Usage Function Ethernet parallel port serial port test function serial port Interrupt IRQ15 IRQ12 IRQ11 IRQ14 IRQ10
NOTE: board's usage conflict with CDP's onboard peripherals. Some peripherals operate correctly when board use.
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Am486® Microprocessor Customer Development Platform User's Manual
(I7)
desktop-PC-style expansion connectors (parts SLT1 SLT2) allow installation wide array off-the-shelf devices. These include standard devices such video, sound, SCSI, PCMCIA adapters, diagnostic devices such analyzers, extender cards, other diagnostic hardware. slots support 3.3-V peripherals. implemented chipset's M1489 northbridge chip except arbitration, which handled M1487. configuration, connector SLT1 addressed Device SLT2 addressed Device Table 2-2, "PCI Configuration Addressing," page 2-11. connector's interrupt signals routed shown Table 2-6. (The Ethernet interrupt signal also shown reference.) initialization code dynamically assigns interrupts interrupt request (IRQ) chipset's INTx routing table mapping registers. chipset documentation details mapping registers. Table 2-6. Interrupt Routing Interrupt Slot Signal Slot Signal INT0 INT1 INT2 INT3 INTA INTB INTC INTD INTD INTA INTB INTC Ethernet Signal INTA
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Level-2 Cache Memory (K19-N19 N11)
includes onboard 512-Kbyte, single-bank, direct-mapped, unified Level-2 cache. This largest single-bank cache allowed chipset. cache data static (SRAM) devices soldered onto board. 10-ns SRAM device 15-ns data SRAM devices used achieve 2-1-1-1 timing reads 2-2-2-2 writes. SRAM single 32-K 8-bit device, part U11, data SRAMs 128-K 8-bit devices, parts U10. Chipset registers allow level-2 cache disabled enabled. level-2 cache configured either write-back write-through operation. NOTE: benefit level-2 cache varies, depending software being used.
DRAM Main Memory (P7)
comes with three standard, 5-V, 72-pin single inline memory module (SIMM) sockets, populated with three 16-Mbyte, 60-ns, extended data (EDO) SIMMs. included SIMMs provide largest fastest DRAM configuration allowed this design. customer designs, SIMM configurations supported depend upon chipset initialization BIOS code used configure chipset's registers. chipset documentation information about detecting configuring DRAM. BIOS provided will automatically detect amount DRAM installed. chipset used this design supports 16-, 32-Mbyte SIMMS using 16-Mbit technology DRAM chips. Either fast page mode (FPM) SIMMs used, sockets filled with combination SIMMs. installed SIMMs must same speed, however. chipset allows either DRAM banks. Single- double-bank SIMMs combined shown Table page 2-21.
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Am486® Microprocessor Customer Development Platform User's Manual
Table 2-7. SIMM Socket Population Chart SIMM Single Bank SIMM Double Bank SIMM SIMM Single Bank SIMM Single Bank SIMM SIMM Single Bank SIMM
NOTE: 36-bit-wide memory used. However, 36-bit SIMMs accessed only bits wide because FINALi chipset does support SIMMs' 32-bit data plus 4-bit error correction code (ECC) format. Only traditional byte-wide parity supported.
Boot (C16)
provides 0.5-inch wide 32-pin socket (part U14) initialization BIOS device. boot implemented M1487 chip's LinkBus. boot socket populated with BIOS that allows boot DOS, Windows, real-time operating system (RTOS) immediately. platform must always boot from boot because chipset limitations. chipset does allow booting from another source such DRAM-bus, ISAbus, PCI-bus memory. boot address space size defaults Kbytes, using device address bits A0-A16, board design provides jumpers JP32 JP33 locations B14) configuring device's address signals. jumpers allow these address bits left High, tied Low, connected their corresponding signal. This provides flexibility addressing various sized Flash memory devices. Figure page 2-22
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JP33 (SA18)
JP32 (SA17)
Signal
(SA17 SA18)
Boot
(A17 A18)
Jumper Locations
Individual Jumper Schematic
Figure 2-5. JP32 JP33 Jumper Configuration (B14-C14)
default, jumpers JP32 JP33 connected, device pins tied High address 128-Kbyte BIOS range, E0000h-FFFFFh. these jumpers changed select addressing addresses C0000h-DFFFFh, software must enable addressing this space chipset register index 12h, bits 2-1, index 44h, bits 7-6. software compatibility, boot image appears from E0000h FFFFFh Am486 microprocessor's lower 1-Mbyte address space. (This assumes that 128-Kbyte boot used.) reset, however, microprocessor special state that causes fetch first instruction from FFFFFFF0h, extended memory range. provide first instruction, boot aliased begin FFFE0000h. first instructions typically jump, which ends special state causes microprocessor continue execution lower 1-Mbyte space. Because boot accesses relatively slow, subsequent initialization code typically copies boot contents into DRAM space configures chipset's Shadow Region Register direct boot accesses this shadow image boot ROM.
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Am486® Microprocessor Customer Development Platform User's Manual
Flash Memory (F20)
includes Mbyte 16-bit wide Flash memory soldered onto board located logically Bus. Vantis MACH programmable logic device used control interface between Flash device. This provides example small amount Flash memory might implemented customer designs. Flash memory employs Am29F800 top-sector boot block Flash memory chip (part U58). This device occupies memory space from address F00000h FFFFFFh. Figure page 2-24. Software should access this space 16-bit words even addresses. Software enable this memory space setting chipset's Function Register, index 12h. This disables DRAM access 1-Mbyte range from F00000h FFFFFFh, allowing access memory space instead. index clear, access Flash memory space allowed only Mbytes less DRAM installed. Flash device configured word mode, only 16-bit access allowed. address signals routed that address routed Flash device, only addressed even word boundaries. When generating Flash command sequences, multiply Flash address generate correct address. example, writing address F00AAAh asserts 555h (AAAh Flash device's address pins. Am29F800 programmed using JDEC single-power-supply Flash standard command set. Am29F800 documentation details. Software using Flash memory provided with CDP. readme file diskette that came with your information about available utilities. space limited Mbytes, because chipset provides limited support mapping memory windows over DRAM, only Mbyte Flash memory provided. However, customer design with small amount DRAM, larger Flash memory space situated between DRAM Mbyte address limit. Note that access memory relatively slow when compared DRAM transactions. "EIP Flash Memory (L21)" page 2-25 another approach.
Am486® Microprocessor Customer Development Platform
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Mbyte) 37FFFFFh
Flash Bank
3400000h Mbyte) 33FFFFFh
Flash Bank
3000000h Mbyte) 2FFFFFFh
Accessed Fourth DRAM Bank (Bank Location Depends DRAM Size
DRAM
1000000h Mbyte) FFFFFFh
Flash Memory
F00000h Mbyte) EFFFFFh
Enabled Chipset Register 12h,
DRAM
100000h Mbyte) 0FFFFFh
Kbyte Boot
DRAM
000000h
Figure 2-6. Typical Memory With Flash Memory
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Am486® Microprocessor Customer Development Platform User's Manual
Flash Memory (L21)
includes Mbytes Flash memory execute-in-place (EIP) applications. Flash memory implemented fourth bank (bank DRAM controller's address space. This memory consists eight 29F800B top-sector boot block Flash memory devices (parts U61, U62, U63, U64, U65, U66, U67, U68), soldered board organized 32-bit wide Flash memory banks. Flash memory controlled 22V10 PAL® device programmed simple DRAM-to-Flash interface that makes Flash memory appear M1489 DRAM controller single bank 32-bit-wide DRAM. provided BIOS enables Flash memory configures other DRAM banks accordingly. enable Flash memory, BIOS programs chipset's DRAM Configuration Register (index 11h, bits 4-7) fourth DRAM bank accessed 2-Mbyte row, column) DRAM chips. DRAM-to-Flash interface uses address Flash memory bank switching (A22 routed DRAM address selected configuration). Because timing requirements, also necessary program chipset's DRAM Configuration Timing Control registers (index 1Bh) disable hidden refresh, disable RAS-only refresh, select Fast access mode (not Fastest), select before refresh. This affects four DRAM banks. Flash memory accessed only bus-master access Flash allowed), accesses bits wide. During normal operation, Flash memory read like other DRAM memory, data cannot written directly. Instead, Am29F800 devices programmed using JDEC single-power-supply Flash standard command set. Am29F800 documentation details. Software using Flash memory provided with CDP. readme file diskette that came with your information about available utilities. Software that writes Flash memory must make sure that accesses Flash memory cached. This done disabling Level-1 Level-2 memory caching, appropriate programming page tables paging enabled microprocessor.
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Software that writes Flash memory must also avoid back-to-back write cycles (including back-to-back non-burst cycles) Flash memory space. reliable writes, always read write different DRAM bank before after writes space. example, read location 00000h, write value Flash memory, then read location 00000h again. (Simply running Flash programming software normal DRAM space does ensure reliable Flash programming, even though caching disabled.) Reading Flash memory does entail timing restrictions that apply writes. microprocessor read Flash memory with combination single-beat burst read cycles. Flash memory itself organized banks. base address each bank depends much DRAM installed DRAM banks 0-2. board shipped with Mbytes installed, default first bank base address 3000000h Mbytes byte), second bank base address 3400000. Figure page 2-24. Software query chipset's DRAM Configuration Registers (index 11h) determine size banks 0-2. chipset documentation description these registers. Each Flash device configured byte mode, with four devices each bank. address signals routed that address routed Flash devices, space only addressed even 4-byte (32bit double-word) boundaries. When writing devices' control registers, multiply byte-mode register offset four generate correct address. example, bank base address 3000000h, writing address 3002AA8h asserts AAAh (2AA8h each Flash device's address pins.
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Am486® Microprocessor Customer Development Platform User's Manual
Real-Time Clock (G17)
real-time clock (RTC) function chipset's 1487 chip initially disabled CDP. Instead, separate DS1685 year-2000 (Y2K)-compliant enabled. DS1685 provides features widely-used, non-Y2K-compliant RTCs such DS1287. addition, DS1685 provides byte storing century information, plus other registers features found older chips. Because extra features, DS1685 completely compatible with DS1287. provided BIOS operates correctly with DS1685 RTC, extra features cause unexpected behavior customer-supplied BIOS used PC-AT compatible systems. example that DS1685 provides some interrupt sources that present DS1287 RTC. Customer-written initialization software take following steps disable extended interrupts: CMOS register enable access extended register bank DS1685. Write value CMOS address disable extended interrupt addresses. Clear CMOS register disable access extended register bank that legacy software behaves expected). Read CMOS register clear pending interrupts that were triggered while extended interrupts were enabled. DS1685 programming details, DS1685/DS1687 Volt/5 Volt Real Time Clock Data Sheet, Application Note DS1585/87, DS1685/87, DS17x85/87 Accessing Extended User Software, available from Dallas Semiconductor, www.dalsemi.com. desired, M1487's internal enabled instead DS1685 removing resistor part from back side board, beneath location I14. (See Sheet schematics Appendix
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Interface (A7)
populated with standard connectors (parts SL2) developers need devices their development systems. interface provided chipset's M1497 southbridge. devices that F00000h FFFFFFh address space cannot used CDP, because this area used Flash memory bank. "ISA Flash Memory (F20)" page 2-23. devices that C0000h DFFFFh address space cannot used this space enabled boot addressing. "Boot (C16)" page 2-21. Boot addressing this range might also cause conflicts with devices using D0000h DFFFF address space.
Super (C19)
uses M5113 Super chip provide standard input/output functions. Super chip provides: 16450/16550-compatible serial ports IrDA infrared interface AT-compatible parallel port 82077-compatible floppy disk interface
BIOS supplied with platform configures these peripherals operate they would standard Acer Laboratories Inc. M5113 data sheet detailed configuration information.
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Am486® Microprocessor Customer Development Platform User's Manual
Serial Ports (E23 C23)
platform's Super device includes 16550-compatible serial ports. These routed 9-pin D-shell connectors, Figure Table Light-emitting diodes (LEDs) provided near each serial port indicate transmit receive activity.
Notes: Figure page connector locations.
Figure 2-7. Serial Port Connector Pins (J8,
Table 2-8. Serial Port Pin/Signal Table Signal
IrDA Interface (A19)
Super device configured support infrared data transfers IrDA module, part U44. serial data transmission rates include UART rates Kbps). IrDA module connected dedicated pins M5113 Super chip. IrDA interface shares UART with serial port COM2. control M5113 chip controls whether UART communicates over COM2 port IrDA port. M5113: Enhanced Super Controller Data Sheet, available from Acer Laboratories Inc. www.acerlabs.com contact information.
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Parallel Port (A22)
Figure Table show parallel port pinouts.
Notes: Figure page connector locations.
Figure 2-8. Parallel Port Socket (J4)
Table 2-9. Parallel Port Pin/Signal Table 18-25 Signal STRB PD0-PD7 BUSY SLCT AFDT ERROR INIT SLCTIN
Floppy Disk Drive (E20)
CDP's Super chip provides floppy disk controller support system's floppy disk drive connector (part J6). Either 5.25-inch 3.5-inch floppy disk drive installed with standard 34-pin connector. details, "Board Installation" page 1-4.
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Am486® Microprocessor Customer Development Platform User's Manual
Hard Drive
contains standard 40-pin connectors (parts J7). M1498 chip provides hard drive controller. details connect single hard drive CDP, "Board Installation" page 1-4. located next each connector indicate activity. devices connector generate interrupts IRQ14, devices connector generate interrupts IRQ15. This interrupt mapping changed reprogramming chipset configuration registers. Each connector supports master slave device. only device attached connector, that device must configured master. two-position cable used attach devices single connector board, devices must configured master other slave. each device's documentation configuration details.
Keyboard (O1)
provides standard AT-compatible keyboard connector (part implemented chipset's M5402 mouse/keyboard controller chip (part location D15).
Mouse (M1)
port provided PS/2-style mouse (connector J11). This device driven M5402 mouse/keyboard controller chip.
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Voltage Adjustment (Q15-Q16)
power supply voltage adjusted moving jumper both jumpers CDP. Selectable voltages 3.45 Figure shows default configuration voltage jumpers (set 3.45 select either 3.3-V 2.5-V voltage, leave "ADJ" move jumper desired voltage. select operation, move both jumpers their position.
3.45
Figure 2-9. Voltage Jumper Default Configuration (Q15-Q16)
CAUTION: Jumpers must both placed same position. Positioning differently damage CDP.
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Am486® Microprocessor Customer Development Platform User's Manual
Power Supply Connectors
accepts standard PC-style motherboard power connectors supply power onboard components. ensure proper functionality power module, board's power supply sockets must inserted correctly onto board.
CAUTION: important that ground wires connector adjacent ground wires other. Figure 2-10.
Power Conn
Back Connector
Power Supply Conn.
Edge Board
Figure 2-10. Ground Wire Connections
Am486® Microprocessor Customer Development Platform
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Reset Interrupt Switches Headers
Three push-button switches provided user generate RESET, SMI, events. addition, two-pin header provided RESET signal that external pushbutton switch attached. These switches headers routed appropriate chipset signals listed Table 2-10. Table 2-10. Switch Summary Part Signal Description Location Figure Page App. Schematics Sheet Sheet Sheet
SW1, JP34
EXTSMI
Used reset system. Used generate event. Used generate event.
Embedded BIOS software typically enters debugging monitor when event generated. addition pressing switch, event caused PCI-bus parity error, DRAM parity error, ISA-bus IOCHCK error.
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Am486® Microprocessor Customer Development Platform User's Manual
Resistor Options
includes number resistor populate/depopulate options, which listed Table 2-11. Many used only manufacturing options, some useful exploring design options better emulating target design. Table 2-11. Resistor Options Part Signal Description Location Figure Page App. Schematics Sheet
CLKMUL
When populated R148 removed, clock multiplier Am486DX2-66 microprocessor selected. When populated (the default), M1487 chip's internal disabled DS1685 Y2K-compliant enabled. When removed (the default), CPU-to-PCI frequency multiplier selected. only multiplier supported this design.) When removed populated (the default), M1487's TURBO signal High (asserted). This input must enabled software have effect. When populated removed (the default), M1487's TURBO signal asserted. This input must enabled software have effect. When populated R176 removed, system clock speed MHz.
ENRTC
(back side)
Sheet
CMPSTJ
(back side)
Sheet
TURBO
(back side)
Sheet
TURBO
(back side)
Sheet
CLKPU2
(back side)
Sheet
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Table 2-11. Resistor Options (Continued) Part Signal Description Location Figure Page (back side) (back side) App. Schematics Sheet
R145
KBINHIBIT
When R145 populated R146 removed (the default), M5042 keyboard controller enabled. When R145 populated R146 removed (the default), M5042 keyboard controller enabled. When R148 populated removed (the default) clock multiplier Am486DX4-100 Am486DX5-133 microprocessor selected. When populated (the default), M1487's internal keyboard controller disabled. (The M1487 internal keyboard controller function discontinued. M5042 provided instead.) When R176 populated removed (the default), system clock speed MHz.
R146
KBINHIBIT
Sheet
R148
CLKMUL
Sheet
R170
IBCSTJ
(back side)
Sheet
R176
CLKPU2
Sheet
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Am486® Microprocessor Customer Development Platform User's Manual
Appendix Default Settings
This chapter lists default settings Am486 microprocessor customer development platform when shipped. Table A-1. Default Jumper Settings Part Signal Location Default Position Figure Page Pins Pins Pins Position Marking
CPUVCC3 CPUVCC3 CPUV1, CPUV2, CPUV3 Boot Boot
"ADJ" "ADJ" "3.45
JP32 JP33
connection connection
marking) marking)
Am486® Microprocessor Customer Development Platform
Am486® Microprocessor Customer Development Platform User's Manual
Appendix Bill Materials Schematics
bill materials Am486 microprocessor customer development platform (CDP) begins page B-2. actual schematics used build begin page B-10.
Am486® Microprocessor Customer Development Platform
Board Bill Materials (BOM)
Item Qty. Reference BC1, BC2, BC3, BC4, BC5, BC6, BC7, BC8, BC9, BC10, BC11, BC12, BC13, BC14, BC15, BC16, BC17, BC18, BC19, BC20, BC21, BC22, BC23, BC24, BC25, BC26, BC27, BC28, BC29, BC30, BC31, BC32, BC33, BC34, BC35, C36, BC36, C37, BC37, C38, BC38, C39, BC39, BC40, BC41, BC42, BC43, BC44, BC45, BC46, C47, BC47, C48, C50, C52, C65, C67, C69, C70, C71, C72, C73, C74, C75, C76, C77, C79, C80, C81, C82, C88, C89, C90, C91, C92, C93, C94, C95, C100, C105, C111, C112, C114, C115, C122, C123, C124, C125, C126, C127, C128, C129, C130, C131, C132, C133, C134, C135, C136, C137, C156, C157, C160, C166, C167, C168, C169, C170, C171, C172, C173, C174 C10, C11, C12, C13, C34, C35, C83, C96, C97, C102, C103, C104, C109 C14, C28, C58, C64, C158, C159 C15, C16, C17, C18, C19, C20, C21, C22, C23, C24, C25, C26, C27, C29, C30, C31, C32, C138, C139, C140, C141, C142, C143, C144, C145, C146, C147, C148, C149, C150, C151, C152, C153 Part Package Description RC0805, X7R, ±10%,
Coin cell (socket) 0.01
KEYSTONE RC0805, X7R, ±10%, RC0805, NPO, ±5%, RC0805, NPO, ±10%,
Notes:
asterisk indicates parts that populated.
Am486® Microprocessor Customer Development Platform User's Manual
Item
Qty.
Reference C33, C41, C42, C43, C46, C56, C57, C60, C66, C154 C44, C53, C54, C155, C161 C86, TC2, TC3, TC9, TC11, TC12, TC13, TC14, TC15, TC16, TC17, TC18, TC19, TC22, TC23, TC24, TC25, C84, C87, C106, C107, C108, C110, C113 C98, C101 C162, C163, C164, C165 D11, D12, D13, D15,
Part 1000
Package C-CASE B-CASE C-CASE
Description RC0805, NPO, ±5%, RC0805, ±5%, RC0805, NPO, ±5%, RC0805, NPO, ±5%, RC0805, NPO, ±5%, TANTALUM, C-CASE, ±20% TANTALUM, B-CASE, ±20% TANTALUM, C-CASE, ±20%
Notes:
0.001 (MIN.) 0.015 MMBD4148 (SOT23) (SOT23) (SOT23) (2mA, SOT23)
A-CASE SOT-23 SURSOT23 SURSOT23 SOT-23
TANTALUM, A-CASE, ±20% RC0805, NPO, ±5%, SPRAGUE 30GAD10 RC0805, X7R, ±10%, VISHAY MMBD4148 LUMEX SSL-LX15IC-RP LUMEX SSL-LX15GC-RP KINGBRIGHT KM-23LSGC
asterisk indicates parts that populated.
Am486® Microprocessor Customer Development Platform
Item
Qty.
Reference D16, JP2, JP3, JP29, JP30, JP31, JP32, JP33
Part (2mA, SOT23) FUSE, 0.5A HEATSINK (TO-220) HEADER HEADER
Package SOT-23 1206
Description KINGBRIGHT KM-23LEC BUSSMAN 3216FF-500mA THERMALLOY ML32
TH-1X3 TH-2X3
HEADER; 0.025" POST 87224-3 HEADER; 0.025" POST 103186-3 HEADER; 0.025" POST 87224-2 212044-1 MOLEX 15-48-0106 745967-7 2X20 HEADER; SHRD 103308-8 2X17 HEADER; SHRD 103308-7 745410-1 555153-1 750329-2 PROD. INTL. ISL-8032VT
JP34 MT1, MT2, MT3, MT4, MT5, MT6, MT7, MT8, MT9, MT10
HEADER KYBD CONN PWR-CN6 Parallel Port CNN-40C CNN-34C SERIAL PORT RJ45A MOUSE_CON SPEAKER Mounting Hole COND60
TH-1X2 DB25 TH-2X20SHRD TH-2X17SHRD
RC1206
MURATA ERIE BLM32A07
AMPMOD 1X30, R-ANG TH-1X5SHRD
104069-7
Notes:
P35,
HEADER2X5; SHRD
HEADER; SHRD 103308-1
asterisk indicates parts that populated.
Am486® Microprocessor Customer Development Platform User's Manual
Item
Qty.
Reference P36, P38, P39, P40, P41, P42, P43, P44, P45, P46, RN1, RN2, RN3, RN4, RN8, RN9, RN10, RN11, RN12 RN5, RN6, RN7, RN13, RN14, RN15, RN16 RP1, RP2, RP5, RP6, RP7, RP12, RP14, RP16, RP17, RP18, RP19, RP20 RP4, RP8, RP9, RP10, RP11, RP15, RP21 RP13 R13, R19, R49, R50, R52, R61, R64, R68, R76, R77, R91, R104, R131, R141, R142, R175 R20, R21, R34, R58, R78, R85, R103, R105, R118, R130, R134, R170, R173, R174, R177, R178 R27, R81, R124 R14, R15, R16, R17, R18, R147 R22, R31, R35, R36, R38, R41, R42, R54, R99, R100, R101
Part CONN MMBT3906 (SOT23) MMBT3904 (SOT23) TIP127 33-8B 22-8B K-10P
Package TH-1X10SHRD SOT-23 SOT-23 TO-220
Description 3M:2520-6003UB 103308-5 VISHAY MMBT3906 VISHAY MMBT3904 MOTOROLA TIP127 08-3 08-3
SIP10
K-10P K-10P 330-8P
SIP10 SIP10 SIP8
RC0805, ±5%,
RC0805, ±5%,
Notes:
27.4
RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±1%,
asterisk indicates parts that populated.
Am486® Microprocessor Customer Development Platform
Item
Qty.
Reference R28, R94, R97, R135, R136, R137, R138, R156, R158, R160 R30, R65, R139, R140 R33, R47, R57, R119, R120, R121, R122, R123, R127, R148, R163, R165, R167, R169, R176 R39, R44, R45, R75, R90, R92, R106, R171, R172 R62, R63, R149, R150, R151 R70, R146 R71, R80, R95, R96, R98, R145, R157, R159, R161 R102 R107 R108, R109
Part 25.5 15.8 15.0
Package
Description RC0805, ±1%, RC0805, ±1%, RC0805, ±5%, RC0805, ±1%, RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±5%, RC0805, ±1%, RC0805, ±1%,
Notes:
*2.2 *4.7 100, 49.9,
asterisk indicates parts that populated.
Am486® Microprocessor Customer Development Platform User's Manual
Item
Qty.
Reference R110, R111, R112, R113 R114, R115, R117 R116 R152, R153, R154, R155 R162, R164, R166, R168 SIMM1, SIMM2, SIMM0 SLT1, SLT2 SL1, SW1, SW2, TC1, TC4, TC7, TC10 TC5, TC6, TC20, TC21
Part 1.00 SIMM72 Slot Connector PBNO PE68515 74F245 M1489 LP2951 Kx8-15 Kx8-15
Package
Description RC0805, ±1%, RC0805, ±1%, RC0805, ±1%, RC0805, ±5%, RC0805, ±5%, 822030-3 145154-4 645169-3 KT11P2SM
D-CASE D-CASE E-CASE
TANTALUM, D-CASE, ±20% TANTALUM, D-CASE, ±20% TANTALUM, E-CASE, ±20% PULSE ENGR. PE-68515
SOL20 PQFP208 SOJ32(0.3" /0.4") SOJ28(.3")
SIGNETICS 74F245D M1489 NATIONAL LP2951CM Kx8, Corner Vcc/GND Pins, SOJ32 Kx8, Corner Vcc/GND Pins, 0.3"SOJ28 Am29F010-90PC SIGNETICS 74F04D
Am29F010-90
DIP32(0.6" )(SOCKET SO14
Notes:
74F04
asterisk indicates parts that populated.
Am486® Microprocessor Customer Development Platform
Item
Notes:
Qty.
Reference U24, U26, U28, U30, U31, U32, U36, U38, U40, U47, U49, U46, U56, U61, U62, U63, U64, U65, U66, U67, U60, U72, U73, U74,
Part SC464 M1487 DS1685-5 74F08 Am486 Microprocessor, 74ABT16244 74ABT244 M5113A TFDS6000 RS232-5V Am79C972 (PQR160) LXT970QC MC33269DT-3.3 NM93C46N MACH221 29F800-55 TSOP48 PALCE22V10_PLCC (5ns) 74ABT373 74ABT16245 Display
Package SSOP28 PQFP160 DIP24(0.65 SO14 PGA169 SSOP48 SOL20 PQFP100 SSOP28 PQR160 MQFP64 DPAK DIP8 PQFP-100 TSOP48 PLCC28 SOL20 SSOP48
Description INTL. MICROCKTS. INC. IMISC464AYB M1487 DALLAS SEMI. DS1685-5 SIGNETICS 74F08D (AMP SOCKET1 916504-2) SIGNETICS 74ABT16244ADL SIGNETICS 74ABT244D M5113A TEMIC TFDS6000D LINEAR TECH LTC1349CG Am79C972KC LEVEL LXT970QC MOTOROLA MC33269DT-3.3 NATIONAL NM93C46N MACH221SP-7 AM29F800BT-55EC PALCE22V10H-5JC SIGNETICS 74ABT373AD SIGNETICS 74ABT16245BDL TIL311
asterisk indicates parts that populated.
Am486® Microprocessor Customer Development Platform User's Manual
Item
Notes:
Qty.
Reference XU14 XBT1 U25-HS
Part 74F32 74F06 M5042 NM93C66M8 74F14 74ABT125 MHz_SMD 14.318 MHz_SMD 32.768 KHz_SMD MHz_SMD DIP32(0.6") SOCKET LITHIUM COINCELL FANSINK JUMPERS (0.1")
Package SO14 SO14 PLCC44 SO14 SO14
Description SIGNETICS 74F032D SIGNETICS 74F06D M5042 NATIONAL NM93C66M8 SIGNETICS 74F14D Signetics 74ABT125D ECLIPTEK ECSMA-24.00MTR ECLIPTEK ECSMAT-14.318MTR ECLIPTEK ECPSM29T-32.768KTR ECLIPTEK ECSMA-25.000MTR SAMTEC ICA-632-SGG TOSHIBA CR2032 THERMALLOY 2321BTCM-42S-PF17
0.025" POSTS
asterisk indicates parts that populated.
Am486® Microprocessor Customer Development Platform
Schematics
schematics that follow actual schematics used build CDP. These schematics useful understanding modifying CDP. Because development platform based particular chipset incorporates many different possible design options, actual Am486 microprocessor-based designs might considerably different.
B-10
Am486® Microprocessor Customer Development Platform User's Manual
Table Contents
Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page COVER.SCH CPU.SCH CPU_POWER.SCH CPU_VIS1.SCH CPU_VIS2.SCH M1489.SCH L2_CACHE.SCH SIMM_SKTS.SCH EIP_MEM1.SCH EIP_MEM2.SCH PCI_CONN.SCH PCI_VIS.SCH ENET1.SCH ENET2.SCH IDE.SCH M1487.SCH ROM_MISC.SCH CLOCK.SCH ISA_CONN.SCH SUPER_I/O.SCH SERIAL_PARALLEL.SCH ISA_MEM1.SCH ISA_MEM2.SCH RTC_TIP.SCH KEYBOARD.SCH CPU_PINOUT.SCH
Am486 Microprocessor Customer Development Platform
Am486 Microprocessor Development System With Expansion On-Board Am79C972 100MB/s Ethernet Controller
1.0: Original design 1.1: Minor modifications after Design Review 1.2: Added External 8042 Style Keyboard Controller (SH24) Removed Support M1487 Internal (SH15) Removed Keyboard Interface From Clock Page (SH17) Changed design name Am486PCI C.D.P. (continued): 1.3: Added Extra Bypass Capacitors (SH5 SH14 SH15 SH17) Swapped Around Some Signals Within Resistor Networks (SH6 SH20) Renamed MCLK1 M_CLK1 (SH24) Added 0-ohm resistor make pullup work (SH17) Added NetLister (SH3) Fixed Error 3.3V Regulator Circuit (SH12) 1.4: Rearranged Clock Nets Facilitate Routing (SH17) Changed Some Components Standard Values (50ohm 49.9ohm, 40pF 39pF, SH19) SH20: Removed unneeded 0-ohm resistors from Super chip Fixed wiring error crystal Added 'ABT125 buffer drive serial port LEDs SH22: MACH device outputs changed Flash support SH23: Changed Flash 1MByte (512Kx16) SH24: Removed unneeded logic from interface Added inverter generate proper chip Fixed wiring error crystal Grounded U22-pin Removed unused gate SH17 SH25: Switched mouse connector verticle type Changed 'F06 symbol show
SH17: Added jumpers allow mulitple BIOS images single Flash device Removed diode from VBAT generation circuit Added generation circuit spare 'F14 gates Added jumper external RESET# pushbutton SH18: Fixed wiring error crystal Removed MCLK1 (16MHz) rewired MCLK2 drive 33MHz clock nets Removed CLKCNTL signal from DOZE#
2.0: Changed resistor packs 10-pin (SH2, SH3, SH11, SH15, SH16, SH17, SH19, SH20 SH21) Changed 330ohm Resistor Pack 8-pin (SH19) SH3: Added diagram correct Power Connector Footprint Broke Logic Analyzer Headers into pages Added gnerate also generate Logic Analyzer Qualify signal Buffered BE[0.3], RDY#, BRDY#, ADS# through
SH9: Added better explanation Flash memory operation SH11: Added configuration information slots Removed circuit generate PERR# cause M1487 assert Am486 microprocessor SH13: Added serial EEPROM user parameters mux. circuit daisy chain device. '972 E/net device loads configuration from SEEPROM. CLKCNTL signal from M1487 used select SEEPROM. SH14: Swapped R107 R109; R109 49.9ohm, Fixed wiring error crystal SH15: Added more 0.1uF bypass capacitors chips ('F14, 'ABT125, 22V10, 'F08, 'C66) SH16: Fixed wiring error crystal Fixed wiring error generation low-active reset signal RSTDRV# Removed unused inverter (used SH24) Changed 1487NMI circuit Changed populated component
2.1: Updated revision level prototype warning sheets SH17: Modified jumpers allow mulitple BIOS images single Flash device support 256K 512K BIOS non-PC applications SH22: Added XBUSCSJ signal Mach device does respond when Am486 fetches reset vector FFFF FFF0 SH14 &20: Connected pins LEDs greater purchasing/manufacturing flexibility
Advanced Micro Devices, Inc. 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title
(800) 222-9323
Note: Unless otherwise noted logic operates power supply
Size
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
Note: Unless otherwise stated resistors 0805 package Tol. Note: Unless otherwise stated capacitors 0805 package Tol.
COVER.SCH
Date: Friday, December 1998 Sheet
Am486 MICROPROCESSOR, PULLUPS, JTAG INTERFACE
STPCLKJ
PCD_CACH CPURST HITMJ
K2VCC CPUVCC3
K2VC
HITMJ
PULLHI1
10K-10P M/IO# D/C# W/R# LOCK# PLOCK# ADS# BLAST# BREQ HLDA FERR# BE3# BE2# BE1# BE0# PCHK# SMI# WB/WT#(DX2INC) SMIACT# CLKMUL(DX2INC) SKT1_NC Am486-PGA *10K
CLKMUL
CPUCLK
ZRSTDRV
INTR 1000pF
BOFFJ AHOLD EADSJ KENOJ FLUSHJ IGNNEJ BS16J BS8J A20MJ RDYOJ BRDYOJ
INV(DX2INC) HITM#(DX2INC) SRESET CACHE#(DX2INC) STPCLK#
INC(DX4VCC5)
INC(DX2NC)
RESET INTR HOLD BOFF# AHOLD EADS# KEN# FLUSH# IGNNE# BS16# BS8# A20M# RDY# BRDY#
MIOJ LOCKJ
PLOCK
ADSJ
BLAST
BREQ
HDLA
FERRJ BEJ3 BEJ2 BEJ1 BEJ0 BEJ[0.3]
BEJ[0.3]
Enhanced Am486 Microprocessor (SOCKET1-PGA169)
GA[2.31]
GA[2.31]
GA31 GA30 GA29 GA28 GA27 GA26 GA25 GA24
4.7K-10P
PCHKJ
SMIJ
WB-W
VOLDET(DX2NC)
PULLHI1
SMIACKJ
GD[0.31]
GD[0.31]
DP[0.3]
DP[0.3]
R148 P24T5
CLKMUL DX2-66 DX5-133; pullup DX4-100
JTAG Connector
Advanced Micro Devices, Inc. 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title
(800) 222-9323
HEADER2X5; SHRD
JTAG Connector View
Size
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
CPU.SCH
Date: Friday, December 1998 Sheet
POWER CONNECTOR, PULLUPS, POWER SUPPLY, BYPASS CAPACITORS
CPUVCC3 C162 C163 C164 C165 C166 C167 0.1uF C168 0.1uF C169 0.015uF 0.015uF 0.015uF 0.015uF 0.1uF
K2VCC
0.1uF
K2VCC
10uF 0.1uF
HEATSINK (TO-220) THERMALLOY ML32
DP[0.3]
TIP127 CPUVCC3
1-2: 2-3: OTHERS
DP[0.3]
BASE
HEADER CPUVCC3 HEADER 15.8K, 1/8W 100uF
MIOJ RDYOJ BRDYOJ BOFFJ
10K-10P
U6O/P
U6VIN U6FB COLLECTOR
LP2951
0.1uF
27.4K, 1/8W
25.5K, 1/8W
15.0K, 1/8W
CPUV1 CPUV2 CPUV3
HEADER
1-2: 3-4: 5-6:
3.45V 3.3V 2.5V
V(out)= 1.235(1+ R/15.0K)
FLUSHJ BS16J BS8J IGNNEJ 47uF 47uF 47uF TC10 47uF
-12V PWR-CN6
+12V
0.1uF -12V +12V CPUVCC3 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
0.1uF
PWR-CN6 TC18 10uF 10uF
Power Connector(s)
Connector Polarizing
10uF
10uF TC19 10uF TC20 10uF TC21 10uF
MountingHole MountingHole MountingHole MountingHole
MountingHole MountingHole MountingHole MountingHole MountingHole MountingHole Overlap Make Oval Title Size Advanced Micro Devices, Inc. 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved (800) 222-9323
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
MT10
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
CPU_POWER.SCH
Date: Friday, December 1998
Sheet
BUFFERS LOGIC ANALYZER HEADERS SIGNALS
VGD1 VGD1 VGD1 VGD1 VGD1 VGD1 VGD3 VGD3 VGD2 VGD2 VGD2 VGD2 VGD2 VGD2 VGD2 VGD2 VGD2 VGD2 VGD1 VGD1 VGD1 VGD1
CLK1
CLK2
VGD3 VGD2 VGD2 VGD2 VGD2 VGD2 VGD1 VGD1
1OE# 2OE# 3OE# 4OE#
VGD3 VGD2 VGD2 VGD2 VGD2 VGD2 VGD1 VGD1
CONN 3M:2520-6003UB CLK1
CLK2
VGD1 VGD1 VGD1
VGD1 VGD1 VGD1 VGD8 VGD6 VGD4 VGD2 VGD0
74ABT16244
CONN 3M:2520-6003UB VGD[0.31]
1OE# 2OE# 3OE# 4OE#
PCHKJ
SMIJ WB-W SMIACKJ FERRJ
SIGNALS NEEDED DISASSEMBLER
1OE# 2OE# 3OE# 4OE#
CLK1
CLK2
GD[0.31]
GD[0.31]
AHOLD IGNNEJ STPCLKJ
PCD_CACH CPURST HITMJ PLOC
74ABT16244
VPCHKJ VSMIJ VWB-WT# VSMIACKJ VFERRJ VAHOLD VNMI VIGNNEJ
VSTPCLKJ VCACHE# VSRESET VHITMJ VINV VPLOCK#
CONN 3M:2520-6003UB
74ABT16244
Conn.
Using Logic Analyzer Headers: Clock analyzer clock signal (POD1) Qualify clock using LA_QUAL signal (POD2) This qualification signal asserted when ADS#, RDY# BRDY# asserted Am486 Microprocessor bus. Thus cycles where valid address data information transferred filtered when needed Signals arranged Headers work with Disassembler 16500 analyzer
Advanced Micro Devices, Inc.
(800) 222-9323
View
Title Size
5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
CPU_VIS1.SCH
Date: Friday, December 1998
Sheet
BUFFERS LOGIC ANALYZER HEADERS SIGNALS, LOGIC ANALYZER
BEJ[0.3] BEJ0 BEJ1 BEJ2 BEJ3 ADSJ BRDYOJ RDYOJ CLK/I0 PALCE22V10_PLCC (5ns) 5nsec LACNTL.JED A20MJ BREQ
ZRSTDRV
1OE# 2OE# 3OE# 4OE#
LA_QUAL VRDYOJ VPWT VA20MJ VBREQ VZRSTDRV CLK1
CLK2
BEJ[0.3]
I/O9 I/O8 I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0
VBRDYOJ VADSJ VRDYOJ LA_QUAL VGA0 VGA1 VBEJ0 VBEJ1 VBEJ2 VBEJ3
INTR FLUSHJ
CPUCLK3
VBRDYOJ VADSJ VHOLD VFLUSHJ VINTR
CONN 3M:2520-6003UB
VCPUCLK1 VCPUCLK
VCPUCLK1
PLACE THEVENIN TERMINATOR NEAR 'ABT16244 BUFFER
74ABT16244
R156
PLACE THEVENIN TERMINATOR NEAR LOGIC ANALYZER CONNECTOR
R157
1OE# 2OE# 3OE# 4OE#
VCPUCLK VMIOJ VWRJ VBEJ2 VBEJ0 VLOCKJ VKENOJ VBS16J VBLAST#
CLK1
CLK2
MIOJ LOCKJ KENOJ BS16J
BLAST HDLA
1OE# 2OE# 3OE# 4OE#
BS8J BOFFJ EADSJ
CONN 3M:2520-6003UB VHLDA VBS8J VPCD VBOFFJ VBEJ1 VBEJ3 VDCJ VEADSJ
CLK1
CLK2
74ABT16244
Conn.
74ABT16244
1OE# 2OE# 3OE# 4OE#
CONN 3M:2520-6003UB CLK1
CLK2
View
CONN 3M:2520-6003UB
VGA[2.31]
Advanced Micro Devices, Inc. VGA[2.31] 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved VADSJ VRDYOJ VBRDYOJ VWRJ Title Size
(800) 222-9323
GA[2.31]
GA[2.31]
74ABT16244 VADSJ VRDYOJ VBRDYOJ VWRJ
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
CPU_VIS2.SCH
Date: Friday, December 1998
Sheet
FINALi M1489 INTERFACE
PARITY
HDCSJ3 HDCSJ2 HDCSJ1 HDCSJ0 HDIO16J HDIORDY HDA2 HDA1 HDA0 HDIORJ HDIOWJ HDD[0.15]
HDD[0.15]
DEVSELJ STOPJ IRDYJ TRDYJ C_BEJ0 C_BEJ1 C_BEJ2 C_BEJ3 FRAMEJ
HDRQ1 HDACK1 HDRQ0 HDACK0
HDRQ1 HDACK1 HDRQ0 HDACK0
R162 R166
R164 R168
R163 R167
R165 R169
MDP0 MDP1 MDP2 MDP3
MASTER: POPULATE
HDD0 HDD1 HDD2 HDD3 HDD4 HDD5 HDD6 HDD7 HDD8 HDD9 HDD10 HDD11 HDD12 HDD13 HDD14 HDD15
TC11 10uF
0.1uF C171 0.1uF C172 0.1uF
GA[2.31]
GA[2.31]
HDD0 HDD1 HDD2 HDD3 HDD4 HDD5 HDD6 HDD7 HDD8 HDD9 HDD10 HDD11 HDD12 HDD13 HDD14 HDD15 HDIOWJ HDIORJ HDA0 HDA1 HDA2 HDIORDY HDIO16J HDCSJ0 HDCSJ1 HDCSJ2 HDCSJ3 DEVSELJ STOPJ IRDYJ TRDYJ C/BEJ0 C/BEJ1 C/BEJ2 C/BEJ3 FRAMEJ
PAD[0.31]
PAD[0.31]
BEJ0 BEJ1 BEJ2 BEJ3 ADSJ MIOJ RDYOJ BRDYOJ LOCKJ PCD_CACH HITMJ AHOLD BOFFJ KENOJ EADSJ RSTDRV PCICLK CPUCLK1 SMIACKJ IBCSTJ CMPSTJ CMPGNTJ CLEAROKJ
GA10 GA11 GA12 GA13 GA14 GA15 GA16 GA17 GA18 GA19 GA20 GA21 GA22 GA23 GA24 GA25 GA26 GA31 BEJ0 BEJ1 BEJ2 BEJ3 ADSJ MIOJ RDYOJ BRDYJ LOCKJ HITMJ AHOLD BOFFJ KENOJ EADSJ RSTDRV PCICLK CPUCLK1 SMIACKJ IBCSTJ CMPSTJ CMPGNTJ CLEAROKJ
PAD0 PAD1 PAD2 PAD3 PAD4 PAD5 PAD6 PAD7 PAD8 PAD9 PAD10 PAD11 PAD12 PAD13 PAD14 PAD15 PAD16 PAD17 PAD18 PAD19 PAD20 PAD21 PAD22 PAD23 PAD24 PAD25 PAD26 PAD27 PAD28 PAD29 PAD30 PAD31 COEJ0 COEJ1 CWEJ0 CWEJ1 CCSJ0 CCSJ1 CCSJ2 CCSJ3 TAG0 TAG1 TAG2 TAG3 TAG4 TAG5 TAG6 TAG7 PERRJ TAGWEJ
PAD0 PAD1 PAD2 PAD3 PAD4 PAD5 PAD6 PAD7 PAD8 PAD9 PAD1 PAD1 PAD1 PAD1 PAD1 PAD1 PAD1 PAD1 PAD1 PAD1 PAD2 PAD2 PAD2 PAD2 PAD2 PAD2 PAD2 PAD2 PAD2 PAD2 PAD3 PAD3
COEJ0 CWEJ0
TAG[0.7]
TAG[0.7]
TAG0 TAG1 TAG2 TAG3 TAG4 TAG5 TAG6 TAG7
PERRJ TAGWEJ A3II
GD10 GD11 GD12 GD13 GD14 GD15 GD16 GD17 GD18 GD19 GD20 GD21 GD22 GD23 GD24 GD25 GD26 GD27 GD28 GD29 GD30 GD31 MA10 MA11 CASJ0 CASJ1 CASJ2 CASJ3 RASJ0 RASJ1 RASJ2 RASJ3
GD10 GD11 GD12 GD13 GD14 GD15 GD16 GD17 GD18 GD19 GD20 GD21 GD22 GD23 GD24 GD25 GD26 GD27 GD28 GD29 GD30 GD31 MA10 MA11
M1489
GD[0.31]
GD[0.31]
RASJ3 RASJ2 RASJ1 RASJ0 CASJ3 CASJ2 CASJ1 CASJ0 Advanced Micro Devices, Inc. (800) 222-9323
MA[0.11]
MA[0.11]
5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title Size
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
M1489.SCH
Date: Friday, December 1998
Sheet
CACHE DATA SRAMS BYTE CONTROL; DRAM SERIES TERMINATION FANOUT
GD[0.31] GA[4.18] A3II
GD[0.31] GA[4.18]
A3II
GD10 GD11 GD12 GD13 GD14 GD15
CE1#
CE1#
CE1#
CE1#
128Kx8-15
128Kx8-15
128Kx8-15
128Kx8-15
COEJ0 CWEJ0 CSJ0 CSJ1 CSJ2 CSJ3
COEJ0 CWEJ
MA[0.11] TAG[0.7]
MA[0.11]
AMA[0.11]
AMA[0.11]
TAG[0.7]
GA[2.19]
GA[2.19]
RASJ0 RASJ1 RASJ2 RASJ3 33-8B CASJ0 CASJ1 CASJ2 CASJ3 33-8B MCASJ0 MCASJ1 MCASJ2 MCASJ3 MRASJ0 MRASJ1 MRASJ2 MRASJ3
32Kx8-15
33-8B
33-8B
MA10 MA11
33-8B
AMA8 AMA9 AMA1 AMA1
TAGWEJ
U1PD U24A BEJ3 74F08 U24B BEJ2 74F08 U24C BEJ1 74F08 U24D
CSJ3
CSJ2 CSJ1
74F245
ZMWEJ ZMWEJ ZMWEJ
R124
MWEJ2 MWEJ1 MWEJ0
Advanced Micro Devices, Inc. CSJ0 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title Size
(800) 222-9323
BEJ0
74F08
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
L2_CACHE.SCH
Date: Friday, December 1998
Sheet
DRAM 72-PIN SIMM SOCKETS
SIMM0 AMA[0.11]
AMA[0.11]
AMA[0.11]
GD[0.31]
AMA[0.11] GD[0.31]
SIMM2
GD[0.31]
GD[0.31]
AMA1 AMA1
AMA1 AMA1 AMA9 AMA8 AMA7 AMA6 AMA5 AMA4 AMA3 AMA2 AMA1 AMA0
PRD3 PRD2 PRD1 PRD0 RAS3 RAS2 RAS1 RAS0 CAS3 CAS2 CAS1 CAS0 SIMM72
MRASJ1
MRASJ0
MCASJ[0.3]
MCASJ[0.3]
MCASJ3 MCASJ2 MCASJ1 MCASJ0
IO34 IO33 IO32 IO31 IO30 IO29 IO28 IO27 IO25 IO24 IO23 IO22 IO21 IO20 IO19 IO18 IO16 IO15 IO14 IO13 IO12 IO11 IO10 IO35 IO26 IO17
MDP3 MDP2 MDP1 MDP0 MDP[0.3]
PRD3 PRD2 PRD1 PRD0 RAS3 RAS2 RAS1 RAS0 CAS3 CAS2 CAS1 CAS0 SIMM72
MRASJ0 MRASJ2
MCASJ[0.3]
MCASJ[0.3]
MCASJ3 MCASJ2 MCASJ1 MCASJ0
IO34 IO33 IO32 IO31 IO30 IO29 IO28 IO27 IO25 IO24 IO23 IO22 IO21 IO20 IO19 IO18 IO16 IO15 IO14 IO13 IO12 IO11 IO10 IO35 IO26 IO17
MDP3 MDP2 MDP1 MDP0 MDP[0.3]
MWEJ2 MDP[0.3]
MWEJ0
MDP[0.3]
SIMM1
GD[0.31]
SIMM SOCKET POPULATION CHART
GD[0.31]
AMA[0.11]
AMA[0.11] AMA1 AMA1
PRD3 PRD2 PRD1 PRD0 RAS3 RAS2 RAS1 RAS0 CAS3 CAS2 CAS1 CAS0 SIMM72
MRASJ2 MRASJ1
MCASJ[0.3]
MCASJ[0.3]
MCASJ3 MCASJ2 MCASJ1 MCASJ0
IO34 IO33 IO32 IO31 IO30 IO29 IO28 IO27 IO25 IO24 IO23 IO22 IO21 IO20 IO19 IO18 IO16 IO15 IO14 IO13 IO12 IO11 IO10 IO35 IO26 IO17
MDP3 MDP2 MDP1 MDP0 MDP[0.3]
SIMM0
SINGLE BANK
SIMM1
SINGLE BANK
SIMM2
SINGLE BANK
DOUBLE BANK
SINGLE BANK
SIMMS SINGLE BANK DOUBLE BANK, USING 1Mbit, 4Mbit, 16Mbit DRAM CHIPS. POPULATE SIMM SOCKETS SHOWN THIS CHART.
Advanced Micro Devices, Inc. MDP[0.3] 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title Size
(800) 222-9323
MWEJ1
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
SIMM_SKTS.SCH
Date: Friday, December 1998
Sheet
FLASH MEMORY CONTROLLER
VA(2:21)
Am486 MICROPROCESSOR
R159
A(2:22) A(22)=0 Bank1 Cntl. VA(22) 'ABT244
1Mx8 Flash Chips
A(22)=1
R158
RSTDRV VGA22 AMA8 VWRJ MRASJ3 MCASJ3 MCASJ2 MCASJ1 MCASJ0
CLK/I0
I/O9 I/O8 I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0
Bank2 Cntl.
REFCIP WRCIP
EIPCE1# EIPCE2# EIPOE1# EIPOE2# EIPWE1# EIPWE2#
1Mx8 Flash Chips
Address A(22) Used Flash Bank Select
VCPUCLK1
PALCE22V10_PLCC (5ns) EIPCNTL.JED REV.
PLACE THEVENIN TERMINATOR NEAR 22V10
Makes banks 1Mx32 Flash appear bank 2Mx32 DRAM (70ns, FPM) M1489 Memory Controller. Program M1489 2Mx8 (11/10) DRAM chips. (CPU A22) used Flash Bank Select when RAS3# asserted M1489 Memory Controller. Limitations Operation Interface: Access 32-bits wide always Supports burst Read Cycles single-beat Read Cycles Supports single-beat Write Cycles only; back-to-back Write Cycles Compatible with CAS-before-RAS Refresh Cycles only
M1489 Memory Controller "Fast" proper operation, even installed DRAM 60ns "Fastest" setting Flash chip tied Am486 Microprocessor pin, multiply desired Flash chip address find Am486 Microprocessor address needed access desired memory cell (ex: Flash Chip AAAh accessed Am486 Microprocessor 2AA8h) Flash Array start address moves, depending much DRAM installed (ex: 48MByte DRAM puts start address 48MB 3000000h first bank Flash ROMs 3400000h start address second bank Flash ROMs Uses 29F800T, 55ns devices "Byte" mode Accessable from Am486 Microprocessor only; accessable from Masters Uses fourth DRAM bank M1489 Memory Controller
Advanced Micro Devices, Inc.
(800) 222-9323
5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title Size
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
EIP_MEM1.SCH
Date: Friday, December 1998
Sheet
FLASH MEMORY ARRAY
GD[0.31]
VGA[2.31]
GD10 GD11 GD12 GD13 GD14 GD15
GD16 GD17 GD18 GD19 GD20 GD21 GD22 GD23
GD24 GD25 GD26 GD27 GD28 GD29 GD30 GD31
VGA3 VGA4 VGA5 VGA6 VGA7 VGA8 VGA9 VGA10 VGA11 VGA12 VGA13 VGA14 VGA15 VGA16 VGA17 VGA18 VGA19 VGA20 VGA21
BYTE# RESET#
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 RY/BY#
VGA2
VGA3 VGA4 VGA5 VGA6 VGA7 VGA8 VGA9 VGA10 VGA11 VGA12 VGA13 VGA14 VGA15 VGA16 VGA17 VGA18 VGA19 VGA20 VGA21
BYTE# RESET#
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 RY/BY#
VGA2
VGA3 VGA4 VGA5 VGA6 VGA7 VGA8 VGA9 VGA10 VGA11 VGA12 VGA13 VGA14 VGA15 VGA16 VGA17 VGA18 VGA19 VGA20 VGA21
BYTE# RESET#
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 RY/BY#
VGA2
VGA3 VGA4 VGA5 VGA6 VGA7 VGA8 VGA9 VGA10 VGA11 VGA12 VGA13 VGA14 VGA15 VGA16 VGA17 VGA18 VGA19 VGA20 VGA21
BYTE# RESET#
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 RY/BY#
VGA2
RSTDRV# EIPCE1# EIPOE1# EIPWE1# RSTDRV# C122 0.1uF C123 EIPCE1# 0.1uF EIPOE1# EIPWE1# RSTDRV# C124 0.1uF
RSTDRV# C125 EIPCE1# 0.1uF EIPOE1# EIPWE1# C126 0.1uF
RSTDRV# C127 EIPCE1# 0.1uF EIPOE1# EIPWE1# C128 0.1uF
C129 0.1uF
29F800-55 TSOP48
29F800-55 TSOP48
29F800-55 TSOP48
29F800-55 TSOP48
GD[0.31]
VGA[2.31] GD10 GD11 GD12 GD13 GD14 GD15 GD16 GD17 GD18 GD19 GD20 GD21 GD22 GD23 GD24 GD25 GD26 GD27 GD28 GD29 GD30 GD31
VGA3 VGA4 VGA5 VGA6 VGA7 VGA8 VGA9 VGA10 VGA11 VGA12 VGA13 VGA14 VGA15 VGA16 VGA17 VGA18 VGA19 VGA20 VGA21
BYTE# RESET#
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 RY/BY#
VGA2
VGA3 VGA4 VGA5 VGA6 VGA7 VGA8 VGA9 VGA10 VGA11 VGA12 VGA13 VGA14 VGA15 VGA16 VGA17 VGA18 VGA19 VGA20 VGA21
BYTE# RESET#
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 RY/BY#
VGA2
VGA3 VGA4 VGA5 VGA6 VGA7 VGA8 VGA9 VGA10 VGA11 VGA12 VGA13 VGA14 VGA15 VGA16 VGA17 VGA18 VGA19 VGA20 VGA21
BYTE# RESET#
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 RY/BY#
VGA2
VGA3 VGA4 VGA5 VGA6 VGA7 VGA8 VGA9 VGA10 VGA11 VGA12 VGA13 VGA14 VGA15 VGA16 VGA17 VGA18 VGA19 VGA20 VGA21
BYTE# RESET#
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 RY/BY#
VGA2
RSTDRV# C130 EIPCE2# EIPOE2# EIPWE2# 0.1uF C131 EIPCE2# 0.1uF EIPOE2# EIPWE2# RSTDRV# C132 0.1uF
RSTDRV# C133 EIPCE2# 0.1uF EIPOE2# EIPWE2# C134 0.1uF
RSTDRV# C135 EIPCE2# 0.1uF EIPOE2# EIPWE2# C136 0.1uF
C137 0.1uF
29F800-55 TSOP48
29F800-55 TSOP48
29F800-55 TSOP48
29F800-55 TSOP48
Advanced Micro Devices, Inc.
(800) 222-9323
5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title Size
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
EIP_MEM2.SCH
Date: Friday, December 1998
Sheet
PULLUPS SLOT CONNECTORS; IDSEL GENERATION
RP10
RP11 PGNTJ0 PGNTJ1 PREQJ0 C_BEJ1 C_BEJ2 IRDYJ C_BEJ3 4.7K-10P PCIID1 PCIID3 PCIID2 33-8B PAD19 PAD21 PAD20
FRAMEJ TRDYJ DEVSELJ STOPJ PLOCKJ SERRJ C_BEJ0
15pF
4.7K-10P
INT0J INT2J INT1J INT3J PREQJ1 PGNTJ2 PREQJ2
4.7K-10P
PCIBus INT0# INT1# INT2# INT3#
Slot1 INTA# INTB# INTC# INTC#
Slot2 INTD# INTA# INTB# INTC#
Ethernet
INTA#
-12V
SLT1 -12V INTB# INTD# PRSNT1# RSRVD PRSNT2# RSRVD REQ# +5V(I/O) AD31 AD29 AD27 AD25 +3.3V C/BE3# AD23 AD21 AD19 +3.3V AD17 C/BE2# IRDY# +3.3V DEVSEL# LOCK# PERR# +3.3V SERR# +3.3V C/BE1# AD14 AD12 AD10 +3.3V +5V(I/O) ACK64# Slot TRST# +12V INTA# INTC# RSRVD +5V(I/O) RSRVD RSRVD RST# +5V(I/O) GNT# RSVRD AD30 +3.3V AD28 AD26 AD24 IDSEL +3.3V AD22 AD20 AD18 AD16 +3.3V FRAME# TRDY# STOP# +3.3V SDONE SBO# AD15 +3.3V AD13 AD11 C/BE0# +3.3V +5V(I/O) REQ64#
+12V
-12V
SLT2 -12V INTB# INTD# PRSNT1# RSRVD PRSNT2# RSRVD REQ# +5V(I/O) AD31 AD29 AD27 AD25 +3.3V C/BE3# AD23 AD21 AD19 +3.3V AD17 C/BE2# IRDY# +3.3V DEVSEL# LOCK# PERR# +3.3V SERR# +3.3V C/BE1# AD14 AD12 AD10 +3.3V +5V(I/O) ACK64# Slot TRST# +12V INTA# INTC# RSRVD +5V(I/O) RSRVD RSRVD RST# +5V(I/O) GNT# RSVRD AD30 +3.3V AD28 AD26 AD24 IDSEL +3.3V AD22 AD20 AD18 AD16 +3.3V FRAME# TRDY# STOP# +3.3V SDONE SBO# AD15 +3.3V AD13 AD11 C/BE0# +3.3V +5V(I/O) REQ64#
+12V
INT1J INT3J
INT0J INT2J
INT2J INT0J
INT1J INT3J
PCIRSTJ PCICLK2 PGNTJ0 PREQJ1 PAD30 PAD28 PAD26 PAD24 PCIID1 PAD22 PAD20 PAD18 PAD16 FRAMEJ TRDYJ DEVSELJ STOPJ PLOCKJ PERRJ SERRJ PAD15 PAD13 PAD11 PAD9 C_BEJ0 PAD6 PAD4 PAD2 PAD0 C_BEJ1 PAD14 PAD12 PAD10 PAD31 PAD29 PAD27 PAD25 C_BEJ3 PAD23 PAD21 PAD19 PAD17 C_BEJ2 IRDYJ
PCIRSTJ PGNTJ1 PAD30
PCICLK1 PREQJ0
PAD31 PAD29 PAD27 PAD25 C_BEJ3 PAD23 PAD21 PAD19 PAD17 C_BEJ2 IRDYJ DEVSELJ PLOCKJ PERRJ SERRJ C_BEJ1 PAD14 PAD12 PAD10
PAD28 PAD26 PAD24 PCIID2 PAD22 PAD20 PAD18 PAD16 FRAMEJ TRDYJ STOPJ
PAD15 PAD13 PAD11 PAD9 C_BEJ0 PAD6 PAD4 PAD2 PAD0
PAD8 PAD7 PAD5 PAD3 PAD1
PAD8 PAD7 PAD5 PAD3 PAD1
IDSEL AD19 Device
IDSEL AD20 Device
Advanced Micro Devices, Inc. 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title Size (800) 222-9323
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
PCI_CONN.SCH
Date: Friday, December 1998
Sheet
BUFFERS LOGIC ANALYZER HEADERS
PAD[0.31]
PAD0 PAD1 PAD2 PAD3 PAD4 PAD5 PAD6 PAD7 PAD8 PAD9 PAD1 PAD1 PAD1 PAD1 PAD1 PAD1
VPAD VPAD VPAD VPAD VPAD VPAD VPAD VPAD VPAD VPAD VPAD1 VPAD1 VPAD1 VPAD1 VPAD1 VPAD1
1OE# 2OE# 3OE# 4OE#
VPAD[0.31]
JP29
PREQJ0 PGNTJ0
HEADER
PLACE THEVENIN TERMINATOR NEAR LOGIC ANALYZER CONNECTOR
R160 CLK1 CLK2
VPAD3 VPAD2 VPAD2 VPAD2 VPAD2 VPAD2 VPAD1 VPAD1
VPCICLK VPAD3 VPAD2 VPAD2 VPAD2 VPAD2 VPAD2 VPAD1 VPAD1
R161
Conn.
PLACE NEAR PCI0 CONNECTOR
74ABT16244
VPAD1 VPAD1 VPAD1 VPAD1 VPAD2 VPAD2 VPAD2 VPAD2 VPAD2 VPAD2 VPAD2 VPAD2 VPAD2 VPAD2 VPAD3 VPAD3 VPAD1 VPAD1 VPAD1 VPAD VPAD VPAD VPAD VPAD
CONN 3M:2520-6003UB
JP30
PREQJ1 PGNTJ1
PAD1 PAD1 PAD1 PAD1 PAD2 PAD2 PAD2 PAD2 PAD2 PAD2 PAD2 PAD2 PAD2 PAD2 PAD3 PAD3
HEADER
PLACE NEAR PCI1 CONNECTOR
1OE# 2OE# 3OE# 4OE#
CLK1 CLK2
VPAD1 VPAD1 VPAD1 VPAD VPAD VPAD VPAD VPAD
JP31
PREQJ2 PGNTJ2
HEADER
View
PLACE NEAR Am79C972 E/NET CHIP
CONN 3M:2520-6003UB
74ABT16244
C_BEJ3 C_BEJ C_BEJ1 C_BEJ0
CLK1 CLK2
VC_BEJ VC_BEJ VFRAMEJ VDEVSEL VSTOPJ
1OE# 2OE# 3OE# 4OE#
VC_BEJ VC_BEJ VC_BEJ VC_BEJ VFRAMEJ VIRDYJ VTRDYJ VDEVSEL VPCICLK VINT0J VINT1J VINT2J VINT3J VPCIRSTJ VSTOP
VC_BEJ VC_BEJ VIRDYJ VTRDYJ
FRAMEJ IRDYJ TRDYJ DEVSELJ INT0J INT1J INT2J INT3J PCIRSTJ STOPJ
PCICLK
PLACE THEVENIN TERMINATOR NEAR 'ABT16244 BUFFER
CONN 3M:2520-6003UB
CLK1 CLK2
VINT3J VINT1J VPCIRSTJ VPERRJ VPLOCK
VINT2J VINT0J VSERRJ
74ABT16244
CONN 3M:2520-6003UB
PLOCKJ PERRJ SERRJ 74ABT244 Title Size
VPLOCK VPERRJ VSERRJ
Advanced Micro Devices, Inc. 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved
(800) 222-9323
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
PCI_VIS.SCH
Date: Friday, December 1998
Sheet
ETHERNET CONTROLLER, BYPASS CAPACITORS POWER SUPPLY ETHERNET CONTROLLER,
VCC3 VCC3 R103
ENETPG
SERIAL EEPROMS
VCC3 R105 EECS_1K VCC3 VCC3 R104 EEDO EEDI EESK EECS EECS_4K
PAD[0.31] PAD0 PAD1 PAD2 PAD3 PAD4 PAD5 PAD6 PAD7 PAD8 PAD9 PAD10 PAD11 PAD12 PAD13 PAD14 PAD15 PAD16 PAD17 PAD18 PAD19 PAD20 PAD21 PAD22 PAD23 PAD24 PAD25 PAD26 PAD27 PAD28 PAD29 PAD30 PAD31 C_BEJ0 C_BEJ1 C_BEJ2 C_BEJ3 PCIID3 FRAMEJ IRDYJ TRDYJ DEVSELJ STOPJ PERRJ SERRJ INT2J PCIRSTJ PREQJ2 PGNTJ2 PCICLK3
NM93C46N
NM93C66M8
AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C_BE0# C_BE1# C_BE2# C_BE3# IDSEL FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# INTA# PCIRST# PCIREQ# PCIGNT# PCICLK
VDD_PCI VDD_PCI VDD_PCI VDD_PCI VDD_PCI VDD_PCI VDD_PCI VDD_PCI VDD_PCI
EAR# TBC_IN TBC_EN LED2#/SRDCLK/MIIRXFRTGE EEDO/LED3#/SRD/MIIRXFRTGD EEDI/LED0# EESK/LED1#/SFBD EECS PHY_RST MDIO RXD3 RXD2 RXD1 RXD0 RX_DV RX_CLK/RXCLK RX_ER/RXDAT TX_ER TX_CLK/TXCLK TX_EN/TXEN TXD3 TXD2 TXD1 TXD0/TXDAT COL/CLSN CRS/RXEN EBUA_EBA7 EBUA_EBA6 EBUA_EBA5 EBUA_EBA4 EBUA_EBA3 EBUA_EBA2 EBUA_EBA1 EBUA_EBA0 EBDA15 EBDA14 EBDA13 EBDA12 EBDA11 EBDA10 EBDA9 EBDA8 EBD7 EBD6 EBD5 EBD4 EBD3 EBD2 EBD1 EBD0 VCC3
PME# WUMI#
VDDB VDDB VDDB VDDB VDDB VDDB VDDB
'972 E/net Config.
User Data
PHY_RST MDIO ERXD3 ERXD2 ERXD1 ERXD0 RX_DV RX_CLK_RXCLK RX_ER_RXDAT TX_ER TX_CLK_TXCLK TX_EN_TXEN ETXD3 ETXD2 ETXD1 ETXD0_TXDAT COL_CLSN CRS_RXEN
U82A EECS 74F08
EECS_1K
U82B U83A CLKCTR 74F14 CLKCTR# 74F08 EECS_4K
Defaults
R106 4.7K
VSSB VSSB VSSB VSSB VSSB VSSB VSSB VSSB VSSB VSSB VSSB VSSB VSSB VSSB VSSB VSSB VSSB
EBCLK AS_EBOE# EBWE# EROMCS#
ENETEBCLK
Am79C972 (PQR160)
IDSEL AD21 Device CSR116 proper PHY_RST operation
Spare "AND" Gates
VCC3 VCC3 2.2uF 0.1uF MC33269DT-3.3
U82C
0.1uF
0.1uF
0.1uF
0.01uF
74F08 U82D 74F08
GND_ADJ
VOUT
10uF
VCC3 Advanced Micro Devices, Inc. 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title Size (800) 222-9323
PLACE INPUT OUTPUT FILTER CAPS CLOSE POSSIBLE REGULATOR
2.2uF
10uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.01uF
0.01uF
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
ENET1.SCH
Date: Friday, December 1998
Sheet
ETHERNET CHIP, ETHERNET CONNECTOR, LEDS
33pF
25MHz_SMD ECLIPTEK ECSMA-25.00MTR
PHY_
33pF
TX_ER ETXD3 ETXD2 ETXD1 ETXD0_TXDAT TX_CLK_TXCLK TX_EN_TXEN COL_CLSN RX_DV RX_ER_RXDAT RX_CLK_RXCLK ERXD3 ERXD2 ERXD1 ERXD0 CRS_RXEN MDIO LEDS#
R117NET
TX_ER TXD4 TXD3 TXD2 TXD1 TXD0 TX_CLK TX_EN RX_DV RX_ER RX_CLK RXD4 RXD3 RXD2 RXD1 RXD0 MDIO FDS/MDINT MDDIS TRSTE CFG1 CFG0 PWRDWN RESET# LEDS# LEDC# LEDL# LEDT# LEDR#
TPIP
R107 100,
ENET_RD+ ENET_RDENET_TD+ R108 49.9,
RD_CT
TPIN TPOP
RDRD_CT TD_CT
RXRX_CT
TXCT
ENET_TX+ ENET_TXENET_RX+ ENET_RXRXCT
ENET_
TX_CT
ENET_
GND1 GND2 RJ45A 555153-1
ENET _RES
PE68515 C100 0.1uF R110 R111 R112 R113
R109 49.9, TPON TREF VCCT VCCA RBIAS ENET_TD-
ENET _CAP
ENET_TREF C101 0.001uF, (MIN.)
R114 1.00K,
MFV0
RBIAS
C102 0.01uF
C103 0.01uF C104 0.01uF C105 0.1uF AVCC C106 10uF AGND
R115 1.00K,
PHY_RST
R116 22K,
LEDT# LEDR#
GNDT GNDA
C107 10uF
R117 1.00K,
VCCR VCC3 C110 10uF C111 0.1uF C112 0.1uF
AAVCC
C109 0.01uF
C108 10uF
VCCIO GNDR VCCD AAGND
FIBOP FIBON FIBIP FIBIN LXT970QC R149 R150 R151
RLEDS# RLEDT# RLEDR#
EDGE BOARD
GNDIO TEST
GNDD
(SOT23)
(SOT23)
(SOT23)
RJ45 PINOUT, COMPONENT SIDE VIEW PINS: MOUNTING HOLES: SHIELD MOUNTING HOLES: Advanced Micro Devices, Inc. 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title Size (800) 222-9323
ECLIPTEK ECSMA-25.00MTR
LEDS# LUMEX SOT23 LEDT# LEDR#
LINK SPEED
DATA Green
DATA Green
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
ENET2.SCH
Date: Friday, December 1998
Sheet
INTERFACE BOARD BYPASS CAPACITORS
HDD[0.15]
HDD[0.15]
Byass Capacitors Board
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF BC10 0.1uF BC11 0.1uF BC12 0.1uF BC13 0.1uF BC14 0.1uF
HDD7 HDD6 HDD5 HDD4 HDD3 HDD2 HDD13 HDD1
HDD8 HDD9 HDD10 HDD11 HDD12 HDD15 HDD14 HDD0
0.1uF
10K-10P
10K-10P
BC15 0.1uF
BC16 0.1uF
BC17 0.1uF
BC18 0.1uF
BC19 0.1uF
BC20 0.1uF
BC21 0.1uF
BC22 0.1uF
BC23 0.1uF
BC24 0.1uF
BC25 0.1uF
BC26 0.1uF
BC27 0.1uF
BC28 0.1uF SYSRSTJ
HDD7 HDD6 HDD5 HDD4 HDD3 HDD2 HDD1 HDD0
J5LED
HDD8 HDD9 HDD10 HDD11 HDD12 HDD13 HDD14 HDD15
BC29
BC30 0.1uF
BC31 0.1uF
BC32 0.1uF
BC33 0.1uF
BC34 0.1uF
BC35 0.1uF
BC36 0.1uF
BC37 0.1uF
BC38 0.1uF
BC39 0.1uF
BC40 0.1uF
BC41 0.1uF
BC42 0.1uF HDRQ0 HDIOWJ HDIORJ HDIORDY HDACK0 IRQ14 HDA1 HDA0 HDCSJ0
0.1uF
Place bypass capacitor near each chip pin, except: 'ABT chips each side near pins chips each side central
HDIO16J HDA2 HDCSJ1
CNN-40C
TC12 10uF
10uF
TC24 10uF
TC25 10uF BC43 0.1uF BC44 0.1uF BC45 0.1uF BC46 0.1uF BC47 0.1uF
J5LEDR
ACTIVE
(SOT23)
HARD DISK
Distribute Tantalum capacitors around board
SYSRSTJ
HDD7 HDD6 HDD5 HDD4 HDD3 HDD2 HDD1 HDD0
HDD8 HDD9 HDD10 HDD11 HDD12 HDD13 HDD14 HDD15 HDCSJ1 HDCSJ0 HDCSJ3 HDCSJ2 HDA0 HDA2 HDA1 HDIO16J
10K-10P
HDIORJ
HDRQ1 HDIOWJ HDIORJ HDIORDY HDACK1 IRQ15 HDA1 HDA0 HDCSJ2
HDIO16J HDA2 HDCSJ3
J7LED
CNN-40C
ACTIVE
J7LEDR
HDIOWJ
(SOT23)
HARD DISK
HDIORDY
4.7k
Advanced Micro Devices, Inc.
(800) 222-9323
LUMEX (SOT23)
CATH
5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title Size
View
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
IDE.SCH
Date: Friday, December 1998
Sheet
FINALi M1487 INTERFACE
DACK7 DACK6 DACK5 DACK3 DACK2 DACK1 DACK0 IRQ15 IRQ14 IRQ12 IRQ11 IRQ10 IRQ9 IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 IRQ1 IRQ8J DRQ0 DRQ1 DRQ2 DRQ3 DRQ5 DRQ6 DRQ7
RP12 XBUSCSJ CLEAROKJ CMPGNTJ CMPSTJ ENRTC
TC17 10uF
10K-10P
0.1uF
C173 0.1uF
C174 0.1uF
IRQ8J IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 DACKJ0 DACKJ1 DACKJ2 DACKJ3 DACKJ5 DACKJ6 DACKJ7 DREQ0 DREQ1 DREQ2 DREQ3 DREQ5 DREQ6 DREQ7
SD[0.15]
SD[0.15]
U15A
CPUCLK2 CPURST
SYSRS
PCIRSTJ
74F04 U15B
SYSRSTJ
74F04
A20MJ INTR FERRJ IGNNEJ M1487NMI SMIJ STPCLKJ PCICLK
JRESET
U15D ZRSTDRV 74F04
U15C R147 RSTDRV#
RRDRV#
74F04
ATCLK PREQJ0 PREQJ1 PREQJ2 PGNTJ0 PGNTJ1 PGNTJ2 FRAMEJ IRDYJ INT0J INT1J INT2J INT3J XBUSCSJ RTCAS
OSCI
10pF
SPEAK TURBO EXTSMI CLKCTR ENRTC VBAT
CPUCLK CPURST SYSRST A20MJ INTR FERRJ IGNNEJ SMIJ STPCLKJ PCICLK SYSRSTJ ATCLK PREQJ0 PREQJ1 PREQJ2 PGNTJ0 PGNTJ1 PGNTJ2 FARMEJ IRDYJ INT0J INT1J INT2J INT3J XBUSCSJ RTCAS OSC1 OSC2 SPEAKER TURBO EXTSMI SPLED CLKCTR ENRTC KBCLK KBDATA VBAT CLEAROKJ CMPGNTJ CMPSTJ IBCSTJ HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 IOCS16J MEMCS16J MEMRJ MEMWJ SMEMRJ SMEMWJ IOCHRDY OWAITJ BALE IORJ IOWJ MASTERJ IOCHCKJ REFRESHJ SBHEJ
32.768KHz_SMD ECLIPTEK ECPSM29T-32.768KTR
10pF
SD10 SD11 SD12 SD13 SD14 SD15 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 LA17 LA18 LA19 LA20 LA21 LA22 LA23
SA[0.19]
SA[0.19]
LA[17.23]
LA[17.23]
ENRTC
OFF: ENABLE INTERNAL DISABLE INTERNAL
CMPSTJ
OFF: CPU-TO-PCI FREQUENCY CPU-TO-PCI FREQUENCY
R170 IBCSTJ
GA[2.17]
GA[2.17]
DISABLES INTERNAL
*=Do Populate
Advanced Micro Devices, Inc.
GA10 GA11 GA12 GA13 GA14 GA15 GA16 GA17
CLEAROKJ CMPGNTJ CMPSTJ IBCSTJ
M1487
ZAEN ZSBHEJ ZREFSHJ IOCHKJ MASTERJ ZIOWJ ZIORJ ZBALE N0WSJ IOCHRDYJ ZSMEMWJ ZSMEMRJ ZMWJ ZMRJ MEM16J IO16J
(800) 222-9323
5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved Title
ECLIPTEK ECPSM29T-32.768KTR (COMPONENT SIDE VIEW)
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLATFORM
Document Number
Size
M1487.SCH
Date: Friday, December 1998
Sheet
BIOS ROM, SIGNAL SERIES TERMINATION; BATTERY SPEAKER CIRCUITS; RESET, SMI, PUSHBUTTONS
RP18 10K-10P
SA[0.19]
SA[0.19]
GA[2.9]
GA[2.9] RN12 SBHEJ RSTDRV ZBALE 33-8B 08-3 ZAEN ZSBHEJ ZRSTDRV BALE
Data Transferred FINALi LinkBus
RN10 R178 JP32 HEADER JP33 SMEMWJ ZSMEMRJ ZIORJ IOWJ RN11 REFRESHJ ZMRJ MWTJ ATCLKO 33-8B ZREFSHJ MRDJ ZMWJ ATCLK 33-8B ZSMEMWJ SMEMRJ IORJ ZIOWJ
R177 ROM_A17 ROM_A18
XBUSCSJ MRDJ
SMEMW
Am29F010-90
HEADER
TURBO SWITCH FUNCTION TURBO *2.2K
FINALi only supports 1MBit Flash chip (128Kx8 worth address space) legacy, desktop applications
Jumpers allow multiple 128K BIOS images same Flash chip and/or non-PC applications that more than 128Kx8 BIOS
BT1P
VBAT
MMBD4148 (SOT23) Coincell (socket) KEYSTONE
MMBD4148 (SOT23)
U83B U77A EXTNMI# 74F14 TC22 10uF 74F32 M1487NMI (FROM M1487) EXTNMI Am486 CPU)
Press Switch Assert
PBNO
SW2NET
R139
MMBT3906 (SOT23)
Q1RQ
TC13 10uF
MMBD4148 (SOT23)
MMBD4148 (SOT23)
Q2RQ
Press Switch Assert RESET
EXTSMI PBNO
RRPWG
Press Switch Assert
PBNO
RREXTSMI
R140
JP34 TC16 10uF
Q2RR
MMBT3904 (SOT23)
TC23 10uF
HEADER Jumper external RESET# pushbutton
SPARE 'F14 GATES U83C SPEAKER 74F14 U83D 22pF 74F14 U83E 74F14 U83F 74F14
Battery Socket
RRSPEAK RCSPEAK
Reset, Switches
CRSPEAK
MMBD4148 MMBT3904 MMBT3906 (SOT23) (SOT23) (SOT23)
SPEAK
CSPEAK
MMBT3904 (SOT23)
0.1uF
Advanced Micro Devices, Inc. Title Size 5204 White Blvd. Austin, 78741 Proprietary/All Rights Reserved
(800) 222-9323
SWITCH
MMBD4148 (SOT23)
Am486 MICROPROCESSOR CUSTOMER DEVELOPMENT PLAT
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