75A, 55V, 0.008 Ohm, N-Channel UltraFET Power MOSFETs These N-Cha
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HUF75344G3, HUF75344P3, HUF75344S3S
75A, 55V, 0.008 Ohm, N-Channel UltraFET Power MOSFETs
These N-Channel power MOSFETs manufactured using innovative UltraFET® process. This advanced process technology achieves lowest possible on-resistance silicon area, resulting outstanding performance. This device capable withstanding high energy avalanche mode diode exhibits very reverse recovery time stored charge. designed applications where power efficiency important, such switching regulators, switching converters, motor drivers, relay drivers, lowvoltage switches, power management portable battery-operated products. Formerly developmental type TA75344.
Features
75A, Simulation Models Temperature Compensated PSPICE® SABERModels Thermal Impedance PSPICE SABER Models Available www.Intersil.com Peak Current Pulse Width Curve Rating Curve Related Literature TB334, "Guidelines Soldering Surface Mount Components Boards"
Symbol
Ordering Information
PART NUMBER HUF75344G3 HUF75344P3 HUF75344S3S PACKAGE TO-247 TO-220AB TO-263AB BRAND 75344G 75344P 75344S
NOTE: When ordering, entire part number. suffix obtain TO-263AB variant tape reel, e.g., HUF75344S3ST.
Packaging
JEDEC STYLE TO-247
SOURCE DRAIN GATE DRAIN (FLANGE)
JEDEC TO-220AB
SOURCE DRAIN GATE
DRAIN (TAB)
JEDEC TO-263AB
DRAIN (FLANGE) GATE SOURCE
Product reliability information found severe environments, Automotive HUFA series. Intersil semiconductor products manufactured, assembled tested under ISO9000 QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation
HUF75344G3, HUF75344P3, HUF75344S3S Rev.
HUF75344G3, HUF75344P3, HUF75344S3S
Absolute Maximum Ratings
25oC, Unless Otherwise Specified Figure Figure 1.90 UNITS
Drain Source Voltage (Note VDSS Drain Gate Voltage (RGS 20k) (Note VDGR Gate Source Voltage Drain Current Continuous (Figure Pulsed Drain Current Pulsed Avalanche Rating Power Dissipation Derate Above 25oC Operating Storage Temperature .TJ, TSTG Maximum Temperature Soldering Leads 0.063in (1.6mm) from Case 10s. Package Body 10s, Techbrief Tpkg
W/oC
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTE: 25oC 150oC.
Electrical Specifications
PARAMETER STATE SPECIFICATIONS
25oC, Unless Otherwise Specified SYMBOL BVDSS IDSS IGSS VGS(TH) rDS(ON) TEST CONDITIONS 250µA, (Figure 50V, 45V, 150oC ±20V VDS, 250µA (Figure 75A, (Figure (Figure TO-247 TO-220, TO-263 30V, 75A, Ig(REF) 1.0mA (Figure 25V, 1MHz (Figure 0.0065 3200 1170 ±100 0.008 0.52 UNITS
oC/W oC/W oC/W
Drain Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Source Leakage Current STATE SPECIFICATIONS Gate Source Threshold Voltage Drain Source Resistance THERMAL SPECIFICATIONS Thermal Resistance Junction Case Thermal Resistance Junction Ambient SWITCHING SPECIFICATIONS (VGS 10V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge Threshold Gate Charge Gate Source Gate Charge Reverse Transfer Capacitance CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance
td(ON) td(OFF) tOFF Qg(TOT) Qg(10) Qg(TH) CISS COSS CRSS
30V, 75A, 0.4, 10V,
©2001 Fairchild Semiconductor Corporation
HUF75344G3, HUF75344P3, HUF75344S3S Rev.
HUF75344G3, HUF75344P3, HUF75344S3S
Source Drain Diode Specifications
PARAMETER Source Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge SYMBOL 75A, dISD/dt 100A/µs 75A, dISD/dt 100A/µs TEST CONDITIONS 1.25 UNITS
Typical Performance Curves
POWER DISSIPATION MULTIPLIER DRAIN CURRENT CASE TEMPERATURE (oC) CASE TEMPERATURE (oC)
FIGURE NORMALIZED POWER DISSIPATION CASE TEMPERATURE
FIGURE MAXIMUM CONTINUOUS DRAIN CURRENT CASE TEMPERATURE
THERMAL IMPEDANCE ZJC, NORMALIZED DUTY CYCLE DESCENDING ORDER 0.05 0.02 0.01
NOTES: DUTY FACTOR: t1/t2 PEAK 10-3 10-2 10-1
0.01 10-5
SINGLE PULSE 10-4
RECTANGULAR PULSE DURATION
FIGURE NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2001 Fairchild Semiconductor Corporation
HUF75344G3, HUF75344P3, HUF75344S3S Rev.
HUF75344G3, HUF75344P3, HUF75344S3S Typical Performance Curves
2000
(Continued)
25oC
IDM, PEAK CURRENT
1000
TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT FOLLOWS:
TRANSCONDUCTANCE LIMIT CURRENT THIS REGION 10-4 10-3 10-2 PULSE WIDTH 10-1
10-5
FIGURE PEAK CURRENT CAPABILITY
1000 1000 IAS, AVALANCHE CURRENT RATED 25oC (L)(IAS)/(1.3*RATED BVDSS VDD) (L/R)ln[(IAS*R)/(1.3*RATED BVDSS VDD)
DRAIN CURRENT
100µs
STARTING 25oC STARTING 150oC
OPERATION THIS AREA LIMITED rDS(ON) VDSS(MAX) VDS, DRAIN SOURCE VOLTAGE 10ms
0.01
tAV, TIME AVALANCHE (ms)
NOTE: Refer Intersil Application Notes AN9321 AN9322. FIGURE FORWARD BIAS SAFE OPERATING AREA FIGURE UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
DRAIN CURRENT DRAIN CURRENT
PULSE DURATION 80µs DUTY CYCLE 0.5%
PULSE DURATION 80µs DUTY CYCLE 0.5% 25oC VDS, DRAIN SOURCE VOLTAGE
25oC
175oC
-55oC
VGS, GATE SOURCE VOLTAGE
FIGURE SATURATION CHARACTERISTICS
FIGURE TRANSFER CHARACTERISTICS
©2001 Fairchild Semiconductor Corporation
HUF75344G3, HUF75344P3, HUF75344S3S Rev.
HUF75344G3, HUF75344P3, HUF75344S3S Typical Performance Curves
NORMALIZED DRAIN SOURCE RESISTANCE PULSE DURATION 80µs DUTY CYCLE 0.5% 10V, NORMALIZED GATE THRESHOLD VOLTAGE
(Continued)
VDS, 250µA
JUNCTION TEMPERATURE (oC)
JUNCTION TEMPERATURE (oC)
FIGURE NORMALIZED DRAIN SOURCE RESISTANCE JUNCTION TEMPERATURE
FIGURE NORMALIZED GATE THRESHOLD VOLTAGE JUNCTION TEMPERATURE
NORMALIZED DRAIN SOURCE BREAKDOWN VOLTAGE 250µA CAPACITANCE (pF)
4500 1MHz CISS CRSS COSS
CISS 3000
COSS 1500 CRSS
DRAIN SOURCE VOLTAGE
JUNCTION TEMPERATURE (oC)
FIGURE NORMALIZED DRAIN SOURCE BREAKDOWN VOLTAGE JUNCTION TEMPERATURE
GATE SOURCE VOLTAGE
FIGURE CAPACITANCE DRAIN SOURCE VOLTAGE
WAVEFORMS DESCENDING ORDER: GATE CHARGE (nC)
NOTE: Refer Intersil Application Notes AN7254 AN7260. FIGURE GATE CHARGE WAVEFORMS CONSTANT GATE CURRENT
©2001 Fairchild Semiconductor Corporation
HUF75344G3, HUF75344P3, HUF75344S3S Rev.
HUF75344G3, HUF75344P3, HUF75344S3S Test Circuits Waveforms
BVDSS VARY OBTAIN REQUIRED PEAK
0.01
FIGURE UNCLAMPED ENERGY TEST CIRCUIT
FIGURE UNCLAMPED ENERGY WAVEFORMS
Qg(TOT)
Qg(10) Qg(TH) Ig(REF)
IG(REF)
FIGURE GATE CHARGE TEST CIRCUIT
FIGURE GATE CHARGE WAVEFORM
td(ON)
tOFF td(OFF)
PULSE WIDTH
FIGURE SWITCHING TIME TEST CIRCUIT
FIGURE RESISTIVE SWITCHING WAVEFORMS
©2001 Fairchild Semiconductor Corporation
HUF75344G3, HUF75344P3, HUF75344S3S Rev.
HUF75344G3, HUF75344P3, HUF75344S3S PSPICE Electrical Model
.SUBCKT HUF75337
4.9e-9 4.75e-9 2.85e-9
1999
LDRAIN DPLCAP RLDRAIN DBREAK EBREAK DRAIN RSLC1 ESLC
RSLC2
EBREAK 59.7 EVTHRES EVTEMP LDRAIN 1e-9 LGATE 2.6e-9 LSOURCE 1.1e-9 KGATE LSOURCE LGATE 0.0085 MMED MMEDMOD MSTRO MSTROMOD MWEAK MWEAKMOD RBREAK RBREAKMOD RDRAIN RDRAINMOD 1.94e-3 RGATE 0.36 RLDRAIN RLGATE RLSOURCE RSLC1 RSLCMOD 1e-6 RSLC2 RSOURCE RSOURCEMOD 3.5e-3 RVTHRES RVTHRESMOD RVTEMP RVTEMPMOD S1AMOD S1BMOD S2AMOD S2BMOD
GATE
LGATE EVTEMP RGATE EVTHRES
RLGATE
MSTRO LSOURCE RSOURCE RLSOURCE SOURCE
VBAT ESLC .MODEL DBODYMOD 2.95e-12 2.6e-3 TRS1 1.05e-3 TRS2 5.0e-7 5.19e-9 5.9e-8 0.55) .MODEL DBREAKMOD 1.65e-1 TRS1 1.15e-4 TRS2 2.27e-6) .MODEL DPLCAPMOD (CJO 5.40e-9 1e-30 0.88 .MODEL MMEDMOD NMOS (VTO 3.29 1e-30 0.36) .MODEL MSTROMOD NMOS (VTO 3.83 1e-30 .MODEL MWEAKMOD NMOS (VTO 2.90 =0.04 1e-30 3.6) .MODEL RBREAKMOD (TC1 1.15e-3 2.0e-7) .MODEL RDRAINMOD (TC1 1.37e-2 3.85e-5) .MODEL RSLCMOD (TC1 1.45e-4 2.11e-6) .MODEL RSOURCEMOD (TC1 .MODEL RVTHRESMOD (TC1 -3.7e-3 -1.6e-5) .MODEL RVTEMPMOD (TC1 -2.4e-3 7e-7) .MODEL S1AMOD VSWITCH (RON 1e-5 .MODEL S1BMOD VSWITCH (RON 1e-5 .MODEL S2AMOD VSWITCH (RON 1e-5 .MODEL S2BMOD VSWITCH (RON 1e-5 .ENDS ROFF ROFF ROFF ROFF -6.9 VOFF= -3.9) -3.9 VOFF= -6.9) -2.99 VOFF= 2.39) 2.39 VOFF= -2.99)
NOTE: further discussion PSPICE model, consult PSPICE Sub-Circuit Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written William Hepp Frank Wheatley.
©2001 Fairchild Semiconductor Corporation
DBODY DBODYMOD DBREAK DBREAKMOD DPLCAP DPLCAPMOD
RDRAIN
DBODY
MWEAK MMED
RBREAK RVTEMP
VBAT
RVTHRES
HUF75344G3, HUF75344P3, HUF75344S3S Rev.
HUF75344G3, HUF75344P3, HUF75344S3S SABER Electrical Model
February 1999 template huf75344 electrical iscl d.model dbodymod 2.95e-12, 5.19e-9, 5.90e-8, 0.55) d.model dbreakmod d.model dplcapmod (cjo 5.40e-9, 1e-30, 0.88) m.model mmedmod (type=_n, 3.29, 5.5, 1e-30, m.model mstrongmod (type=_n, 3.83, 123, 1e-30, m.model mweakmod (type=_n, 2.90, 0.04, 1e-30, sw_vcsp.model s1amod (ron 1e-5, roff 0.1, -6.9, voff -3.9) sw_vcsp.model s1bmod (ron 1e-5, roff 0.1, -3.9, voff -6.9) sw_vcsp.model s2amod (ron 1e-5, roff 0.1, -2.99, voff 2.39) sw_vcsp.model s2bmod (ron 1e-5, roff 0.1, 2.39, voff -2.99) c.ca 4.9e-9 c.cb 4.75e-9 c.cin 2.85e-9 d.dbody model=dbodymod d.dbreak model=dbreakmod d.dplcap model=dplcapmod i.it
LGATE GATE RLGATE
LDRAIN DPLCAP RSLC1 RSLC2 ISCL RLDRAIN RDBREAK DBREAK MWEAK MMED MSTRO EBREAK RDBODY DRAIN
EVTEMP RGATE EVTHRES
RDRAIN
DBODY
LSOURCE RLSOURCE
l.ldrain 1e-9 l.lgate 2.6e-9 l.lsource 1.1e-9 k.kl i(l.lgate) i(l.lsource) l(l.lgate), l(l.lsource), 0.0085
SOURCE
RSOURCE RBREAK RVTEMP
m.mmed model=mmedmod, m.mstrong model=mstrongmod, m.mweak model=mweakmod, res.rbreak 1.15e-3, 2e-7 res.rdbody 2.6e-3, 1.05e-3, 5e-7 res.rdbreak 1.65e-1, 1.15e-4, 2.27e-6 res.rdrain 1.94e-3, 1.37e-2, 3.85e-5 res.rgate 0.36 res.rldrain res.rlgate res.rlsource res.rslc1 1e-6, 1.45e-4, 2.11e-6 res.rslc2 res.rsource 3.5e-3, res.rvtemp -2.4e-3, 7e-7 res.rvthres -3.7e-3, -1.6e-5 spe.ebreak 59.7 spe.eds spe.egs spe.esg spe.evtemp spe.evthres sw_vcsp.s1a model=s1amod sw_vcsp.s1b model=s1bmod sw_vcsp.s2a model=s2amod sw_vcsp.s2b model=s2bmod v.vbat
VBAT
RVTHRES
equations (n51->n50) iscl iscl: v(n51,n50)
©2001 Fairchild Semiconductor Corporation
HUF75344G3, HUF75344P3, HUF75344S3S Rev.
HUF75344G3, HUF75344P3, HUF75344S3S SPICE Thermal Model
February 1999 HUF75344 CTHERM1 5.0e-3 CTHERM2 1.0e-2 CTHERM3 1.3e-2 CTHERM4 1.5e-2 CTHERM5 2.2e-2 CTHERM6 8.5e-2 RTHERM1 6.0e-4 RTHERM2 3.5e-3 RTHERM3 2.5e-2 RTHERM4 4.8e-2 RTHERM5 1.6e-1 RTHERM6 1.8e-1
RTHERM1 CTHERM1 JUNCTION
RTHERM2
CTHERM2
RTHERM3
CTHERM3
SABER Thermal Model
SABER thermal model HUF75344 template thermal_model thermal_c ctherm.ctherm1 5.0e-3 ctherm.ctherm2 1.0e-2 ctherm.ctherm3 1.3e-2 ctherm.ctherm4 1.5e-2 ctherm.ctherm5 2.2e-2 ctherm.ctherm6 5.5e-2 rtherm.rtherm1 6.0e-4 rtherm.rtherm2 3.5e-3 rtherm.rtherm3 2.5e-2 rtherm.rtherm4 4.8e-2 rtherm.rtherm5 1.6e-1 rtherm.rtherm6 1.8e-1
RTHERM4
CTHERM4
RTHERM5
CTHERM5
RTHERM6
CTHERM6
CASE
©2001 Fairchild Semiconductor Corporation
HUF75344G3, HUF75344P3, HUF75344S3S Rev.
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