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24th Annual Product Year Awards thousands products introduce


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24th Annual
Product Year Awards
thousands products introduced 1999, editors Electronic Products have chosen most outstanding. selections based significant advances technology application, decided innovation design, substantial gain price-performance. usual, picking winners made difficult many impressive products announced during year. Here product Atmel chosen 1999 award winner.
AT94Kxx field-programmable system-level
FPGA/µP enables single-chip systems with co-verification hardware code
AT94Kxx family field-programmable system-level (FPSLICs) makes possible, first time, single-chip systems small projects that don't justify investment ASIC. launch, devices were backed complete tool suite that includes co-verification processor icode FPGA description. devices include company's 8-bit processor core (see Electronic Products, 1998, 104), along with 40,000 gates AT40K FPGA family. Other common microcontroller peripherals such UART, SPI, timer/counters, hardware multiplier also integrated along with Kbytes program SRAM. family also features facility partial reconfiguration FPGA while system running. Several configurations could stored ROM, substituted necessary. example, cell-phone could change from WCDMA moved from country another.
AT94 microprocessor/FPGA allows code logic development proceed hand hand.
SYSTEM DESIGNER
FPGA BASE ENTRY PLANNER CO-VERIFICATION STUDIO BASE C/ASSEMBLY CODE ENTRY
FUNCTIONAL CO-VERIFICATION SYNTHESIS
WAVEFORM VIEWER STUDIO COMPLIER
TECHNOLOGY MAPPING WAVEFORM VIEWER
PLACE ROUT
BACK ANNOTATED CO-VERIFICATION
PROGRAMMING
FPGA BITSTREAM SLIC PROGRAMMING
System Designer, tool suite family, includes co-verification FPGA hardware code from beginning (see diagram). suite includes instruction-set simulator FPGA design simulator that work together before actual hardware involved. System Designer toolset supports co-verification firmware HDL, allowing design completely tested simulation before silicon prototype needed. C-like macro language used supply debug environment with system macros host file simulation, reset, startup, shutdown, loops, statements, return statements. Interrupt simulation launch specific interrupts periodically specific cycle count. software allows what-if compar-
isons different hardware/software partitions, predicting performance power consumption each possibility. More than pushbutton macro generators produce hard soft parameterizable cores FPGA section. user specify multiplier (for example, need know HDL. System Designer runs Windows 95/98/NT. AT94K FPSLIC family three members, with 40,000, 20,000, 10,000 FPGA gates. (AT94, from $19.90 ea/20,000-samples available now; System Designer annual subscription, $495-available now.) Atmel, Jose, Hotline 800-29-ATMEL literature@atmel.com
Reprinted from ELECTRONIC PRODUCTS JANUARY 2000

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