VREF Bank Number Orientation Pin/Pad Function VCCINT GNDINT

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VREF Bank Number Orientation Pin/Pad Function VCCINT GNDINT

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EP20K400C Pin-Outs ver.
VREF Bank
Number Orientation
Pin/Pad Function VCCINT GNDINT VCCIO VCCINT GNDINT GNDIO VCCINT GNDINT VCCIO I/O, DATA6 VCCINT GNDINT
652-Pin VCCINT VCCIO8 VCCINT VCCINT VCCIO8 VCCINT
672-Pin FineLine VCCINT VCCIO8 VCCINT VCCINT VCCIO8 VCCINT
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function I/O, DATA7 GNDIO I/O, VCCINT GNDINT I/O, VCCIO I/O, VCCINT GNDINT VCC_CKLK4 GND_CKLK4 GND_CKLK4 I/O, I/O, DEV_CLRn VCCIO GNDIO I/O, CLKLK_FB2n CLKLK_FB2p I/O, CLK4n CLK4p I/O, CLK2n VCCINT GNDINT DATA0 (5), DCLK CLK2p VCCIO GND_CKLK2 GND_CKLK2 652-Pin VCCINT VCCIO8 VCCINT VCCIO8 VCCINT VCCIO7 672-Pin FineLine VCCINT VCCIO8 VCCINT VCCINT VCCIO7
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function GNDINT VCCINT VCC_CKLK2 I/O, DEV_OE VCC_CKOUT2 GND_CKOUT2 CLKLK_OUT2p I/O, CLKLK_OUT2n VCCIO I/O, LVDSTXINCLK1p I/O, LVDSTXINCLK1n I/O, LOCK2 I/O, LVDSTXOUTCLK1n I/O, LVDSTXOUTCLK1p GNDINT VCCINT I/O, LVDSTX01p I/O, LVDSTX01n I/O, LVDSTX02n I/O, LVDSTX02p GNDIO I/O, LVDSTX03p I/O, LVDSTX03n I/O, LVDSTX04n I/O, LVDSTX04p GNDINT VCCINT I/O, LVDSTX05p I/O, LVDSTX05n I/O, LOCK4 I/O, LVDSTX06n I/O, LVDSTX06p VCCIO I/O, LVDSTX07p I/O, LVDSTX07n I/O, LVDSTX08n I/O, LVDSTX08p GNDINT VCCINT I/O, LVDSTX09p I/O, LVDSTX09n I/O, LVDSTX10n I/O, LVDSTX10p 652-Pin VCCINT VCCIO7 VCCINT VCCINT VCCIO7 VCCINT 672-Pin FineLine VCCINT VCCIO7 VCCINT VCCINT VCCIO7 VCCINT
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function GNDIO I/O, LVDSTX11p I/O, LVDSTX11n I/O, LVDSTX12n I/O, LVDSTX12p GNDINT VCCINT I/O, LVDSTX13p I/O, LVDSTX13n I/O, LVDSTX14n I/O, LVDSTX14p VCCIO I/O, LVDSTX15p I/O, LVDSTX15n I/O, LVDSTX16n I/O, LVDSTX16p GNDINT VCCINT GNDIO GNDINT VCCINT VCCIO VCCIO 652-Pin VCCINT VCCIO7 VCCINT VCCINT VCCIO7 VCCIO6 672-Pin FineLine VCCINT VCCIO7 VCCINT VCCINT VCCIO7 VCCIO6
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function GNDIO VCCIO GNDIO VCCINT VCCINT GNDINT GNDINT VCCIO 652-Pin AL10 VCCIO6 AM10 AL11 AM11 AN10 VCCINT VCCINT AN11 AP10 AL13 AM13 AN12 AP11 AL14 AR10 VCCIO6 AN13 AP12 AM14 AR11 AL15 AN14 672-Pin FineLine VCCIO6 VCCINT VCCINT AA10 AB11 AB10 VCCIO6 AC10 AA11
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function GNDIO VCCIO I/O, LVDSDESKEW CONF_DONE nSTATUS FAST4 VCCIO VCCINT VCCINT GNDINT GNDINT FAST3 GNDIO 652-Pin AP13 AR12 AR13 AM15 AN15 AL16 VCCIO6 AP14 AR14 AP15 AR15 AM16 AN16 AP16 AR16 AM17 AN17 AP17 VCCIO5 VCCINT VCCINT AP19 AN19 AM19 AR20 AP20 AN20 AM20 AR21 AP21 AR22 AP22 AL20 AN21 AM21 AR23 AR24 AP23 AN22 AL21 AR25 AM22 AP24 672-Pin FineLine AF11 AE10 VCCIO6 AB12 AF10 AE11 AA12 AA13 VCCIO5 VCCINT VCCINT AA14 AA15 AC13 AD17 AC12 AC14 AD10 AB13 AB14 AC11 AD18 AC15 AB15 AB16 AD19
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function VCCIO VCCINT VCCINT GNDINT GNDINT GNDIO VCCIO GNDIO 652-Pin AN23 VCCIO5 AR26 AL22 AP25 AN24 AM23 AL23 AR27 AP26 AN25 AR28 VCCINT VCCINT AP27 AN26 AM25 AR29 AP28 AL25 AN27 AM26 AR30 AP29 VCCIO5 AN28 AL26 AM27 AR31 AP30 AN29 AM28 AR32 AL27 AP31 AR33 AN30 AM29 AL28 AP32 AR34 AN31 AP33 672-Pin FineLine AA16 VCCIO5 AC16 AC17 AB17 AE16 AA17 AD20 VCCINT VCCINT AB18 AF16 AA18 AC18 AE17 AF17 VCCIO5 AA19 AD21 AD22 AC19 AB20 AB19 AC20 AD23 AA20 AB24 AC22 AC21 AA23
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function VCCIO VCCIO VCCINT GNDINT GNDIO VCCINT GNDINT VCCIO VCCINT GNDINT GNDIO 652-Pin AM30 AL29 VCCIO5 VCCIO4 AL33 AK30 AK31 AK32 VCCINT AL34 AM35 AJ30 AJ31 AJ32 AJ33 AK34 AL35 AJ34 AH30 VCCINT AH32 AH33 AK35 AH34 AJ35 VCCIO4 AG30 AG31 AG32 AG33 AG34 VCCINT AG35 AF30 AF31 AF32 AF33 AF34 AF35 AE30 AE31 AE32 672-Pin FineLine AA24 AB23 VCCIO5 VCCIO4 AA21 AB21 VCCINT AB22 AA22 VCCINT VCCIO4 VCCINT
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function VCCINT GNDINT VCCIO VCCINT GNDINT GNDIO I/O, LOCK1 VCCINT GNDINT VCC_CKLK1 GND_CKLK1 GND_CKLK1 VCCIO I/O, CLKLK_FB1n CLKLK_FB1p I/O, CLK3n CLK3p I/O, CLK1n VCCINT GNDINT VCCIO nCONFIG CLKLK_ENA (5), (10) CLK1p MSEL1 652-Pin VCCINT AE34 AE35 AD30 AD31 AD32 VCCIO4 AD33 AD34 AD35 AC30 AC31 VCCINT AC33 AC34 AC35 AB30 AB31 AB32 AB33 AB34 AB35 AA30 VCCINT AA32 AA33 AA34 AA35 VCCIO4 VCCINT VCCIO4 672-Pin FineLine VCCINT VCCIO4 VCCINT VCCINT AF18 AE18 AE18 VCCIO4 AF20 AE20 VCCINT VCCIO4
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function MSEL0 GNDINT VCCINT VCC_CKOUT1 GND_CKOUT1 CLKLK_OUT1p I/O, CLKLK_OUT1n VCC_CKLK3 GNDIO GND_CKLK3 GND_CKLK3 I/O, LVDSRXINCLK1p I/O, LVDSRXINCLK1n GNDINT VCCINT I/O, LVDSRX01p I/O, LVDSRX01n I/O, LOCK3 I/O, LVDSRX02n I/O, LVDSRX02p VCCIO I/O, LVDSRX03p I/O, LVDSRX03n I/O, LVDSRX04n I/O, LVDSRX04p GNDINT VCCINT I/O, LVDSRX05p I/O, LVDSRX05n I/O, LVDSRX06n I/O, LVDSRX06p GNDIO I/O, LVDSRX07p I/O, LVDSRX07n I/O, LVDSRX08n I/O, LVDSRX08p GNDINT VCCINT I/O, LVDSRX09p I/O, LVDSRX09n I/O, LVDSRX10n 652-Pin VCCINT VCCINT VCCIO3 VCCINT VCCINT 672-Pin FineLine VCCINT AF22 AE22 AE23 AF23 AC26 AC25 AB25 AB26 VCCINT AA25 AA26 VCCIO3 VCCINT VCCINT
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function I/O, LVDSRX10p VCCIO I/O, LVDSRX11p I/O, LVDSRX11n I/O, LVDSRX12n I/O, LVDSRX12p GNDINT VCCINT I/O, LVDSRX13p I/O, LVDSRX13n I/O, LVDSRX14n I/O, LVDSRX14p GNDIO I/O, LVDSRX15p I/O, LVDSRX15n I/O, LVDSRX16n I/O, LVDSRX16p GNDINT VCCINT VCCIO GNDINT VCCINT VCCIO GNDIO 652-Pin VCCIO3 VCCINT VCCINT VCCIO3 VCCINT VCCIO2 672-Pin FineLine VCCIO3 VCCINT VCCINT VCCIO3 VCCINT
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function VCCIO GNDIO VCCIO GNDINT GNDINT VCCINT VCCINT GNDINT GNDIO 652-Pin VCCIO2 VCCIO2 VCCINT VCCINT 672-Pin FineLine VCCIO2 VCCIO2 VCCINT VCCINT
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function VCCIO TRST nCEO FAST1 GNDINT GNDINT VCCINT VCCINT GNDIO FAST2 GNDINT I/O, INITDONE I/O, RDYnBSY I/O, CLKUSR VCCIO 652-Pin VCCIO2 VCCINT VCCINT VCCIO1 672-Pin FineLine VCCIO2 VCCINT VCCINT VCCIO1
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function I/O, DATA1 GNDIO VCCIO I/O, DATA2 GNDINT GNDINT VCCINT VCCINT VCCIO I/O, DATA3 GNDIO I/O, DATA4 VCCIO 652-Pin VCCIO1 VCCINT VCCINT VCCIO1 VCCIO1 672-Pin FineLine VCCIO1 VCCINT VCCINT VCCIO1 VCCIO1
Altera Corporation
EP20K400C Pin-Outs ver. VREF Bank Number Orientation Pin/Pad Function I/O, DATA5 GNDIO 652-Pin 672-Pin FineLine
Altera Corporation
EP20K400C Configuration Power Pins ver.
Name MSEL0 MSEL1 nSTATUS nCONFIG DCLK CONF_DONE INIT_DONE nCEO RDYnBSY CLKUSR DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 (5), TRST Dedicated Fast I/Os CLK1p CLK2p CLK3p CLK4p LOCK1 LOCK2 LOCK3 LOCK4 CLKLK_ENA (5), (10) CLKLK_OUT1p CLKLK_OUT2p CLKLK_FB1p CLKLK_FB2p DEV_CLRn DEV_OE
652-Pin AN17 AM17 AN19 AM19 AP19, AP17, B17, AA30
672-Pin FineLine AA13 AA12 AA14 AA15 Y14, Y13, F13, AE23 AE20
Altera Corporation
EP20K400C Configuration Power Pins ver. Name VCCINT 652-Pin A17, A19, AA31, AA4, AC3, AC32, AE2, AE33, AG1, AH31, AH35, AH4, AK33, AL12, AL2, AL24, AM12, AM24, AR17, AR19, D12, D24, E12, E24, F35, G30, K31, M30, N35, R34, U34, E19, D31, F30, F31, W30, AL31, AL32 AN32, AN33, AL19 AL17, AM5, AL3, AL4, AA35 A18, A35, AK18, AL18, AL30, AL5, AL6, AM18, AM2, AM3, AM31, AM32, AM33, AM34, AM4, AN1, AN18, AN2, AN3, AN34, AN35, AP1, AP18, AP2, AP34, AP35, AR1, AR18, AR35, B18, B34, B35, C18, C33, C34, C35, D17, D18, D32, D33, D34, E18, E30, E31, E32, E33, F18, V30, V31, V32, V33, V34, T33, 672-Pin FineLine A24, B19, B24,C1, C25, C26, D24,K11, L10, L15, M13, M16, N12, P15, P24, P25, R11, R14, T12, T17, U16, AC3, AC24, AD1, AD2, AD25,AD26, AE3, AE8, AE19, AE24, AF3, AF24 J10, A13, K16, A21, L17, N24, R16, T15, V17, AF21 R13, U11, V10, AF13 P12, T10, M11, AF18 AC26 AF22 A14, A19, A25, B21, B25, B26, C13, C24, D23, H19, J18, K10, K17, L11, L13, L16, M12, M15, N13, N14, N26, P13, P14, P23, P26, R12, R15, T11, T16, U10, U17, V18, W19, AC4, AC23, AD3, AD13, AD24, AE1, AE2, AE6, AE21, AE25, AE26, AF2, AF8, AF14, AF19, AF25
VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8 VCC_CKLK1 VCC_CKLK2 VCC_CKLK3 VCC_CKLK4 VCC_CKOUT1 VCC_CKOUT2
GND_CKLK1 GND_CKLK2 GND_CKLK3 GND_CKLK4 GND_CKOUT1 GND_CKOUT2 Connect (N.C.)
Total User Pins (11)
AE18 AC25, AE22 A15, A16, B13, B14, B15, B16, C11, C12, C14, C15, C16, AF12, AF15, AE12, AE13, AE14, AE15, AD11, AD12, AD14, AD15, AD16
Altera Corporation
EP20K400C Tables ver. Notes: This used user after configuration. This power ground ClockLock ClockBoost circuitry. ensure noise resistance, power ground supply ClockLock ClockBoost circuitry should isolated from power ground rest device. VCC_CKLK same voltage specifications VCCINT should connected 2.5-V power supply. ClockLock ClockBoost circuitry used, this power ground should connected VCCINT GNDINT, respectively. This used user used device-wide configuration function. This complementary signal LVDS pair dedicated inputs outputs that configured LVDS standard. used LVDS pair, these pins regular pins. Pins with suffix carry negative signal LVDS channel. Pins with suffix carry positive signal LVDS channel. This dedicated pin; available user pin. This tri-stated user mode. This power ground external output PLL. These pins should VCCIO level/standard desired external clock ouput. ensure noise resistance, power ground supply external output should isolated from power ground rest VCCIO GNDIO pins. external output used, this power ground should connected VCCIO GNDIO, respectively. CLKLK_OUT powered VCC_CKOUT GND_CKOUT pins. This shows status ClockLock ClockBoost circuitry. When ClockLock ClockBoost circuitry locked incoming clock generates internal clock, LOCK driven high. LOCK remains high periodic clock stops clocking. LOCK function optional; LOCK output used, this user pin. (10) This active high enable circuits device. When de-asserted, PLLs reset their default, unlocked state will stop clocking. Once re-asserted, PLLs will lock again start clocking. this function needed, should connected VCCINT. (11) user count includes dedicated inputs dedicated clock inputs. does include dedicated clock feedback output pins.
Altera Corporation
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VREF Bank Number Orientation Pin/Pad Function VCCINT GNDINT

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