Quad 3-State Noninverting Buffers MC74HC125A MC74HC126A identical
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Quad 3-State Noninverting Buffers
MC74HC125A MC74HC126A identical pinout LS125 LS126. device inputs compatible with standard CMOS outputs; with pullup resistors, they compatible with LSTTL outputs. HC125A HC126A noninverting buffers designed used with 3-state memory address drivers, clock drivers, other bus-oriented systems. devices have four separate output enables that active-low (HC125A) active-high (HC126A). Output Drive Capability: LSTTL Loads Outputs Directly Interface CMOS, NMOS, Operating Voltage Range: Input Current: High Noise Immunity Characteristic CMOS Devices Compliance with Requirements Defined JEDEC Standard Chip Complexity: FETs Equivalent Gates LOGIC DIAGRAM HC125A Active-Low Output Enables
MC74HC125A MC74HC126A
SUFFIX 14-LEAD PLASTIC PACKAGE CASE 646-06
SUFFIX 14-LEAD PLASTIC SOIC PACKAGE CASE 751A-03
HC126A Active-High Output Enables
SUFFIX 14-LEAD PLASTIC TSSOP PACKAGE CASE 948G-01
ORDERING INFORMATION MC74HCXXXAN MC74HCXXXAD MC74HCXXXADT Plastic SOIC TSSOP
ASSIGNMENT
FUNCTION TABLE
HC125A Inputs Output HC126A Inputs Output
4/97
Motorola, Inc. 1997
MC74HC125A MC74HC126A
MAXIMUM RATINGS*
Symbol Vout Iout Parameter Value Unit Supply Voltage (Referenced GND) Input Voltage (Referenced GND) Output Voltage (Referenced GND) Input Current, Output Current, Supply Current, Pins Power Dissipation Still Plastic SOIC Package TSSOP Package Tstg Storage Temperature
This device contains protection circuitry guard against damage high static voltages electric fields. However, precautions must taken avoid applications voltage higher than maximum rated voltages this high-impedance circuit. proper operation, Vout should constrained range (Vin Vout) VCC. Unused inputs must always tied appropriate logic voltage level (e.g., either VCC). Unused outputs must left open.
Lead Temperature, from Case Seconds (Plastic DIP, SOIC TSSOP Package)
Maximum Ratings those values beyond which damage device occur. Functional operation should restricted Recommended Operating Conditions. Derating Plastic DIP: mW/_C from 125_C SOIC Package: mW/_C from 125_C TSSOP Package: mW/_C from 125_C high frequency heavy load considerations, Chapter Motorola High-Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Unit Vin, Vout Supply Voltage (Referenced GND) Input Voltage, Output Voltage (Referenced GND)
Operating Temperature, Package Types Input Rise Fall Time (Figure
1000
ELECTRICAL CHARACTERISTICS (Voltages Referenced GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
25_C 3.15 1.35
85_C 125_C
3.15 1.35 3.15 1.35
Unit
Minimum High-Level Input Voltage
Vout |Iout|
Maximum Low-Level Input Voltage
Vout |Iout|
Minimum High-Level Output Voltage
|Iout|
|Iout| |Iout| |Iout|
2.48 3.98 5.48
2.34 3.84 5.34
Maximum Low-Level Output Voltage
|Iout|
|Iout| |Iout| |Iout|
0.26 0.26 0.26
0.33 0.33 0.33
High-Speed CMOS Logic Data DL129
MC74HC125A MC74HC126A
ELECTRICAL CHARACTERISTICS (Voltages Referenced GND)
Guaranteed Limit Symbol Parameter Test Conditions 25_C
85_C 125_C
Unit
Maximum Input Leakage Current Maximum Three-State Leakage Current Maximum Quiescent Supply Current (per Package)
Output High-Impedance State Vout Iout
NOTE: Information typical parametric values found Chapter Motorola High-Speed CMOS Data Book (DL129/D).
ELECTRICAL CHARACTERISTICS Input
Guaranteed Limit Symbol tPLH, tPHL Parameter 25_C
85_C 125_C
Unit
Maximum Propagation Delay, Input Output (Figures
tPLZ, tPHZ
Maximum Propagation Delay, Output Enable (Figures
tPZL, tPZH
Maximum Propagation Delay, Output Enable (Figures
tTLH, tTHL
Maximum Output Transition Time, Output (Figures
Maximum Input Capacitance
Cout
Maximum Three-State Output Capacitance (Output High-Impedance State)
NOTE: propagation delays with loads other than information typical parametric values, Chapter Motorola High- Speed CMOS Data Book (DL129/D). Typical 25°C,
Power Dissipation Capacitance (Per Buffer)*
Used determine no-load dynamic power consumption: load considerations, Chapter Motorola High-Speed CMOS Data Book (DL129/D).
High-Speed CMOS Logic Data DL129
MC74HC125A MC74HC126A
SWITCHING WAVEFORMS
(HC125A) INPUT tPLH tPHL tTLH tTHL OUTPUT (HC126A) tPZL tPLZ OUTPUT tPZH tPHZ HIGH IMPEDANCE HIGH IMPEDANCE
OUTPUT
Figure
Figure
TEST POINT OUTPUT DEVICE UNDER TEST
TEST POINT OUTPUT CONNECT WHEN TESTING tPLZ tPZL. CONNECT WHEN TESTING tPHZ tPZH.
DEVICE UNDER TEST
Includes probe capacitance
Includes probe capacitance
Figure Test Circuit
Figure Test Circuit
HC125A (1/4 DEVICE)
HC126A (1/4 DEVICE)
High-Speed CMOS Logic Data DL129
MC74HC125A MC74HC126A
OUTLINE DIMENSIONS
SUFFIX PLASTIC SOIC PACKAGE CASE 751A-03 ISSUE
0.25 (0.010)
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.127 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION.
SEATING PLANE
0.25 (0.010)
MILLIMETERS 8.75 8.55 4.00 3.80 1.75 1.35 0.49 0.35 1.25 0.40 1.27 0.25 0.19 0.25 0.10 5.80 6.20 0.25 0.50
INCHES 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 0.008 0.009 0.004 0.009 0.228 0.244 0.010 0.019
SUFFIX PLASTIC PACKAGE CASE 646-06 ISSUE
NOTES: LEADS WITHIN 0.13 (0.005) RADIUS TRUE POSITION SEATING PLANE MAXIMUM MATERIAL CONDITION. DIMENSION CENTER LEADS WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH. ROUNDED CORNERS OPTIONAL. INCHES 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 0.052 0.095 0.008 0.015 0.115 0.135 0.300 0.015 0.039 MILLIMETERS 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 1.32 2.41 0.20 0.38 2.92 3.43 7.62 0.39 1.01
SEATING PLANE
High-Speed CMOS Logic Data DL129
MC74HC125A MC74HC126A
OUTLINE DIMENSIONS
SUFFIX PLASTIC TSSOP PACKAGE CASE 948G-01 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSION DOES INCLUDE MOLD FLASH, PROTRUSIONS GATE BURRS. MOLD FLASH GATE BURRS SHALL EXCEED 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE INTERLEAD FLASH PROTRUSION. INTERLEAD FLASH PROTRUSION SHALL EXCEED 0.25 (0.010) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.08 (0.003) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. TERMINAL NUMBERS SHOWN REFERENCE ONLY. DIMENSION DETERMINED DATUM PLANE -W-. MILLIMETERS 4.90 5.10 4.30 4.50 1.20 0.05 0.15 0.50 0.75 0.65 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 INCHES 0.193 0.200 0.169 0.177 0.047 0.002 0.006 0.020 0.030 0.026 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252
0.10 (0.004) 0.15 (0.006)
0.25 (0.010)
IDENT.
DETAIL
0.15 (0.006)
SECTION
0.10 (0.004) SEATING
PLANE
DETAIL
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MC74HC125A/D High-Speed CMOS Logic Data DL129
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