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MC74F257 quad 2-input multiplexer with 3-state outputs. Four bits data


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MC74F257A QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS
MC74F257 quad 2-input multiplexer with 3-state outputs. Four bits data from sources selected using common Data Select input. four outputs present selected data true (non-inverted) form. outputs switched high impedance state with HIGH common Output Enable (OE) input, allowing outputs interface directly with oriented systems. Multiplexer Expansion Tying Outputs Together Non-Inverting 3-State Outputs Input Clamp Diodes Limit High-Speed Termination Effects Enhanced Version F257 CONNECTION DIAGRAM
QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS
FASTSCHOTTKY
SUFFIX CERAMIC CASE 620-09
SUFFIX PLASTIC CASE 648-08
LOGIC DIAGRAM
SUFFIX SOIC CASE 751B-03
ORDERING INFORMATION
MC54FXXXAJ Ceramic MC74FXXXAN Plastic MC74FXXXAD SOIC
LOGIC SYMBOL
FUNCTION TABLE
Output Enable Select Input Data Inputs Outputs
HIGH Voltage Level Voltage Level Don't Care High Impedance
FAST DATA 4-127
MC74F257A
GUARANTEED OPERATING RANGES
Symbol Supply Voltage Operating Ambient Temperature Range Output Current High Output Current Parameter -3.0 Unit
CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits Symbol Parameter Input HIGH Voltage Input Voltage Input Clamp Diode Voltage Output HIGH Voltage IOZH IOZL Output Voltage Output Current HIGH Output Current Input HIGH Current 0.35 ICCH Input Current Output Short Circuit Current (Note -0.6 -150 -1.2 Unit Test Conditions Guaranteed Input HIGH Voltage Guaranteed Input Voltage -3.0 -3.0 VOUT VOUT VOUT ICCL Power Supply Current 14.5 I0x, ICCZ
NOTES: conditions shown MAX, appropriate value specified under guaranteed operating ranges. more than output should shorted time, more than second.
4.50 4.75
FUNCTIONAL DESCRIPTION F257A quad 2-input multiplexer with 3-state outputs. selects four bits data from sources under control Common Data Select input. When Select input LOW, inputs selected when Select HIGH, inputs selected. data selected inputs appears outputs true (non-inverted) form. device logic implementation 4-pole, 2-position switch where position switch determined logic levels supplied Select input. logic equations outputs shown below: (I1a (I1b (I1c (I1d When Output Enable input (OE) HIGH, outputs forced high impedance state. outputs tied together, device must high impedance state avoid high currents that would exceed maximum ratings. Designers should ensure Output Enable signals 3-state devices whose outputs tied together designed there overlap.
FAST DATA 4-128
MC74F257A
CHARACTERISTICS
+25°C +5.0 Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Output Disable Time Propagation Delay Propagation Delay Output Enable Time Parameter 70°C 10.5 Unit
FAST DATA 4-129

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