EASY256-E1T1 Reference Design MUNICH256 QuadFALC Version Datacom
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EASY256-E1T1 Reference Design MUNICH256 QuadFALC Version
Datacom
Edition 09.00 Published Infineon Technologies St.-Martin-Strasse D-81541 Germany
Infineon Technologies 9/6/00.
Rights Reserved. Attention please! information herein given describe certain components shall considered warranted characteristics. Terms delivery rights technical change reserved. hereby disclaim warranties, including limited warranties non-infringement, regarding circuits, descriptions charts stated herein. Infineon Technologies approved CECC manufacturer. Information further information technology, delivery terms conditions prices please contact your nearest Infineon Technologies Office Germany Infineon Technologies Representatives worldwide (see address list). Warnings technical requirements components contain dangerous substances. information types question please contact your nearest Infineon Technologies Office. Infineon Technologies Components only used life-support devices systems with express written approval Infineon Technologies, failure such components reasonably expected cause failure that life-support device system, affect safety effectiveness that device system. Life support devices systems intended implanted human body, support and/or maintain sustain and/or protect human life. they fail, reasonable assume that health user other persons endangered.
Tool scrip ion, ptemb
EASY256-E1T1 Reference Design MUNICH256 QuadFALC Version
Datacom
Revision History: Previous Version: Page
09.00 none
Subjects (major changes since last revision)
questions technology, delivery prices please contact Infineon Technologies Offices Germany Infineon Technologies Companies Representatives worldwide: webpage http://www.infineon.com
EASY256-E1T1
Table Contents 1.1.1 1.1.2 1.1.3 1.1.4 1.2.1 1.2.2 1.2.3 1.3.1 1.3.2 1.3.3 1.3.4 1.3.5 1.3.6 1.3.7 3.10 3.11 3.12 3.12.1 3.12.2
Page
Introduction Overview Applications Features Hardware Software Overall System Architecture Network System Software Communications Software User Front-End Software WinEASY Installation Directory Directories Directories Directories TOOLS Directory WinEASY Directory Installation Procedure Hardware Description EASY256-E1T1 Board Functional Overview Operating Modes Functional Description Port assignment between MUNICH256 QuadFALC Memory Registers EASY256-E1T1 EPLD Logic Schematics EASY256-E1T1 WinEASY EASY256-E1T1 Introduction Configuration Setup Evaluation Development Tools start PCDDS: Application Manager Basic Functional Model Functional Overview WinEASY Application User Interface MUNICH256 QuadFALC Chip Level Single Step Tools Communication Subsystem Software Individual Subsystem Software Cross Software Development Tools Quick Start Installing PC-DDS Mainboard Data Transmission real time device driver
Tool Description
09.00
EASY256-E1T1
Table Contents 3.12.3 4.3.1 4.4.1 4.4.2 4.5.1 4.5.2 4.5.3 4.5.4 4.5.5 4.5.6 4.5.7 4.5.8 4.5.9 4.5.10 4.5.11 4.5.12 4.5.13 4.5.14 4.5.15 4.5.16 4.5.17 4.5.18 4.5.19 4.6.1 5.3.1 5.3.2 5.3.3 5.3.4 5.4.1
Page
Data Transmission using Chip Level Register Access Messages EASY256-E1T1 Introduction Overall Software Architecture C/I-Messages Debugging Debug Indications C/I-Messages Device Driver Module M256 Command Messages MUNICH256 Device Driver Module Indication Messages from M256 Messages QuadFALC Device Driver Module Initialize Device Mode Initialize Device Mode Initialize Device Mode Loopback Control Reset Signaling Controller Initialize Device Mode T1/J1 Read Data Transmit Data Init Device HDLC Signaling Transmit HDLC Frames T1/J1 Read Data Transmit Data Indicate Data Physical Line Activation Indication Receive HDLC Data Indication Physical Line Deactivation Indication Receive Data Indication Activation Indication Receive Data Indication C/I-Messages Application Module IP-Router Command Messages ROUTER application module Device Driver System Introduction Device Driver System Concept Software Model EASY256-E1T1 Hardware Message Based Communication Message Buffer Management Interrupt Handling Device Driver System Interfaces Device Driver System Modules Device Driver System Kernel
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Tool Description
EASY256-E1T1
5.4.2 5.4.3 5.4.4 5.4.5 5.4.6 5.5.1 5.5.2 5.5.3 5.5.4 5.5.5 6.2.1 6.2.2 6.2.3 6.2.4 6.2.5 6.2.6 6.2.7 6.2.8 7.2.1 7.2.2 7.2.3 7.2.4 7.2.5 7.2.6
Device Driver System User Interface Device Driver System Message Buffer Management DDSM Device Driver Module Memory Management DDMM Central Kernel Module DDSK Device Driver System Integration Module Operational Description Initial Firmware Setup Communications Software Individual Modules Portable Device Driver Modules General Applications M256 Device Driver Modules Introduction MUNICH256 Modules Overview MUNICH256 Modules Architecture MUNICH256 Module Basic Data Structures MUNICH256 Module Entry Points Multiple Chip Support MUNICH256 General Channel Handling MUNICH256 General Transmit Descriptor Link List Handling General Receive Descriptor Linked List Handling Access PCI-Config Space Auto-Load from Device Driver Module QuadFALC Introduction QuadFALC Module QuadFALC Module Architecture QuadFALC Module Basic Data Structures QuadFALC Module Entry Points Message Entry Point HDLC Transceiver Robbing Transceiver T1/J1 Mode
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EASY256-E1T1
List Figures Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure
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Hardware Components Complete Test System Software Structure File Structure EASY256-E1T1 Software EASY256-E1T1 Hardware Layout Layout EASY256-E1T1 Board WinEASY MUNICH256 Initial Screen View WinEASY Interface Parameter Dialog Download Software Board WinEASY Application Manager Functional Model EASY256-E1T1 Evaluation Software Basic EASY256-E1T1 Chip Level Interface Indication MUNICH256 Interrupts Modification MUNICH256 Link Lists Initial Screen View Initial Screen View Screen View After Software Download Entering Chip Level. Setting PMIAR Port Mode Register (PMR) Setting Enabling Port transmitter Register Interrupt Queue Monitors Contain Vectors Details Interrupt Queue Timeslot Assignment Indirect Access Register (TSAIA) Timeslot Assignment TSAD Channel Specification: Receive Mode Register Setting. Channel Specification: Transmit Mode Register Setting Channel Specification: Buffer Interrupt Queue Settings Channel Specification: Interrupt Mask Settings Channel Specification: Building Transmit Buffer List Transmit Descriptor Data Buffer Channel Specification: Building Receive Buffer List Channel Specification: Initialization Command Global Interrupt Status after data transfer Transmit Interrupt Queue after First Data Transfer Received Data Corresponding Descriptor Adding Second Transmit Frame Descriptor Queue Transmit Hold Reset Command Transmitter Re-activation Second Received Frame descriptors General Architecture Device Driver System (DDS) Message Data Structure. Modular Device Driver Software Overall Software Architecture Device Driver System Architecture
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Tool Description
EASY256-E1T1
List Figures Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure
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General Message Data Structure Message Synchronization between Mainboard Message Flow Buffer Management General Interrupt Handling. Device Driver System Interface General Structure Start Sequence DDSK Kernel Module. Main Processing Levels: Main Loop Interrupt Level Message Routing Kernel (DDSK) Import Functions used DDSK Module Structure External Message Interface Architecture DDSU User Interface Module System Memory Management Buffer Pools DDSM Structure Device Driver System Memory Management DDSM DDMM Pool MUNICH256 Descriptors Structure Device Driver Module Memory Management DDMM Communication between Evaluation Board Software Primary Rate Application with EASY256-E1T1 Testing Full Path E1/T1 link hardware loops Integration Device Driver Modules into System Device Driver Module interface between Hardware System Architecture MUNICH256 Device Driver Modules Internal Structure MUNICH256 M256 Transmitter Finite State Machine Receiver Finite State Machine Device Driver Module QuadFALC QuadFALC Module Structure. QuadFALC Module Functions Message Entry
Tool Description
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EASY256-E1T1
Tool Description
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EASY256-E1T1
List Tables Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table 4-10 Table 4-11 Table 4-12 Table 4-13 Table 4-14 Table 4-15 Table 4-16 Table 4-17 Table 4-18 Table 4-19 Table 4-20 Table 4-21 Table 4-22 Table 4-23 Table 4-24 Table 4-25 Table 4-26 Table Table
Page
Functional Modules WinEASY Corresponding System Parts Directories File Types Jumpers EASY256-E1T1 Memory EASY256-E1T1 Writes EPLD State Control Port assignment MUNICH256, QuadFALC Monitor LEDs Memory Device Access EASY256-E1T1 Entity Coding MUNICH256 HDLC Real-Time Driver Functions Indications from MUNICH256 HDLC M256 Driver Module Entity Coding Commands FALC Module Indications FALC Module Command INIT_ALL_E1 Main Initialization Registers Command INIT_ALL_T1 Main Initialization Registers Command INIT_ALL_J1 Main Initialization Registers Command Loopback Control Test Loop Functions Command RESET_SigCtrl. Command SET_CAS Command Read_CAS Command Transmit_CAS_E1/T1/J1 Command SET_HDLC. Command TXH_N Command Read_FDL_DATA Command Transmit_FDL_DATA Indication CAS_IND Physical Line Activation Indication Indication RCH_N Physical Line Deactivation Indication. Indication RD_CAS_IN Indication AIS_ACT_IND Indication RD_FDL_IN ROUTER Service Functions Entity coding Loadable Sections MUNICH256 Config Space
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EASY256-E1T1
List Tables
Page
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EASY256-E1T1
Tool Description
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EASY256-E1T1
Introduction
Reference Design MUNICH256 QuadFALC (EASY256-E1T1) consists modular hardware software components especially optimized demonstrate excellent performance MUNICH256 device typical network system. hardware consists boards: standard processor mainboard (not part delivered EASY256-E1T1 system) PCI-NIC Card with MUNICH256 QuadFALC devices main purpose processor mainboard provide standard system chip evaluation driver software development. Board used either standard with other host system providing signal environment. second, dedicated Windows-PC used control Subsystem mainboard MUNICH256 NIC. associated software structure used with this hardware architecture consists dedicated Network System Software running communication subsystem corresponding WinEASY Evaluation Software running control Network System Software, including MUNICH256 device driver, available source code. Using standard compiler tools corresponding processor use, possible generate executable code that downloaded onto communications subsystem WinEASY download function. quick start using MUNICH256 device such minimum reference system, sophisticated "Window" user interface built into EASY256-E1T1 WinEASY Evaluation Software. designed especially MUNICH256 QuadFALC registers shared memory data structures. This user interface simplifies direct access MUNICH256 QuadFALC devices mapping registers data structures corresponding window structures section this document (Chapter 3.12 page 3-60) focusses especially quick start. guides user through first steps from unpacking installing tool first successful data transmission with EASY256-E1T1. This data transmission done either using real time device drivers setting each single register part shared memory structures (descriptors) manually with WinEASY chip level application.
Tool Description
09.00
Evaluation System MUNICH256/F/FM EASY256-E1T1
Version
1.1.1
Overview Applications
Register Access Tool allows intuitive learning doing: demonstrating MUNICH256 behaves `real system'. Implementation individual system applications streamlined. Development test individual MUNICH256 device driver software facilitated using Real EASY256-E1T1 Time Device Driver. Processor base board (not part EASY256-E1T1) corresponding extender boards MUNICH256 (EASY256-E1T1-NIC) form modular communication subsystem. Flexible attachment other hardware various connectors measurement application purposes.
1.1.2
Features
Standard contains MUNICH256 QuadFALC chips. Designed standard systems with signal environment. MUNICH256 provides HDLC/TMA/PPP channels. QuadFALCs provide T1/E1 ports Status LEDs controlled software used line status monitoring.
Tool Description
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EASY256-E1T1
1.1.3
Hardware
Network System Software
Pentium
Main Board with chipset slots Octal E1/T1 Interface Card
Quad FALC
PCI-Slots
WinEASY
Infineon
crossed RS-232 connection
Technologies MUNICH256
Local
PCIChipset Bridge
Quad FALC
PCI-Bus
Evaluation Software
e256comp.wmf
Figure
Hardware Components Complete Test System
EASY256-E1T1 Reference Design hardware consists Network Interface Card (NIC) with MUNICH256 QuadFALCs. commercial mainboard with modern chipset (3.3 signalling environment necessary) used processor mainboard (PCI base board). must connected crossed serial cable standard minimum, processor mainboard needs power supply, graphics adapter (VGA), floppy hard disk drive boot initial software (PC-DDS) provide download capability. Optionally, other base board with used (based PPC-405GP, example).
1.1.4
Software
WinEASYPC Evaluation Software MUNICH256 included EASY256-E1T1 package. provides integrated solution Windows® 9x/NT® for: Direct static device access (chip level) MUNICH256 shared memory data structures, configuration space, on-chip registers. Chip Level Access QuadFALC registers Downloading software onto Processor Base Board. Controlling software Processor Base Board. Verification debugging real-time software MUNICH256 QuadFALC. main features this powerful integrated Evaluation Development Software System are: Device Driver Software: This software consists Device Driver System, including start-up code run-time library mainboard processor system. Over Device Driver Software written available source code. Device Driver Modules written Infineon Communication ICs. Device Driver Module written entirely
Tool Description 09.00
EASY256-E1T1
Functions such Download, Single Step Debugging, Tracking, well manual register access capability, access shared memory data structures, configuration space, On-Chip registers. main purpose simplify control verification Device Driver Software developed This software downloaded directly onto processor board real-time applications. Register Access Explorer provides user-friendly approach Infineon Technologies MUNICH256 Communication and, therefore, facilitates faster understanding chip's architecture basic operation modes.
Tool Description
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EASY256-E1T1
Overall System Architecture
EASY256-E1T1 system architecture consists dedicated Network System Software running communication subsystem corresponding WinEASY Evaluation Software with specific user interface MUNICH256 device.
Evaluation Software Network System Software
Application Program Modules WinEASY Chip Level Access Driver Download C/I-Message Exchange Messages Message RS232 Interface User Interface (e.g.: DDMD, ROUTER
Device Driver System
Compiler Cross Compiler Development Tools Network System Software
Device Driver Modules MUNICH256, QuadFALCs, Peripherals (LEDs)
sw_struc.wmf
Figure
Software Structure
WinEASY Evaluation Software builds general user interface handles overall system control management functions exchanging Command/Indication (C/I) Messages with Network System Software. Network System Software performs most communication processing functions, especially MUNICH256 device driver functions. Network System Software available source code. Using standard (cross) development package 32-Bit (such those available from Borland, Inc. Intel 80x86 family CPUs), possible generate executable code that downloaded onto communication subsystem using WinEASY download function. features EASY256-E1T1 software are: Device Driver System integration MUNICH256 device driver software appropriate debug software, loadable from running communications subsystem. MUNICH256 Device Driver Module, containing driver source code standard multichannel HDLC application. QuadFALC Device Driver Module contains driver source code standard line interface framer functionality control monitor LEDs. Framer Device Driver Modules, containing driver source code standard framer functionality provided MUNICH256F/M (These module functionally used EASY256-E1T1, included CD-ROM).
Tool Description
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EASY256-E1T1
Device Driver Module, containing driver source code control multiplexer DS2/DS3 framer parts provided MUNICH256FM (not used EASY256-E1T1). Application Program Module DDMD, containing evaluation, test, debug routines Infineon MUNICH256 networking chip, independent main device drivers. WinEASYPC Evaluation Software Microsoft® Windows® application program supports: Download driver software from onto communications subsystem appropriate debugging. Control MUNICH256 operations transparent access MUNICH256 shared memory data structures, configuration space, on-chip registers corresponding Microsoft Windows objects related control elements. Software standard PCI-mainboard, such built with Intel Pentium-x CPU, been developed with Software Development Tools from Borland, Inc. (not part Reference Design EASY256-E1T1).
1.2.1
Network System Software
Network System Software downloaded onto communications subsystem consists MUNICH256 Device Driver Modules (DDMs) concurrent Device Driver Module Debug single step purposes (DDMD), both integrated into Device Driver System (DDS). Device Driver System (DDS) message-based real-time micro kernel which builds simple base integration independent Device Driver Modules (DDM) Application Program Modules (APM). information flow between different modules implemented exchanging Command/Indication messages with unique data format: message descriptor with associated data buffer.
1.2.2
Communications Software
communications software consists multiple main functional units. Device Driver System (DDS) builds integration base device driver software general represents message-based micro kernel. main information control flow between software modules inserted into environment based actions messages. MUNICH256, appropriate Device Driver Modules (DDM) provided, including `M256'. contains specific driver routines standard initialization data transfer HDLC/PPP channels. QuadFALCdevice driver provides standard functions initialization links common error handling signalling functionality. Complete communication software provided source code (some essential routines system provided assembler) includes ready-to-use
Tool Description 09.00
EASY256-E1T1
executable file direct downloading into memory. quick start-up, user does need setup development compiler environment. WinEASY Evaluation Software MUNICH256 provides integrated solution direct static1) device access (Chip Register Level), software Download onto Evaluation Board, verification debugging real-time software general Single Step Utility. ability store Commands Indications track files (*.trk) valuable feature debugging logging purposes. With Application Manager, possible save organize different downloaded *.hex files This makes handling board software more flexible saves considerable downloading time.
1.2.3
Table Module
User Front-End Software WinEASY
Functional Modules WinEASY Corresponding System Parts Corresponding Part Processor Board DDMD Device Driver Module Debug Boot Code (PC-DDS: from disk, Generic Processor Board: (F)EPROM) Real-time Device Driver Module DDM: M256, FRAMER, FDL, M13, QuadFALC Boot Code from (Generic Processor boards2) only)
WinEASY Evaluation Software consists four main functional modules:
Register Access Editor (Chip Level) Download Device Driver) Single Step Test Application Manager
1.2.3.1
Register Access Editor
Register Access Editor integrated into WinEASY MUNICH256 QuadFALC offers quick simplified access device registers communication ICs. register access controlled user-friendly explorer. individual device registers detailed register descriptions level indicated. contextsensitive help utility delivers detailed register descriptions text form currently selected register.
1.2.3.2
Download Utility
Download Utility integrated into WinEASY allows direct download either original Device Driver Software from Infineon Technologies user-written programs
"Static" means: chip level mode. there dynamic software interaction such interrupt handling. user manipulate MUNICH256's registers structures step step without time pressure. Application Manager Feature available with standard PC-PCI mainboards only with special processor boards from Infineon technologies that have been designed this purpose.
Tool Description
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EASY256-E1T1
with appropriate start-up code Evaluation Board. This start-up code part EASY256-E1T1 well. default download file e256etpc.hex PC-based processor platform, located directory CD-ROM alternate download file e256etpi.hex includes simple IP-Router Application Module, which inactive default). communications rate V.24 Interface varied from 1200 Baud kBaud. Auto baudrate function selects fastest baudrate available
1.2.3.3
Single Step Test
Verification downloaded Device Driver Software supported means Single Step Test Utility integrated into WinEASY. allows sending receiving predefined Messages Message Interface from Evaluation Board. Messages represent higher level macros defined Commands Indications files with filetype.CIM. These messages -called "Actions" have direct influence status device. Command messages sent directly Device Driver Modules (M256, QuadFALC etc.) transmit HDLC frame initiate T1/E1 link, application module, instance. same way, Indication messages from such Message Device Driver Module hand over HDLC frames received T1/E1 Interface. messages stored special window called Window used create track (*.trk) file. supports automatic verification complex communications protocol functions, based unique input/output sequences directed Message Interface object. guarantee consistency with Single Step Test sessions, identical definitions corresponding Messages (*.CIM) used well same Message Interface. Thus, possible output Single Step Test session and/or different register access within Chip Level direct input *.trk file. track file defined macro containing various actions messages.
1.2.3.4
Application Manager
Application Manager enables handling different *.hex download files. coordinates organization processor board's Using Application Manager, applications stored FLASH memory. previously stored application started, download necessary because application will transferred from FLASH memory into RAM. Thus, number downloads processor board minimized download time reduced.
Tool Description
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EASY256-E1T1
Installation
This section explains organization several files provided CD-ROM explains installation EASY256-E1T1 software hard disk standard Figure illustrates file structure EASY256-E1T1 software package:
1.3.1
Directory
Directory designed contain application modules (APMs), such frame relay driver protocol module. example EASY256-E1T1 package, simple IP-Router module contained demonstrated integration into Device Driver System (DDS). msg.h provides central definitions message generation module identification.
1.3.2
Directories
Directories contain necessary files starting compilation process building downloadable executable code with which software: Table set*.bat e256et*.bat *.mak *.hex *.trk BC45\ Directories File Types Function Basic environment compiler settings Building download files EASY256-E1T1 reference design Makefiles Download files Example track files sending messages device drivers application modules Object Files Borland Compiler PC-DDS Object Files Cross Compiler EASY only Directories/File Types
TRK-files loaded FILE menu WinEASY application. They contain actions messages, such examples from logs previous evaluation sessions.
1.3.3
Directories
EASY256-E1T1 software package contains Infineon Technologies Device Driver System, representing optimized message-based operation system. files that necessary build bare Device Driver Software found this directory. Subdirectories xxINC xxLIB contain hardware-related include files libraries. code structure designed support different types hardware common source code base, e.g.: Standard PCI-mainboards (PC-DDS, xx=PDDS)
Tool Description 09.00
EASY256-E1T1
IBM-PPC-Board xx=PP), i960 based board (EASY PCI-960, xx=CA) default, based environment contained this evaluation tool package.
1.3.4
Directories
EASY256-E1T1 software package contains Device Driver Modules (DDMs) Infineon Technologies MUNICH256 QuadFALC Communication ICs. also contains related files, such Memory Management Device Driver Modules (DDMM). files necessary build Device Driver Software together with found these directories. source code MUNICH256 core Device Driver Module included M256.C M256.H M256DEF.H. files named *MSG.C/H (such M256MSG.C/H) used implement message interface between functional device driver code core modules, using function calls only. files DDMM.* contain Device Driver Module-specific memory management routines provide MUNICH256 descriptor buffers.
1.3.5
TOOLS Directory
executable PELOCD.EXE converts compiled linked software file format. This file format will downloaded Evaluation Board.
1.3.6
WinEASY Directory
This directory contains main files WinEASY software. Command Indication messages stored *.CIM file that automatically loaded when Single Step Window opened. Appropriate CIM-files (M256.CIM) provide predefined Command Indication Messages with EASY256-E1T1. They located corresponding E256xxx subdirectory-E256 case this EASY256E1T1 kit. same subdirectory, there file called EASYTOOL.DAT that works parameter file WinEASY primarily describing appearance chip level.
1.3.7
Installation Procedure
CD-ROM contains documentation MUNICH256, EASY256-E1T1 Board, PC-DDS, well overall source code system executable files WinEASY. start running system, WINEASY.EXE Windows 9x/NT must called from WINEASY\e256\ subdirectory. user copy files host hard disk desired. Creating link file specify call WinEASY from E256 subdirectory recommended. modify recompile source code, neccessary copy directory tree tzhe local harddisk make file writeable.
Tool Description
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EASY256-E1T1
Download menu item Interface menu download file M256pc.hex (usually located directory). Note: using PC-DDS standard mainboard, PC-DDS loader first must booted from disk before download procedure gets started from menu item. After each download memory, download software started. Now, user either access MUNICH256 shared memory CHIP-LEVEL send special commands using SINGLE STEP Window. Actions Commands sent Indications received reported window. *.trk files APPdirectory provide another basic message transfer. more details, refer appropriate chapters this documentation Windows® On-line Help. exiting program, WinEASY.ini file stored Windows directory save current window settings.
Tool Description
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EASY256-E1T1
files.txt
Contents directories files
Application Modules (APMs) placed here such Frame Relay-based examples, IP-router
Application-related files Download files (*.hex) Makefiles (*.mak) Batch files (*.bat) initial compiler settings starting compiler Example Track files WinEASY BC45 Object Files Borland Compiler PCDDS EASY256-E1T1
Device Driver Module source code files Memory Management DDMM M256 M256 Device Driver Modules source codes
QuadFALC QuadFGALC Device Driver Modules source codes
Device Driver System source code files
PDDSINC PDDSLIB TOOLS
Include files Libraries PC-DDS mainboard)
Portable execution locator generation HEX-file
WinEASY WinEASY Application with several system specific subdirectories different application boards (EASY256-E1T1) Reference Boards
Figure
File Structure EASY256-E1T1 Software
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EASY256-E1T1
Tool Description
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EASY256-E1T1
PRELIMINARY
Hardware Description EASY256-E1T1 Board
Functional Overview
second RJ-45 board
Quad FALC
16,384
Quad FALC EPLD/ Logic
LEDArray
M256/F/
EEPR
2.5V
3,3V 33/66Mhz
3.3V
Figure EASY256-E1T1 Hardware Layout
Optional
m256nic.wmf
EASY256-E1T1 Network Interface Card (NIC) designed demonstrate MUNICH256 device fully channelized octal T1/E1 linecard with standard 33/66 interface. Note: Because MUNICH256 tolerant pin, there several restrictions: EASY256-E1T1 card must driven pure signal environment only. Most mainboards have bridges, driving signals only. Additionally, user needs ensure that other card, same system, drives level signals. shipped, EASY256-E1T1 card only 3.3V key, mechanically impossible mount card into slot where signals potentially exist. However, been designed
Tool Description
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EASY256-E1T1
PRELIMINARY power signal layers this region) that user remove material mount card slot. additional hardware connected board connectors test pins must provide voltages signal levels board that exceed (3.3 +10%). pull-up resistors must pull signal MUNICH256 voltages higher than operation EASY256-E1T1 card above these limits result permanent damage hardware MUNICH256. limits given MUNICH256 data sheet apply this hardware. board mainly contains MUNICH256 chip QuadFALC units provide eight framer line interfaces additional EPLD provides access array indicator LEDs. Because standard slot small accommodate eight RJ-45 connectors, four ports provided EASY256-E1T1 board four ports reside dedicated add-on board. This add-in board mounted optionally uses another slot bracket test access points provides physical access highway Port between MUNICH256 QuadFALCs debugging measurement purposes. voltage regulator unit provides power supply MUNICH256 core. power supply board directly connected slot's supply. There regulator board deriving this voltage from
Tool Description
02.00
EASY256-E1T1
PRELIMINARY
Operating Modes
MUNICH256 always configured 16-port mode, frame synchronization specified dedicated frame sync signals. design uses independent highways each port that totally asynchronously each other. There basic operational modes, that supported different modes highway between MUNICH256 QuadFALC devices: line speed (2.048 MBit/s) always uses unique setup MUNICH256 QuadFALC with 2.048 clock rate highway. line speed (1.544 MBit/s) unique setup similar above. Both MUNICH256 QuadFALC mode. Optionally, line speed supported driving MUNICH256 port mode using available channel translation modes QuadFALC adapt this 1.544 MBit/s mode. Software EASY256-E1T1 uses QuadFALC channel translation mode. this way, only QuadFALC configuration needs changed setup MUNICH256 always keep 2.048 MBit/s interface mode.
Tool Description
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EASY256-E1T1
PRELIMINARY
Functional Description
peripherals board accessed software. overview available hardware features seen Figure Table
Figure
Layout EASY256-E1T1 Board
Tool Description
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EASY256-E1T1
PRELIMINARY Table Jumper Con1 Jumpers EASY256-E1T1 Function Test access QuadFALC, Ports 0.3, from bottom: Receive Data Clock Transmit Data QuadFALC Receive Port Frame Synchronization Pulse Test access QuadFALC, Ports 4.7, from bottom: Receive Data Clock Transmit Data QuadFALC Receive Port Frame Synchronization Pulse JTAG Port. Lower row: side Upper Row: Card side, JTAG test chain with MUNICH256 QuadFALCs Local control signals, from left right: LCS2, LCLK, LCS1 Local Control Signals, from left right: LWR, LRD, LA0, LA1, LA2, LBHE MUNICH256 Test port access, from left right: Test Receive Data (TRD, Output), Test Transmit Clock (TTCLK; Output) MUNICH256 Test port access, from bottom: Test Receive Clock (TRCLK, Output) Test Transmit Data (TTD, Input) Test Transmit Sync Pulse (TTSP, Output) Test Receive Sync Pulse (TRSP, Output) SPLOAD: set, pulls SPLOAD MUNICH256 high signal. This precondition device auto-load Configuration Space from serial EEPROM after reset. default. Memory EASY256-E1T1 Function MUNICH256 registers QuadFALC Register Base address QuadFALC Register Base address control field address (write only)
Con2
Con3 Con4 Con5a Con5b
Table BAR1 BAR2+ 0000h BAR2+ 2000h
Base address
BAR2+ 40000h
Tool Description
02.00
EASY256-E1T1
PRELIMINARY Table Write Access Typical Software Writes EPLD State Control Bits written data (for Port) Bit0 RED(0) RED(1) RED(2) RED(3) RED(4) RED(5) RED(6) RED(7) Alarm Bit1 GREEN(0) GREEN(1) GREEN(2) GREEN(3) GREEN(4) GREEN(5) GREEN(6) GREEN(7) Synchronous Bit2 YELLOW(0) YELLOW(1) YELLOW(2) YELLOW(3) YELLOW(4) YELLOW(5) YELLOW(6) YELLOW(7) Yellow Alarm Bit3 GREEN GREEN GREEN GREEN GREEN GREEN GREEN GREEN FALC Local Loop
array updated after every write access. change LED's state should always take place with octal write access EPLD register. EASY256-E1T1 software uses LEDs monitor most important QuadFALC line states. However, user specific software freely assign LEDs according system's needs.
Tool Description
02.00
EASY256-E1T1
PRELIMINARY
Port assignment between MUNICH256 QuadFALC
layout considerations ports MUNICH256 QuadFALC assigned linear each other. port assignemnt EASY256-E1T1 board taken from following table: Table Port Port assignment MUNICH256, QuadFALC Monitor LEDs RJ45 Position onboard lowest onboard highest extender lowest extender highest QuadFALC number/port Module Entity MUNICH256 port Module Entity (hex) 0x100 0x200 0x000 0x300 0x500 0x600 0x400 0x700
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PRELIMINARY
Memory Registers EASY256-E1T1
Typically card, absolute addresses determined during system's boot phasis assigned base addresses written devices BARx registers configuration register set. Based these Base Addresses following Addresses apply different board functionalities: Table BAR1 BAR2 0000h 2000h 4000h Memory Device Access EASY256-E1T1 Accessed function MUNICH256 Core Accessed Devices MUNICH256 internal Registers
Base Addresses
MUNICH256 Local Bus, Accesses bridged Local here: asserting LCSx here: LCS1 active LCS2 active LCS1 LCS2 active QuadFALC providing T1/E1-Port QuadFALC providing T1/E1-Port Write access EPLD providing shift registers shown Table page 2-32.
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PRELIMINARY
EPLD Logic
following logic code EPLD written ABEL:
module e256r1 title `e256r1' "diverse signal generation Easy256-R1 V1.0' "FILE: "revision 02/04/2000 (RS) "revision 1.01 08/08/2000 (RS) L_INT output changed form pin44
"inputs !CS1PIN !CS2PIN !QF1INT !QF2INT !RST
"outputs !QF1CSPIN istype `reg'; !QF2CSPIN istype `reg'; !L_INT istype `reg'; LED_CLK istype `reg'; LATCHEN istype `reg'; LED_OE istype `reg'; !QF1_RST istype `com'; !QF2_RST istype `com'; !M_RST istype `com'; LED_CNT0 node istype `reg'; LED_CNT1 node istype `reg'; LED_CNT2 node istype `reg'; RST_REG node istype `reg'; WAIT node istype `reg'; START node istype `reg'; START1 node istype `reg';
"enables HC4094 Latch
LED_CNT= [LED_CNT2, LED_CNT1, LED_CNT0]; FSM_LED [LATCHEN, WAIT]; FSM_LED_IDLE FSM_LED_WAIT Tool Description
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PRELIMINARY
FSM_LED_LATCHEN FSM_LED_DC equations QF1CS.CLK CLK; QF2CS.CLK CLK; L_INT.CLK CLK; LED_CNT.clk CLK; LED_CLK.clk CLK; START.clk CLK; START1.clk CLK; QF1CS !CS2 !A10; QF2CS !CS1 !A10; QF1_RST (CS1 !CS2 A10); QF2_RST (CS2 !CS1 A10); M_RST RST; L_INT QF1INT QF2INT; START CS2; START1 START; LED_CLK START1; RST_REG.clk CLK; RST_REG !RST; LED_OE.clk CLK; LED_OE.oe !RST; LED_OE (!LATCHEN RST_REG) (LED_OE RST_REG); FSM_LED.clk CLK; declarations
state_diagram FSM_LED; state FSM_LED_IDLE: ((LED_CNT LED_CLK)then FSM_LED_LATCHEN with LED_CNT else LED_CLK then FSM_LED_WAIT with LED_CNT LED_CNT+1 else FSM_LED_IDLE with LED_CNT LED_CNT; state FSM_LED_WAIT: LED_CNT else Tool Description LED_CLK then FSM_LED_WAIT with LED_CNT FSM_LED_IDLE with LED_CNT LED_CNT; 02.00
EASY256-E1T1
PRELIMINARY
state FSM_LED_LATCHEN: LED_CLK then FSM_LED_WAIT with LED_CNT else FSM_LED_IDLE with LED_CNT state FSM_LED_DC: goto FSM_LED_IDLE with LED_CNT e256r1
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PRELIMINARY
Schematics EASY256-E1T1
following pages contain schematics layout EASY256-E1T1 board.
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PRELIMINARY
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WinEASY EASY256-E1T1
Introduction
WinEASYPC Evaluation Software MUNICH256 HDLC protocol controller QuadFALC Framer Line Interface Unit from Infineon Technologies contains Microsoft® Windows® application program Device Driver Software code). used become familiar with comprehensive features provided Infineon Technologies MUNICH256 QuadFALC Communication ICs. WinEASY supports following main tasks: Direct Chip Level Access Device Registers shared memory structures. Development Device Driver Software MUNICH256, QuadFALC other Infineon Technologies using standard Development Tools. Download this Device Driver Software onto Evaluation Board. Download communications software onto communications subsystem (processor mainboard/PC)). Single Step Testing downloaded Device Driver Software. Application Manager handle several downloaded files. features listed above integrated into WinEASY.EXE Windows 95/NT except standard software development tools (such available from Borland Microsoft). conjunction with several supporting files, including configuration help information, WinEASY general interface communication functions implemented communication subsystem, base board, corresponding EASY256-E1T1 Application Board.
Configuration Setup
After completion installation procedure, WinEASY 32-Bit Windows NT/Windows platform:
Tool Description
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EASY256-E1T1
intro_s.tif
Figure
WinEASY MUNICH256 Initial Screen View
Specific interface configuration parameters, such different baudrates designation COM1 COM2 serial interface, edited INTERFACE menu. default baudrate setting Auto; default serial interface COM2. Auto selects fastest baudrate available being used. screen shot Figure shows Serial Interface Parameters dialog box:
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EASY256-E1T1
interfac.tif
Figure
WinEASY Interface Parameter Dialog
selected parameters windows settings will saved "easy.ini" file local Windows directory.
Evaluation Development Tools
first step getting system running downloading executable program with extension "HEX" into board's memory. After choosing DOWNLOAD from INTERFACE menu, file selection dialog leads "HEX" file directory. Note: Please note that there specific download files different hardware platforms: m256*.hex EASY256 Evaluation System e256et*.hex EASY256-E1T1 Reference Design e256etpc.hex EASY256-E1T1 running under PC-DDS standard mainboard e256etpp.hex EASY256-E1T1 running bases mainboard e256etpi.hex e256etpc.hex mentioned above including simple IPRouter application module running under PC-DDS last file loaded selected default. Evaluation Development Tools ready start from WinEASY menus. Window shown Figure enabled Window menu.
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EASY256-E1T1
download.tif
Figure
Download Software Board
boot loader must started before initiating download procedure. Therefore, boot disk must used PCI-PC.
start PCDDS:
Create boot disk inserting clean disk running batch file software/bootdisk/mkboot.bat. Note: NOTE: boot sector this disk will written with special boot-program. this program unknown virus scan tools, these tools detect boot-sector virus. detected virus depends search algorithm these virus scan tools. Insert EASY256-E1T1-NIC into connect that with another "Application where WinEASY running (cross connected serial cable). Note: NOTE: running PCDDS uses COM2 download HEX-file! Boot with created boot disk.
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EASY256-E1T1
Start WinEASY download file M256PC.HEX PCDDS. Control with C/I-Messages described throughout this document).
Application Manager
Note: Application Manager available when using standard mainboard host system. Application Manager selected from WINDOW menu. Each command Application Manager will send initial reset command board. Application Manager enables storage download files processor board's Flash memory. After initial download application, clicking START APPLICATION button initiating hardware reset will automatically load program from Flash into memory. This eliminates need repeated downloads.
appman.tif
Figure
WinEASY Application Manager
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EASY256-E1T1
application FLASH memory, click APPLICATION button. selected "HEX" file downloaded stored. stored files listed with LIST STORED APPLICATIONS command. Using START APPLICATION button, selected file copied will board been downloaded normal DOWNLOAD procedure. stored "HEX" files selected default application program clicking button MARK/UNMARK DEFAULT APPLICATION. marked file gets "*"added. After each board reset, this program will loaded automatically into RAM. stored program been deleted, FLASH memory must reorganized with help REORGANIZE APPLICATION MEMORY. This will free memory space file.
Basic Functional Model
transfer C/I-messages element architecture EASY256-E1T1 Evaluation Software. individual functional modules located (C/I Message Application Program Interface) which builds hardware-independent interface communication subsystem. general structure shown Figure
WinEASY: Evaluation Software EASY256 Track-File/LogFile
Transmit receive C/IMessages to/from communication subsystem (e.g. real time driver)
Chip Level
Access registers shared memory structures MUNICH256/F/FM
Interface
Download executable communications software onto communication subsystem
Application Manager
Applications/Download files on-board Flash EPROM
C/I-Messages
C/I-Message
RS-232/V.24
Host Interface
C/I-Messages
Communications Subsystem
WinEASY.wmf
Figure
Functional Model EASY256-E1T1 Evaluation Software
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EASY256-E1T1
Functional Overview WinEASY Application
menu offers access functions handling windows, standard actions, installation. FILE: Functions file handling track files provided. EDIT: Single messages transferred from track file another with basic clipboard commands some additional functions. INTERFACE: Special interface configuration parameters set, such baudrate designation COM1 COM2 serial interface. Baudrate default AUTO, which selects fastest baudrate available use; serial interface default COM2. CHIP LEVEL: Select ENTER switch chip level mode. Direct actions MUNICH256's QuadFALC's registers shared memory allowed only Chip Level mode. interrupts will handled MUNICH256 real-time software module (Interrupts will masked upon entering chip level). switch back real-time mode, choose LEAVE. VIEW: toolbar status line displayed. WINDOW: usual Windows entries found here, well additional entries open WINDOW, SINGLE STEP WINDOW, WINDOW MANAGER handle Chip Level windows. Furthermore, DEBUG TERMINAL started separate application. APPLICATION MANAGER allows storage, start auto-start device drivers from FLASH EPROM processor board. Activating WINDOW recommended. HELP: Online Help Toolbar toolbar provides shortcut access most important functions: Creates Track File Opens Track File Saves Track File Clipboard Copy Clipboard Paste from Clipboard Download HEX-File board Enter Chip Level Leave Chip Level Enter Demo Mode Enter Chip Mode (Leave Demo Mode) Open Single Step Window
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EASY256-E1T1
Open Window Open Debug Terminal Window Help specific "help-on"
User Interface MUNICH256 QuadFALC Chip Level
First, Device Driver System must downloaded using DOWNLOAD menu item from INTERFACE menu. "HEX" file specified download file selection dialog box. appropriate HEX-file found APP-directory (refer also page 50). Control objects directly MUNICH256 QuadFALC registers shared memory data structures after entering Chip Level.
chiplev.tif
Figure
Basic EASY256-E1T1 Chip Level Interface
window divided into hierarchical structure (left side) contents selected item (right side). There ways display certain register structure: Using buttons right side opens window that contains either some
Tool Description 09.00
EASY256-E1T1
buttons bottom level, 32-bit register structure. Clicking entry with leading left side will open sub-hierarchy corresponding buttons right sub-window shown above. following descriptions refer second method. entry without leading "+"or will show 32-bit register structure right side where single bits entire bits modified using standard Windows control elements. more details need accessed, mouse click Reduced Control Object (MUNICH256 Slave Register Set-> Port timeslot control registers-> PMR, example, Port Mode Register) will display requested information left window illustrated Figure Such "detailed views" offer various possibilities manipulation bits. setting bits bit-sets performed using familiar Windows control elements, such radio buttons text fields. Click corresponding position diagram (top window) toggle corresponding bit. Value text field used directly enter full 32-bit values. Values entered either decimal format. specify value, just leading ,,0x". Clicking Write button makes changes permanent. Write applies changes corresponding device register MUNICH256 Shared Memory. Register specific help optained with F1-key. this corresponding page MUNICH256 data sheet will show Whenever MUNICH256 written information into corresponding interrupt queue, this indicated global status register (GISTA). This displayed reading corresponding register Interrupt Control (PCI side) register set. must considered that bits this register must reset writing bits register (interrupt acknowledge). example, represents Port Status Queue indicates that information been written into this interrupt queue (#2). user read this information clicking entry (for Interrupt Queue which used port interrupt queue this software version), shown Figure double click interrupt entry will open window with detailed Interrupt Information field. Release button will delete selected interrupt entry, Reset clears entire interrupt queue.
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EASY256-E1T1
Read Interrupt Queue
Interrupt
Information Details
Read Status Register
inter_q.tif
Figure
Indication MUNICH256 Interrupts
user select more descriptors, including data buffer, from global pool transmit receive descriptors with associated data buffer given size1) link them from left right transmit receive chain using simple Drag-and-Drop-functionality. same way, descriptors returned common buffer pool. possible create endless loops. this, click pointer left side descriptor close such loop from chain. open loop, click right-most chain. first descriptor always automatically assigned FRDA/FTDA entry channel specification. other connections WinEASY software performing "hidden write accesses" pointer entries descriptors. data next pointers fixed addresses generally cannot manipulated user. They will assigned during creation descriptors (Drag Drop). left sub-window provides access descriptors. typical example shown Figure descriptor also "double clicked" open window.
data buffer size depends settings driver source code: actually 1600 bytes each PCDDS, 1100 bytes only EASY less memory space board. details, refer corresponding file DDSG.H DDS/include directories, definition "DATA_BUFFER_SIZE".
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EASY256-E1T1
Insert channel number press "Display" Window opens Modification linked descriptor lists
drag drop
Click here close descriptor loop
Click open loop
DESCLIST:TIF
Figure
Modification MUNICH256 Link Lists
Single Step Tools Communication Subsystem Software
Primarily, test tools consist Single Step Test utility Window menu) Track File File menu). Track File builds communication link downloaded software communication subsystem based exchange C/IMessages. Single Step Tool offers commands such INIT_CHANNEL SEND_FRAME MUNICH256 real-time driver module. Track File utility used insert File contents editing, saving, play-back purposes. class messages included chosen during insertion procedure: Messages Commands Indications. Mostly this useful messages from real time module(s), such MUNICH256 module. Actions entries Windows starting with they reflect actions specified MUNICH256 Chip Level window. major advantage independence from absolute addresses (for example, descriptors later play
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EASY256-E1T1
back Track File after modifications. This selection suitable chip level actions. Comments: Automatically inserted comments such download information manually placed comments.
3.10
Individual Subsystem Software
When communications software prepared (compiled linked) execution downloaded directly into communication sub-system with menu item Interface Download. After code been started communication link between communication software been established EASY256, transfer Command/Indication messages using corresponding actions EASY256 application take place.
3.11
Cross Software Development Tools
Cross Compiler Software Development Tools different processor platforms known this document supplied Infineon Technologies. communications software provided Infineon Technologies, especially MUNICH256 running mainboard, been developed standard with Software Development Tools from Borland Inc. (Borland C/C++ 4.5).
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EASY256-E1T1
3.12
Quick Start
first-time user EASY256-E1T1 Software surprised variety windows, buttons, other control elements. following example will assist becoming familiar with handling tool. registers shared memory structure MUNICH256, receive transmit descriptor lists, interrupt queues will introduced. important elements software covered. Quick Start shows EASY256-E1T1 development software user's applications. exercise consists initialization, transmission, reception data external closed loop (Tx-Pin shortened Rc-Pin) MUNICH256; done "bit manipulations" Chip Level mode. this example, transmit receive data pins Port must shortened jumper JP1.A1/B1 (top jumper array, most left pair pins).
3.12.1
Installing PC-DDS Mainboard
Before standard PCI-PC environment used development evaluation platform, must switched protected mode. This happens starting PC-DDS boot loader from special boot disk. This boot disk must created once: Create boot disk inserting blank disk running batch file \software\bootdisk\mkboot.bat. Note: boot sector this disk will written with special boot-program. Because this program unknown virus scan tools, these tools falsely detect boot-sector virus. detected virus depends search algorithm these virus scan tools. Insert EASY256-E1T1-NIC into connect that with another application (via null modem cable) where WinEASY running under Windows9x/NT environment. mentioned above, Port must looped jumper. Note: MUNICH256 does have tolerant pins. absolutely recommended mainboards with pure signal environment. Most modern chipsets signal environment. other Peripherals must meet same recommendation: other card must generate level signals. Violating this rule cause permanent hardware damage MUNICH256 device EASY256-E1T1 board. Note: null modem cable connect COM2 port running PCDDS another dedicated running Windows9x/NT download HEX-File! Boot with created boot disk. Start WinEASY download M256PC.HEX file PCDDS.
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EASY256-E1T1
Control with C/I-Messages. following chapters will guide doing this example. There independant procedures described: simple fast data transmission using real time device driver functions MUNICH256 Chapter 3.12.2, whereas Chapter 3.12.3 describes more detailed complex programming MUNICH256 manually Chip Level feature WinEASY.
3.12.2
Data Transmission real time device driver
After starting EASY256-E1T1 Software described above, open Window (see Figure 14). messages transmitted between WinEASY-PC PCI-PC actions taken during session logged Window.
q_initvi.tif
Figure
Initial Screen View
First, Device Driver Software must downloaded. Select item Download from Interface menu corresponding button toolbar. After desired "HEX" file been selected file selector dialog box, software automatically starts Download procedure. Using PC-PCI mainboard, this must have booted PC-DDS prior from disk. corresponding download file platform called E256ETPC.HEX.
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EASY256-E1T1
There different ways control real time driver module messages: Either Commands selected from Single Step Window sent from Track File. This example demonstrates command usage from Single Step Window. However, identical command sequence containe track file "EASY256_E1T1_QuickStart.trk". doubt user load this trackfile instead. First all, WinEASY Single Step Window must opened. This possible either menue entry Window Single Step Window tool button Next available E1/T1 Ports must initialized Framer Line Interface Device. This example will Ports this following steps done: Select Command "QuadFALC InitDeviceE1" (single click only) Entity zero (=0). Data Byte zero (=00), this configures port clock slave mode. Press Send button Repeat same with Entity (for Port Byte (for clock master).
consequence, FALC ports will initialized mode. Some moments later indication QuadFALC_PH_DEA_IND (for Physical Layer Deactivation Indication) will show Window. corresponding Monitor line activated ports will switch indicating current state. next step ports will connected with E1/T1 cross over cable (which part this EASY256-E1T1 kit) both bottom RJ45 connectors main EASY256E1T1 board. When both ports' lines show green SYNC-LED enlighted, right ports connected each other. Window will finally show Indications "QuadFALC_PH_ACT_IND" both ports. However, connecting procedure cable, port status could change state some times necessarily. Now, physical layer following steps will concentrate configuration MUNICH256 device. Basically MUNICH256 ports need setup HDLC channels initialized before real data sent. Especially selecting right port oder numbers that match initialized QuadFALC ports Table "Port assignment MUNICH256, QuadFALC Monitor LEDs" page 2-33 referenced here. ports board QuadFALC correspond MUNICH256 ports Single Step Window, following steps need done here: Select Command message "M256 Config Port Entity 0x100 (can also decimal format 256) press Send button repeat steps above with Entity 0x200 (=512) next port.
result this ports indicate their changing synchronization state corresponding indications Window. Finally Transmit Receive Synchronous state will reached. This synchronization refects frame alignment
Tool Description
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EASY256-E1T1
MUNICH256 internal synchronization clock frame synchronization pulse. other step presetup mentioned above initialization channels. taken into account that different ports connected each other. there basically channels acting different ports that communicate with each other. proper communication transmit timeslot assignment one-side transmitter must absolutely this other-side receive channel. keep things simple this example identical timeslot assignments both channels used transmit receive side. transmit receive part channel initialized together time. However, more complex setup possible also, transmitter receiver parts also initialized independantly from each other. Select Command Message "M256 InitTxRcChannel T1/E1" Enity 0x101. This assigns channel (0x01) port number (0x100). timeslot assignment specified data section message: Bytes "FF", others "00". last Byte (#64 "00". This selects HDLC protocol mode. Finally send this message with Send button Repeat this also with Entity 0x202 (Channel 0x02 port 0x200) result last step, both channels must detect HDLC Idle Flag. This indicated indication "M256 IFC_Ind" each channels Window. corresponding channel numbers given Entity field these indications. Finally data transfer take place. Data sent both directions, from channel which will received channel because cross connect these channels ports vice versa from channel channel this purpose, some messages prepared Single Step called "M256 Send Frame (End)" "M256 Send Frame (Begin)". Basically size data section predefined value. Changing just data will affect length data sections these messages. order change length messages therefor number transmitted bytes, user switch Edit Mode selecting Edit button right Single Step Window. However, changes Edit Mode must always updated with "Update Message" button bottom Window take effect next sent message. maximum size message always bytes. different kind ("M256 Send Frame (Begin)" "(End)") messages used assemble larger frames multiple parts. "End"-Message used send entire frames with message. "Begin"-Message queues beginning middle part frame will sent immideately. transmission will initiated finally terminating frame with "End"-Message. following example will show both ways:
Tool Description
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EASY256-E1T1
First, channel simple HDLC frame will send. this, select Command message "M256 Send Frame (End)" change Entity sure that Edit Mode disabled before that changes accepted with Update button). preset contents data section taken this example modified way. frame finally sent with Send Button. Window will show transmit command itself indications: Transmit Acknowledge from Channel Receive Indication from Channel opposite direction more complex frame transmission will demonstrated: Select Command "M256 Send Frame (Begin)" change Entity sure that Edit Mode disabled before that changes accepted with Update button). Send this command times with Send button. Nothing this command will listed Window, especially, there transmission acknowledgment receiption data. Now, send again "M256 Send Frame (End)" Command above, with Enity this time. This terminates previously queued parts single frame initiates transmission. Window there will come several transmit acknowledgements individual parts frame single receive indication carrying data that been queued part part previously. This example shown simple data transmission control functional parts real time device drivers. next chapter will show similar setup step step manually programming device registers shared memory structures (data buffers descriptors) with active device driver interaction. Imagically, user WinEASY will itself, what driver normally would
3.12.3
Data Transmission using Chip Level Register Access
After starting EASY256-E1T1 Software described above, open Window (see Figure 15). messages transmitted between WinEASY-PC PCI-PC actions taken during session logged Window.
Tool Description
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EASY256-E1T1
q_initvi.tif
Figure
Initial Screen View
First, Device Driver Software must downloaded. Select item Download from Interface menu corresponding button toolbar. After desired "HEX" file been selected file selector dialog box, software automatically starts Download procedure. Using PC-PCI mainboard, this must have booted PC-DDS prior from disk. corresponding download file platform called E256ETPC.HEX. Directly afterwards QuadFALCs should initialized local loops will switched prepare next steps. this open trackfile "QuadFALC_InitAllE1_Loops.trk" from Track directory press button here. following Ports QuadFALC devices will initialized mode local loops will activated. next step, Chip Level entered selecting menu item Enter from Chip Level menu using corresponding button. presentation ChipLevel-Window very similar register structure MUNICH256. individual registers organized functional groups browsed left hand side window. Now, after Chip Level Enter, screen should look like this:
Tool Description
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EASY256-E1T1
q_entcl.tif
Figure
Screen View After Software Download Entering Chip Level
this point, most basic settings already initialization software need done user right now: complete configuration setup. basic mode settings MUNICH256. Initialization assignment interrupt queues. first step, Port needs configured switched ports configured Port Mode Indirect Access Register (PMIAR) which selects port Port Mode Register, which does configuration itself. First, PMIAR register accessed. Port selected feature disabled. overall register value should 0x00000000 before applying changes chip pressing WRITE button. also Figure
Tool Description
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Q_PMIAR.TIF
Figure
Setting PMIAR
Now, port mode configured register (2.048 MHz) mode. Interrupt Masks (RIM+TIM) must disabled. connection QuadFALC, follwing setup needed right interface timing: TXR=0 (Transmit data must latched falling edge clock because QuadFALC samples this rising edge) RXF=1 (Receive data must sampled falling egde clock bcause QuadFALC drives receive data rising edge) RSF=TSF=0 (For transmit receive side common clock framesync pulse used this board. QuadFALC generates negative sync pulse port falling edge, MUNICH256 must latch this signal rising egde clock. TBS=3, RBS=4 meet QuadFALC interface timing. entire setup also Figure
Tool Description
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EASY256-E1T1
pmre1.tif
Figure
Port Mode Register (PMR) Setting
Now, click register. This will open corresponding window. window large enough, resize using familiar Windows operations. transmitter Port will enabled setting changes will apply board pressing write button. same must done enable receiver.
ten.tif
Figure
Enabling Port transmitter Register
Now, some port interrupts must have occurred. check this, first look IGISTA register. Interrupt Queue should active port interrupts have been assigned that queue. This indicates that Interrupt vectors have been written Interrupt Queue general, software first checks GISTA register determine which interruft queue needs handled:
Tool Description 09.00
EASY256-E1T1
GISTA_P.TIF
Figure
Interrupt Queue Monitors Contain Vectors
Q-Bits Global Interrupt Status Register acknowledged writing back value (each acknowledges interrupt resets register). indicates pending Interrupt LBI-side peripherals (e.g. QuadFALC 1second-interrupt) only acknowledged handling QuadFALC interrupt status register first. However, this necessary this example this point. contents interrupt Queue displayed selecting entry left side explorer hierarchy. Details each single interrupt vector viewed double click that entry. Single entries deleted marking pressing RELEASE. RESET clears entire interrupt queue:
Tool Description
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EASY256-E1T1
IQ2.TIF
Figure
Details Interrupt Queue
Now, Timeslot-Assignment must specified. Again, timeslot registers accessible indirect data register. First, right timeslot, port, direction must specified indirect register. example uses Timeslot Port Receive Direction, must reset. second will same transmit direction with DIR=1. finally, value 0x00000001 must written TSAIA register.
TSAIA.TIF
Figure
Timeslot Assignment Indirect Access Register (TSAIA)
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EASY256-E1T1
After this, Timeslot Port assigned logical channels MUNICH256 Timeslot Assigner Data Register (TSAD). This example uses Channel bits timeslot (Fillmask =0xFF) transmit receive direction. Inhibit must disabled. same procedure must repeated transmit direction, using DIR=1 TSAIA.
TSAD.TIF
Figure
Timeslot Assignment TSAD
next step will configuration channel. This comprises setups protocol machines, buffers, units, including definition descriptor chain. general, order access channel specification registers important. But, general, basic rules apply: Channel Specification Command must written last, after other accesses Channel Specification registers. access channel specification registers must interrupted concurrent configurations different channel (e.g. interrupt function). This example uses order given WinEASY Chip Level MUNICH256. register CSPEC_MODE_REC specifies settings receiver's protocol handling. this example uses standard HDLC protocol, value register must zero (0x00000000):
Tool Description
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EASY256-E1T1
mode_rec.tif
Figure
Channel Specification: Receive Mode Register Setting
example, ACCM programming skipped, this only necessary protocol. next register configured CSPEC_MODE_XMIT corresponding transmit protocol specification. Again, this register must zero:
modexmit.tif
Figure
Channel Specification: Transmit Mode Register Setting
following step, select CSPEC_BUFFER register. window similar Figure displayed. Some basic settings must made transmit receiver buffer this channel specify assigned interrupt queues: Basically, ITBS (Individual Transmit Buffer Size) chosen 32=0x20 DWORDs size. Transmit Buffer Forward Threshold Code (TBFTC) which corresponds DWORDs. Transmit Buffer Reload Threshold Code (TBRTC) which corresponds DWORDs. both thresholds must smaller than ITBS. Receive Buffer Threshold Code This specifies that receive data forwarded from internal receive buffer memory section whenever DWORDs have been collected buffer.
Tool Description 09.00
EASY256-E1T1
Transmit Interrupt Queue (TQUEUE) chosen Receive Interrupt Queue (RQUEUE) This corresponds settings used real time driver M256.C. Finally, value 0x60205145 should written.
csbuffer.tif
Figure
Channel Specification: Buffer Interrupt Queue Settings
CSPEC_IMASK register, simply clear bits.The value which finally written chip 0x00000000:
cspec_im.tif
Figure
Channel Specification: Interrupt Mask Settings
Finally, before channel started, transmit receive buffer lists must built First Channel Transmit Buffer List building done step step: Therefore, CTBL must selected Buffer Pool Channel selected setting channel field pressing DISPLAY button. window Transmit Descriptor List will
Tool Description
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EASY256-E1T1
Using "Drag Drop" operation, buffer pulled Buffer Pool. address first buffer will automatically written CSPEC_FTDA register. double click buffer opens next window representing Transmit Descriptor. contains four different entries: Info1, Next, Data Pointer, Info2 (for C-Bit). Click Transmit Info field opens window specify descriptor specific information: Frame (FE) HOLD must set. After stating channel, will immediately start transmitting this descriptor. marks descriptor frame HOLD prevents unit step over assigned Next Descriptor. length frame specified byte =0x20 field. Setting Descriptor optional this example. final value 0xC0010020 must WRITTEN board's memory.
cs_ctbl.tif
Figure
Channel Specification: Building Transmit Buffer List
Tool Description
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EASY256-E1T1
Click Data Pointer open data section attached descriptor. important specify step this necessary information amount data displayed data buffer). still then this window cannot used enter transmit data. Now, text entered which transmitted this example. Radio buttons window allow selection data format:
ctbldata.tif
Figure
Transmit Descriptor Data Buffer
Similarly, building Channel Receive Buffer List done step step: Therefore, CRBL must selected. Buffer Pool Channel selected setting channel field pressing DISPLAY button. window Receive Descriptor List will Using "Drag Drop" operation, three buffers pulled from Buffer Pool. address first buffer will automatically written CSPEC_FRDA register. Click beginning list closes "Descriptor Loop". next pointer last descriptor points back first descriptor. open loop, click list done. click between descriptors would perform partial loop.) double click buffer opens next window representing Receive Descriptor. contains four different entries: Info1, Next, Data Pointer Info2 (for Receive Status information). Click Receive Info field opens window specify descriptor specific information: each descriptor, length available data buffer specified bytes =0x40 field. Setting Descriptor allows interrupts individual descriptor re-assigned later. This example uses increasing Descriptor each descriptor. last Descriptor additionally gets HOLD stop receiver last descriptor prevent potential overruns.
Tool Description
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EASY256-E1T1
cs_crbl.tif
Figure
Channel Specification: Building Receive Buffer List
Finally, channel started giving channel initialization command. Therefore, CSPEC_CMD register, transmit receive initialization command must selected. channel entry gets number Channel possible channels. This channel previously selected timeslot assignment which descriptor lists have been built (the latter only applies software internal management).
Tool Description
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EASY256-E1T1
cspeccmd.tif
Figure
Channel Specification: Initialization Command
After pressing write button, contents Channel Specification registers copied chip internal modules specified context Channel command itself begins initialization data transfer initiated now. example frame only size bytes, this transfer done within milliseconds. Afterwards, some results this transmission explored. First, some interrupts must have occurred. first look should done IGISTA interrupt status register:
igista2.tif
Figure
Global Interrupt Status after data transfer
Some interrupt queues have been updated: indicates that command acknowledge interrupts present. check this CRIQ CTIQ specifying Channel could active indicating that MUNICH256' framer-side interrupt FIFO contains some data. most cases, this could one-secondTool Description 09.00
EASY256-E1T1
timer interrupt, ignore this session. indicate that transmit (Q3) receive (Q4) interrupts have been added corresponding queues. short look these queues helps further information about interrupt: click opens interrupt queue listing. Here, interrupt vectors their addresses shared memory listed. double click entry opens more detailed view interrupt vector. example Figure interrupt vector 0xB3004001. 0xB3000000 indicates transmit channel interrupt. 0x00004000 indicates Frame Indication, frame been sent completely. Finally 0x00000001 contains channel number information Channel
iq3.tif
Figure
Transmit Interrupt Queue after First Data Transfer
same way, receive interrupt information checked. Interrupt vectors should there:
Tool Description
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EASY256-E1T1
0xA4002001 indicates that Idle Flag Change HDLC Idle Flag 0x7E been detected. 0xAC012001 indicates that frame been received Channel last part been stored descriptor containing descriptor 0x01. latter leads checking corresponding descriptor. receive descriptors have been numbered descriptor received frame been stored first three predefined receive descriptors. general, next step would check status this descriptor (info2 field, containing framing, error databyte count information) data buffer itself. Both depicted Figure
rccheck1.tif
Figure
Received Data Corresponding Descriptor
Tool Description
09.00
EASY256-E1T1
first data transmission been done successfully manipulating shared memory chip registers manually without "real" software interaction. Now, extension this first part, second frame transmitted easily already active channel port. most actions very similar those previously shown, explanatory text following figures shorter. second transmit descriptor added transmit descriptor chain. HOLD this descriptor will set. chosen 0x50 frame exceeds NO=0x40 receive descriptors) (see Figure 35). Afterwards, HOLD first transmit Descriptor cleared.
CS_CTBL2.T
Figure
Adding Second Transmit Frame Descriptor Queue
Tool Description
09.00
EASY256-E1T1
transmission will re-activated Transmit Hold Reset Command CSPEC_CMD register (Figure 36).
txhreset.tif
Figure
Transmit Hold Reset Command Transmitter Re-activation
Another view GISTA will show that Interrupt Vectors have been added Queues transmit receive interrupts have occurred. Interrupt Queue which been assigned transmit channel interrupts contains vector 0xB3004001 corresponding "Send Frame Interrupt". Interrupt Queue which processes receive interrupts this example, contains vector 0xAC032001. This indicates that Frame been received Channel last part frame been stored third descriptor (which been marked with descriptor Remembering that last frame been stored first descriptor, second descriptor been used store beginning next frame. available receive data buffer (NO=0x40) second descriptor provide enough room store entire frame (which been defined size 0x50 transmit side before). this frame been split over receive descriptors, second third. depicted Figure second descriptor BNO=0x40 set, been filled completely with data frame been stored this descriptor. next part received frame been continued next descriptor (the third). Here, set, indicating that this descriptor contains Frame End. 0x10 and, therefore, this descriptor contains last bytes received frame. However, third descriptor still contains HOLD set. this must cleared before frame received. Otherwise, next received frame will discarded. Clearing HOLD third receive descriptor then would MUNICH256 continue receiving next descriptor which again first this chain because next pointer third descriptor points "back" first one.
Tool Description
09.00
EASY256-E1T1
rcdescr2.tif
Figure
Second Received Frame descriptors
Note: Addresses individual registers shared memory structures differ from those shown examples, depending sequence actions taken well software hardware used.
Tool Description
09.00
EASY256-E1T1
Messages EASY256-E1T1
Introduction
This part document describes logical interface between Device Driver Software Modules running EASY256-E1T1 Reference Design corresponding Application Program Module(s) side. describes C/IMessages detail which transferred between Application Modules (APMs) Device Driver Modules (DDMs). C/I-Messages routed between different modules means Device Driver System (DDS). general architecture Device Driver Software illustrated Figure
EASY256 Evaluation System
Application Module
Router Module Frame Relay Protocol Module)
Device Driver System (DDS)
User Applications
WinEASY
Device Driver Module (DDM)
Infineon
Technologies
Communication IC(s) (MUNICH256, QuadFALC)
msg_flow.wmf
Figure
General Architecture Device Driver System (DDS)
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Tool Description
EASY256-E1T1
Overall Software Architecture
C/I-Message consists major parts: message descriptor corresponding message data buffer, illustrated Figure
C/I-Message Descriptor Next Pointer Type Dest Entity DSize DPtr
Data
max. 1600 byte
msgdescr.wmf
Figure
Message Data Structure
message descriptor specifies message more general context. consists Destination (Dest) Source (Src) identify logical connection between modules. Entity number specifies actual Entity inside destination module that will receive related message. This feature used, instance, inside MUNICH256 HDLC driver module select channel Entity. Entity contains three encapsulated content descriptors: device-ID, port-ID, channel timeslot: Table Content Entity Coding Device-ID PortID
Channel-ID
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Tool Description
EASY256-E1T1
message defines individual event (such special function), depending addressed destination module; detailed meaning message always interpreted inside module. DPtr conjunction with DSize) defines related message data buffer which contain individual information depending meaning message (such HDLC frame). Next pointer used only internal communication between modules should manipulated. sigByte kind semaphore related message mailbox entry) which active state after message been prepared completely. receiving Entity acknowledges message appropriately. sigByte Meaning Acknowledge (Mailbox Free) Unknown Destination Enough Memory Wrong Parameter Undefined Unexpected Entity Undefined TEI-Table LLC-Table SAPI Defined Defined Entry Routed Selected Module Active Message (New Mailbox Entry)
Device Driver System central part Device Driver Software contains service functions interrupt handling, command handling, Command/Indication message passing, memory management (message buffer pool). general interface Device Driver Modules. This basic structure consequently used Device Driver System associated Device Driver Modules, well Application Program Modules (such Frame Relay) decoding individual actions taken. This mechanism treated kind addressing scheme several service functions implemented inside object-oriented Device Driver Module. mailbox entry, instance, message which routed first appropriate Device Driver Module based Dest
Tool Description
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EASY256-E1T1
(Destination). Device Driver Module receiving such message decodes (Identifier) selects detailed action (internal function). EASY256-E1T1 Reference Design uses serial port physical Interface. C/I-Mailbox Interface implemented means dedicated software drivers both sides (C/I-Message side DDSU Module part Device Driver System board side) support asynchronous buffered data flow between Board Message Interface provides independent circular message queues Command messages from Board Indication messages from Board simplify access physical Message Interface, Message function library) provides several optimized routines hardware-independent access logical C/I-Message Interface object. following description concentrates logical structures detailed individual meanings several message parameters. make individual Command/Indication message easy possible, specific values corresponding Command/Indication message entry found beginning each description.
Tool Description
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EASY256-E1T1
C/I-Messages Debugging
Command Indication messages listed following tables used from host (PC) application program control Infineon Technologies Communication directly. Generally, this module corrsponding communication part Chip Level WinEASY. Device Driver Module Debug (DDMD) module implemented gain access individual device registers shared memory. name Debug chosen because features. debugging purposes during code development well chip level direct memory access. case EASY256-E1T1 Reference Design, commands listed declaration part DDMD.C enable reading manipulation shared memory MUNICH256. Each message contains Destination DDMD module, Source User module, individual function responses listed DDMD.H along with their Indication correspond appropriate previously given Command (such IDC_READ=IDI_READ). Here, Destination Source swapped (Destination=USER; Source=DDMD). following, actual numbers Destination Source used that checking values C/I-Message very easy. values defined below1): USER DDMD 4.3.1 Debug Commands DDMD
Generally, commands given WinEASY application initiated user inputs mouse clicks windows. These messages MUNICH256 Reference Design always built following example: Dest
Entity*
such Timeslot Channel Function-ID Number Data Bytes attached this message DPtr
DSize
Data
definitions Module listed used from msg.h.
Tool Description
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EASY256-E1T1
Some commands need Entity entry.
data section contains specific information that should written shared memory some additional information such addresses called function. data section used, skipped definitions given below DPtr NULL (=0).
4.3.1.1
Enter Chip Level
Dest
Entity
Device DPtr NULL
DSize
This Command given WinEASY application subsystem switch from real-time driver Single Step Chip Level mode. same time, Chip Level Window WinEASY will appear. Here, User access individual registers shared memory. Control MUNICH256 interrupt switched from M256 Device Driver Module Debug Module DDMD. this way, User able (and forced) react interrupts himself; whereas, M256 real-time driver processes interrupts independently.
4.3.1.2
Leave Chip Level
Dest
Entity
Device DPtr NULL
DSize
Leave Chip Level Command used switch back from Chip Level Control M256 Real-Time Driver. WinEASY, Chip Level Window will closed when Command initiated WinEASY.
Tool Description
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EASY256-E1T1
4.3.1.3
Read Bytel
Dest
Entity
DPtr
DSize
Byte Contents Start Address Intel Notation Number Bytes Intel Notation This Command requests Device Driver Module DDMD read Number bytes from memory registers beginning from given Start address. data must given Intel format; example, reading four bytes starting with address 0x10043060 leads contents data section: 00h. read data will delivered corresponding Indication.
Tool Description
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EASY256-E1T1
4.3.1.4
Write Byte
Dest
Entity
Number data DPtr
DSize
Byte Contents Start Address Intel Notation Number Bytes Intel Notation Data Written
This Command requests Device Driver Module DDMD write Number bytes memory registers beginning from given Start address. data must given Intel format.
Tool Description
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EASY256-E1T1
4.3.1.5
Read Word
Dest
Entity
DPtr
DSize
Byte Contents Start Address Intel Notation Number words Intel Notation This Command requests Device Driver Module DDMD read Number words bit) from memory beginning from given Start address. data must given Intel format.
Tool Description
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EASY256-E1T1
4.3.1.6
Write Word
Dest
Entity
2*(number words) DPtr
DSize
Byte 8/9. Contents Start Address Intel Notation Number Bytes Intel Notation Data Written
This Command requests Device Driver Module DDMD write Number 16-bit words memory registers beginning from given Start address. data must given Intel format.
Tool Description
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EASY256-E1T1
4.3.1.7
Read Double Word
Dest
Entity
DPtr
DSize
Byte Contents Start Address Intel Notation Number Dwords Intel Notation This Command requests Device Driver Module DDMD read Number Dwords bit) from memory beginning from given Start address. data must given Intel format.
Tool Description
09.00
EASY256-E1T1
4.3.1.8
Write Double Word
Dest
Entity
(Number DWords) DPtr
DSize
Byte (8.11), Contents Start address Intel Notation Number Bytes intel notation Data Written
This Command requests Device Driver Module DDMD write Number 32-bit Dwords memory registers beginning from given Start address. data must given Intel format.
4.3.1.9
Read Interrupt Queue
Dest
Entity
Queue-ID DPtr NULL
DSize
This Command used from WinEASY Chip Level Window read information from Interrupt Queue. Queue identified Entity Entry: Queue-ID selects lower interrupt queues MUNICH256 (Interrupt queue #0.#7). ninth interrupt queue addressed differently because completely different architecture interrupt array command interrupt vectors. Entries Queue transferred WinEASY application corresponding Indication with identical
Tool Description
09.00
EASY256-E1T1
4.3.1.10 Release Interrupt Queue Entry
Dest
Entity
DPtr
DSize
Data Address Interrupt Queue Entry This Command requests that single interrupt entry (absolute address data field) cleared system's memory. Because interrupt entry related queue identified address, necessary specify interrupt queue. general, this action initiated pressing RELEASE button WinEASY interrupt queue window applied marked interrupt entries this window.
4.3.1.11 Reset Interrupt Queue
Dest
Entity
Queue-ID DPtr
DSize
Data This Command used from WinEASY Chip Level Window reset complete Interrupt Queue. Queue identified Entity Entry addresses Interrupt Queues 0.7. Entries Queue cleared internal current pointers MUNICH256 reset back start address Interrupt Queue. Usually, this action initiated pressing RESET button WinEASY interrupt queue window.
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EASY256-E1T1
4.3.1.12 Allocate Descriptor
Dest
Entity
DPtr NULL
DSize
This function requests descriptor from memory management reserves managed independently WinEASY application. Each descriptor allocated with attached data buffer with 1600 bytes.
4.3.1.13 Deallocate Descriptor
Dest
Entity
DPtr
DSize
Byte Address Descriptor Released Using this function, previously allocated descriptor (with attached data buffer) released memory management WinEASY application. 32-bit Dword data section contains start address descriptor.
4.3.2
Debug Indications
structure Indication messages very similar that Commands. main difference swapping Destination Source general, Command message corresponding Indication identical. Indication primarily delivers information WinEASY application requested Command message.
Tool Description
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EASY256-E1T1
4.3.2.1
Enter Chip Level
Dest
Entity
DPtr
DSize
Byte 8.11 Contents Intel Notation (Least Significant Byte first) Base Address MUNICH256 core registers which accessed from interface only Base Address Memory Mapped Config Space MUNICH256 Base Address MUNICH256 peripheral registers (framers, m13, fdl) which accessed from PCI) Base Address Command Interrupt Queue/Array Shared Memory Revision MUNICH256. Derivative MUNICH256: MUNICH256 MUNICH256F MUNICH256FM Base Address MUNICH256-LBI space (used QuadFALCs EASY256-E1T1)
12.15
20.23
This message indicates WinEASY application that subsystem switched from real-time driver Single Step Chip Level mode. Based this Indication, Chip Level Window WinEASY will appear. Control MUNICH256 interrupts M256 Device Driver Module been disabled. real-time driver interrupt control re-enabled unmasking interrupts GMASK register. Indication carries several basic information WinEASY Chip Level. Based this information, consecutive addresses calculated internally WinEASY.
Tool Description
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EASY256-E1T1
4.3.2.2
Leave Chip Level
Dest
Entity
Device DPtr NULL
DSize
Leave Chip Level Indication used acknowledge switch back from Chip Level Control M256 Real-Time Driver.
4.3.2.3
Read Byte
Dest
Entity
DPtr
DSize
Byte 0.(n-1) Contents Data Read This Indication carries read data that requested corresponding Command.
Tool Description
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EASY256-E1T1
4.3.2.4
Write Byte
Dest
Entity
DPtr NULL
DSize
This Indication acknowledges corresponding Write Byte Command.
4.3.2.5
Read Word
Dest
Entity
DPtr
DSize
Byte Contents Intel Notation (Least Significant Byte first) 0.[(2*n)-1] Words Data (16-bit Words) This Indication carries read data that requested corresponding Command.
4.3.2.6
Write Word
This Indication acknowledges corresponding Write Word Command.
4.3.2.7
Read Double Word
This Indication carries read data that requested corresponding Command.
Tool Description
09.00
EASY256-E1T1
Dest
Entity
DPtr NULL
DSize
Dest
Entity
DPtr
DSize
Byte Contents Intel Notation (Least Significant Byte first) 0.[(4*n)-1] Dwords Data
4.3.2.8
Write Double Word
Dest
Entity
DPtr NULL
DSize
This Indication acknowledges corresponding Write Word Command.
Tool Description
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EASY256-E1T1
4.3.2.9
Read Interrupt Queue
Dest
Entity
Queue-ID DPtr
DSize
Byte Contents Intel Notation (Least Significant Byte first) Address Interrupt Queue Entry Interrupt Vector Information (Contents Address above)
This Indication carries single interrupt information WinEASY Interrupt Queue window that requested this information with corresponding Command message. Queue identified Entity Entry: Queue-ID selects specific Interrupt Queue (Queue-ID 0.7). Each Indication contains only vector. there more than entry Interrupt Queue, corresponding numbers messages generated sent WinEASY.
4.3.2.10 Release Interrupt Queue Entry
Dest
Entity
DPtr
DSize
Data Address Interrupt Queue Entry This Indication acknowledges corresponding Command.
Tool Description 09.00
EASY256-E1T1
4.3.2.11 Reset Interrupt Queue
Dest
Entity
Queue-ID DPtr NULL
DSize
This Indication acknowledges corresponding Command message. Initiated this indication, Entries Interrupt Queue WinEASY Chip Level window cleared.
4.3.2.12 Allocate Descriptorl
Dest
Entity
DPtr
DSize
Byte Start Address Allocated Descriptor This Indication transfers start address allocated descriptor. descriptor allocation been initiated corresponding previous Command. descriptor available, start address zero.
Tool Description
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EASY256-E1T1
4.3.2.13 Deallocate Descriptor
Dest
Entity
DPtr NULL
DSize
With this Indication, deallocation previously allocated descriptor (with attached data buffer) gets acknowledged DDMD module WinEASY application. deallocation descriptor initiated corresponding previous Command message.
Tool Description
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EASY256-E1T1
C/I-Messages Device Driver Module M256
M256 Device Driver Module contains optimized routines especially designed MUNICH256 from Infineon Technologies. communication services provided especially support Layer functions HDLC protocols. driver designed support four MUNICH256 devices parallel autodetecting devices Bus. This driver consists functions following services: Control MUNICH256 devices. Control individual HDLC/PPP/TMA Channels Transmit/Receive Frames. Support flexible timeslot port assignment channels. HDLC functionality: stuffing generation check. functionality: Bit/Octet stuffing, generation check functionality: transparent data transmission reception
Note: bandwidth considerations regarding V.24 line speed between board host transparent mode operation applicable with WinEASY single step. actual values Source Destination defined USER M256= Command Indication messages listed following tables used from external application program from internal application program module (such Frame Relay protocol module) running EASY256-E1T1 Reference Design gain access general service module-the M256 Device Driver Module this case. following table, represents upper level application module. This USER interface (ModuleID=0) well internal application module such protocol handler. messages USER interface module DDSU transferred WinEASY application software running host Table Command Reset MUNICH256 device Config Port Init Interrupt Queue Init Channel Init Transmit Channel Init Receive Channel Send Frame (End)
Tool Description
MUNICH256 HDLC Real-Time Driver Functions Destination M256 M256 M256 M256 M256 M256 M256 Source Message
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EASY256-E1T1
Table Command
MUNICH256 HDLC Real-Time Driver Functions <normal> (cont'd) Destination M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 Source Message
Send Frame (Begin) Transmit Jump (Reserved) Transmitter Shutdown Receive Jump Show MUNICH256 Version Number Switch Channelwise Loop On/Off Switch Portwise Loop /Off Receiver Shutdown (Reserved) SetUpperModule GetDevicesInfo GetFreeChannel GetFreeTxChannel GetFreeRcChannel SPI_ReadBytes SPI_WriteBytes SPI_WriteLongs (DWORDs) SPI_SetProtection
Message listed here defined reserved future use. corresponding responses listed following table. Table Indication (Reserved) MUNICH256 Devices Present Transmit Acknowledge (Frame Begin) Transmit Acknowledge (Frame End) Frame Received (Frame Begin) Frame Received (Frame End) Short Frame Received
Tool Description
Indications from MUNICH256 HDLC M256 Driver Module Destination Source M256 M256 M256 M256 M256 M256 M256 Message
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EASY256-E1T1
Table Indication
Indications from MUNICH256 HDLC M256 Driver Module <normal> Destination
Source M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256 M256
Message
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Interframe Timefill Change Detected Receive Error Transmit Buffer Underrun Error Begin Frame) Transmit Buffer Underrun Error Frame) Receive Buffer Overflow Error Channel Command Execution Failed Unknown Rc-Interrupt Unknown Tx-Interrupt Interrupt Queue Overflow Wrong PCM-Code Wrong (Reserved) MUNICH256 Clocks Asynchronous MUNICH256 Clocks Asynchronous MUNICH256 Clocks Synchronous MUNICH256 Clocks Synchronous (Reserved) Devices Info Indicate Version Number Small Frame Dropped Indication Transmit Abort Indication (Begin Frame) Transmit Abort Indication (End Frame) Receive Abort Indication Transparent Packet Transmitted Indication Mailbox Request Error Indication Response Free Channel Response Free Channel Response Free Channel
Tool Description
EASY256-E1T1
Table Indication
Indications from MUNICH256 HDLC M256 Driver Module <normal> Destination Source M256 M256 M256 M256 Message
Receive Buffer Access Failed Indication Receive Buffer Action Queue Early Warning Indication Receive Buffer Early Warning SPI_Read Bytes Response
Other indication listed above assigned reserved future use. following, actual coded number M256 module used make checking values C/I-Message easy possible. M256 module Destination defined M256 definitions module found msg.h file. 16-bit Entity entry each message contains condensed information about Device Port selected channel time slot. Entity field used shown Table Table Contents Entity Coding Device-ID Port-ID
Channel-ID
Some messages fields Entity. these cases, corresponding section must zero.
Tool Description
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EASY256-E1T1
4.4.1 4.4.1.1
Command Messages MUNICH256 Device Driver Module Reset MUNICH256
Dest
Entity
Device DPtr
DSize
Byte Contents Mode: With this byte, MUNICH256FM reprogrammed behave MUNICH256FM (2), MUNICH256F MUNICH256 Reserved Maximum Frame length setting. Special value: MFL=0 disables MFL-check Setting CONF1 register Setting Minimum Frame Length. MinFL=0 disables that check. affects setting CONF3.MinFL register Presetting mode ports device: 0=T1, 8=E1, 9=4MBit/s, 10=8Mbit/s, 15=unchannelized. Other values allowed Preselect Looped timing ports. This feature available MUNICH256 mode.
This function resets entire device software. ports preconfigured specified mode. Interrupt Queues will initialized. channels disabled default, internal channel management gets initialized. This function called once after downloading driver when software starts MUNICH256FM reprogrammed this function behave other device derivatives. However, using auto-load feature MUNICH256FM recommended reconfigure device.
Tool Description
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EASY256-E1T1
4.4.1.2
Config Port
Dest
Entity
Device Port DPtr
DSize
Byte Contents Intel Notation (Least Significant Byte first) mode: 1.544 MBit/s-Mode 2.048 MBit/s-Mode 4.096 MBit/s-Mode 8.192 MBit/s-Mode Unchannelized mode Transmit Shift setting register PMR.TBS). Only available MUNCH256 mode Receive Shift setting register PMR.RBS). Only available MUNCH256 mode Looped Timing selected. available MUNICH256 mode. Switch Port Switch Port
This command used configure serial settings specified device port (Entity) enable disable port. data section mode, Shifts Looped Timing specified. Device Port located upper byte Entity. this way, example, Port device addressed ID=256=0x100. However, format more clear used WinEASY Single Step Trackfiles well decimal format. Note: Shift settings have major impact opertion using looped testing device. connection transmit receive pins (hardwired loop), corresponding shifts must tbs=rbs-1. using local port loop (LPL), setting must identical: tbs=rbs.
Tool Description 09.00
EASY256-E1T1
4.4.1.3
Init Interrupt Queues
Dest
Entity
Device Queue (LSBs) DPtr
DSize
Byte Interrupt Queue Length Intel Notation (LSB first) This function re-initializes entire specified interrupt queue selected device. length interrupt queue redefined specified data section. This value describes interrupt queue length number entries (DWORDS bytes) must multiple minimum Values that don't apply this rule will corrected accordingly. entity coded with Device Queue declared Table
Tool Description
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EASY256-E1T1
4.4.1.4
Init Channel
Dest
Entity
Device, Port, Channel (128/256) DPtr
DSize
Byte 0.31 (0.63 0.127) 32.63 (64.127 128.255) (128/256) Contents Transmit Timeslot Fillmasks Timeslots 0.31/63/127. Timeslot definition will changed Timeslot will assigned selected channel (Entity) with specified fillmask Receive Timeslot Fillmasks Timeslots 0.31/63/127. Timeslot definition will changed Timeslot will assigned selected channel (Entity) with specified fillmask Protocol Mode: HDLC, synchronous PPP, octet syncronous PPP,
This Command used setup transmit receive channel together. Channel, port, device specified Entity. data section used assign timeslots specified port channel. receive direction, receive descriptors with attached data buffer (1600 bytes) automatically reserved. individual transmit buffers (ITBS) will automatically optimum value according transmit bandwidth channel (timeslots used). Different sizes uses data section apply different port modes: Generally, only timeslots specified port modes T1/E1 Unchannelized. MUNICH256 16-port mode, MBit/s MBit/s modes, specification 64/128 timeslots required. these port modes, data section 128/256 bytes long. first half transmit timeslot specification, second half receive timeslot specification. Note: MUNICH256 initialized mode, only timeslots 0.23 used; but, timeslots direction must specified. Timeslots fillmasks 24.31 must
Tool Description 09.00
EASY256-E1T1
Note: assigned port initialized unchannelized mode, timeslots 0.23 must specified with 0xFF, timeslots 24.31 must
4.4.1.5
Init Transmit Channel
Dest
Entity
Device, Port, Channel (64/128) DPtr
DSize
Byte 0.31 Transmit Timeslot Fillmasks Timeslots 0.31. (0.63/128) Timeslot definition will changed. Timeslot will assigned selected transmit channel (Entity) with specified fillmask. (64/128) Protocol Mode: HDLC, synchronous PPP, octet syncronous PPP,
This Command used setup transmit channel only. receive side specified channel touched. Channel, port, device specified Entity. data section used assign time slots given port channel. individual transmit buffers (ITBS) will automatically optimum value according transmit bandwidth channel (time slots used). Generally only timeslots specified port modes T1/E1 Unchannelized. MUNICH256 port mode, MBit/s MBit/s modes, specification 64/128 timeslots required. these port modes, data section bytes long. first half used transmit timeslot specification. Note: MUNICH256 initialized mode, only timeslots 0.23 used; but, timeslots direction must specified. Timeslots fillmasks 24.31 must Note: assigned port initialized unchannelized mode, timeslots 0.23 must specified with 0xFF, timeslots 24.31 must
Tool Description
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EASY256-E1T1
4.4.1.6
Init Receive Channel
Dest
Entity
Device, Port, Channel DPtr
DSize
Byte 0.31 Receive Timeslot Fillmasks Timeslots 0.31. Timeslot definition will changed Timeslot will assigned selected transmit channel (Entity) with specified fillmask. (64/128) Protocol Mode: HDLC, synchronous PPP, octet synchronous PPP,
This Command used setup receive channel only. transmitter this channel touched. Channel, port, device specified Entity. data section used assign timeslots channel. receive direction, receive descriptors with attached data buffer (1600 bytes) automatically reserved. Generally, only timeslots specified port modes T1/E1 Unchannelized. MUNICH256 port mode, MBit/s MBit/s modes, specification 64/128 timeslots required. these port modes, data section bytes long. first half used transmit timeslot specification. Note: MUNICH256 initialized mode, only timeslots 0.23 used; but, timeslots direction must specified. Tmeslots fillmasks 24.31 must Note: assigned port initialized unchannelized mode, timeslots 0.23 must specified with 0xFF, timeslots 24.31 must
Tool Description
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EASY256-E1T1
4.4.1.7
Send Frame
Dest
Entity
Device, Channel DPtr
DSize
Byte 0.(n-1) Contents Transmit Data Bytes This Command used send Frame previously initiated frame (using Send Frame Begin, ID=19) selected channel specified device. data section contains Bytes transmitted. byte count frame defined DSize field.
4.4.1.8
Send Frame Begin
Dest
Entity
Device, Channel DPtr
DSize
Byte 0.(n-1) Contents Transmit Data Bytes This Command used queue beginning Frame (using Send Frame Begin, ID=19) selected channel specified device. data section contains Bytes transmitted. byte count frame defined
Tool Description
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EASY256-E1T1
DSize field. complete frame will finally sent using Send Frame function (ID=6).
4.4.1.9
Transmit Jump
Dest
Entity
Device, Channel DPtr
DSize
Byte 0.(n-1) Contents Transmit Data Bytes This Command message initiates sending attached data specified channel with higher priority. data will transmitted immediately after current frame. Therefore, Transmit Jump Channel Command used (refer MUNICH256 data sheet details). previous transmit chain will discarded even there unsent data
4.4.1.10 Transmit shut down
Dest
Entity
Device, Channel DPtr NULL
DSize
This Command used shut down active transmit channel specified Entity. specified channel active, this Command effect.
Tool Description
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EASY256-E1T1
4.4.1.11 Receive Jump
Dest
Entity
Device, Channel DPtr NULL
DSize
This Command used define receive descriptor chain force MUNICH256 jump this chain immediately after finishing current receive descriptor. affected channel specified Entity. This function uses Receive Jump Command Channel Specification register set.
4.4.1.12 Show MUNICH256 Version Number
Dest
Entity
Device DPtr NULL
DSize
This Command requests Indication containing Version Number specified device (Entity). returned data corresponds device's Revision Configuration Space.
Tool Description
09.00
EASY256-E1T1
4.4.1.13 Switch Channelwise Loop
Dest
Entity
Device, Port, Channel DPtr
DSize
Byte Contents Switch channelwise Loop Switch Remote channelwise Loop This Command switches remote channelwise test loop. affected device, port, channel specified Entity. Only channel MUNICH256 device switched into test loop mode time. Switching loop channel clears loop different channel.
Tool Description
09.00
EASY256-E1T1
4.4.1.14 Switch Port Loop
Dest
Entity
Device Port DPtr
DSize
Byte Contents Switch Port Loop Switch Remote Payload Loop Switch Local Port Loop Switch Remote Line Loop
This Command switches port test loop. affected device port specified Entity. switch local port test loop, following conditions must met: Active channels must have identical timeslot settings transmit receive side. Receive Shift Transmit Shift must same value. EASY256-E1T1 software driver automatically sets TBS=3 RBS=4. This enables user connect Tx-Pin Rx-Pin hard-wired test loop. Changes these values made permanently initialization routine M256.C (Serial port mode register PMR: PMR.TBS/RBS) dynamically each session setting this value Chip Level mode WinEASY port configuration Command Single Step.
Tool Description
09.00
EASY256-E1T1
4.4.1.15 Receive Shut Down
Dest
Entity
Device, Channel DPtr NULL
DSize
This Command used shut down active receive channel specified Entity. channel active, this command effect.
4.4.1.16 Upper Module
Dest
Entity
DPtr NULL
DSize
This Command changes internal setting used Destination Module Indication from MUNICH256 device driver. value taken from SrcEntry. default, upper module User Interface DDSU. With this default setting, Dest Entry Indication message will (because that Module User Interface). other upper layer module wants communicate with MUNICH256 device driver device driver functions, module must first send this Command message M256 module containing module entry. Afterwards, Indication messages will addressed this upper layer application module.
Tool Description
09.00
EASY256-E1T1
4.4.1.17 Devices Info
Dest
Entity
Device DPtr
DSize
This Command used request detailed information about driver interface devices controlled (found automatically during driver initialization).
4.4.1.18 Free Channel
Dest
Entity
Device -DPtr
DSize
This function used request free transmit receive channel that currently used device. function directly returns same message. does need attached data. However, function called with message that contains data, this data will returned together with corresponding indication without change.
Tool Description
09.00
EASY256-E1T1
4.4.1.19 Free Channel
Dest
Entity
Device, Port, Channel -DPtr
DSize
This function used request free transmit channel that currently used device. function directly returns same message. does need attached data. However, function called with message that contains data, this data will returned together with corresponding indication without change.
4.4.1.20 Free Channel
Dest
Entity
Device, Port, Channel -DPtr
DSize
This function used request free receive channel that currently used device. function directly returns same message. does need attached data. However, function called with message that contains data, this data will returned together with corresponding indication without change.
Tool Description
09.00
EASY256-E1T1
4.4.1.21 Read Bytes
Dest
Entity
Device, Port, Channel DPtr
DSize
Byte Contents Start Address (Byte 0.255 (reserved) Number requested Bytes Intel notation
This command requests function read specified number bytes that connected MUNICH256's interface. read data sent back origin corresponding Indication.
Tool Description
09.00
EASY256-E1T1
4.4.1.22 Write Bytes
Dest
Entity
Device, Port, Channel DPtr
DSize
Byte 4.(n+3) Contents Start Address (Reserved) Number Bytes write (max. 256) Data written
This command requests function w
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