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®1002 dual, matched precision operational amplifiers combine excellent
Top Searches for this datasheetLT1002 Dual, Matched Precision Operational Amplifier ®1002 dual, matched precision operational amplifiers combine excellent individual amplifier performance with tight matching temperature tracking between amplifiers. design, processing, testing device, particular attention been paid optimization entire distribution several parameters their matching. Consequently, specifications even cost commercial grade (the LT1002C) have been spectacularly improved compared presently available devices. Essentially, input offset voltage units less than 80µV, matching between amplifiers consistently beter than 60µV (see distribution plot below). Input bias offset currents, channel separation, common mode power suply rejections LT1002C specified levels which were previsouly attainable only very expensive, selected grades other dual devices. Power dissipation nearly halved compared most popular precision duals, without adversely affecting noise speed performance. by-product lower dissipation decreased warm-up drift. even better performance single precision amp, refer LT1001 data sheet. bridge signal conditioning application shown below. This circuit illustrates requirement both excellent matching individual amplifier specifications. registered trademarks Linear Technology Corporation. Guaranteed offset voltage LT1002A 60µV LT1002 100µV Guaranteed offset voltage match LT1002A 40µV LT1002 80µV Guaranteed drift LT1002A 0.9µV/°C LT1002 1.3µV/°C Guaranteed CMRR LT1002A 110dB LT1002 110dB Guaranteed channel separation LT1002A 132dB LT1002 130dB Guaranteed maching characteristics noise 0.35µV APPLICATIONS Thermocouple Amplifiers Strain Gauge Amplifiers level signal processing Medical instrumentation Precision dual limit threshold detection Instrumentation amplifierStrain Gauge Signal Conditioner with Bridge Excitation +15V +15V 8.2k 2.0K* 4.99k* LM329 LT1002 IN4148 2N2219 REFERENCE MONITORING CONVERTER NUMBER UNITS BRIDGE 301k ZERO LT1001 340k* IN4148 LT1002 2N2907 *RN60C FILM RESISTORS -15V GAIN TRIM 1.1k* 1002 TA01 Distribution Offset Voltage Match ±15V 25°C UNITS TESTED -100 INPUT OFFSET VOLTAGE MATCH (µV) 1002 TA02 LT1002 ABSOLUTE MAXIMUM RATINGS Supply Voltage (Note ±22V Differential Input Voltage ±30V Input Voltage Equal Supply Voltage Output Short Circuit Duration Indefinite Operating Temperature Range LT1002AM/LT1002M 55°C 125°C LT1002AC/LT1002C 70°C Storage Temperature Range Grades 65°C 150°C Lead Temperature (Soldering, sec.). 300°C PACKAGE/ORDER INFORMATION VIEW NULL NULL PACKAGE HERMETIC ORDER PART LT1002AMJ LT1002MJ LT1002ACJ LT1002CJ LT1002ACN LT1002CN NULL NULL OFFSET VOLTAGE 25°C 60µV 100µV 60µV 100µV 60µV 100µV PACKAGE PLASTIC NOTE: Device operated even insertion reversed; this inherent symmetry locations amplifiers (Note ELECTRICAL CHARACTERISTICS, DIVIDUAL PLIFIERS ±15V, 25°C, unless otherwise noted SYMBOL Time AVOL CMRR PSRR VOUT PARAMETER Input Offset Voltage Long Term Input Offset Voltage Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density Large Signal Voltage Gain Common Mode Rejection Ratio Power Supply Rejection Ratio Input Resistance Differential Mode Input Voltage Range Maximum Output Voltage Swing Slew Rate Gain Bandwidth Product Power Dissipation amplifier (Note Note load load, 0.1Hz 10Hz (Note 10Hz (Note 1000Hz (Note ±12V ±10V ±13V ±18V Note CONDITIONS Note Notes LT1002AM/LT1002AC ±0.6 0.35 10.3 ±13.5 0.25 ±3.0 20.0 11.5 LT1002M/LT1002C ±0.7 0.38 10.5 ±13.5 0.25 ±4.5 0.75 20.0 12.0 UNITS µV/month µVp-p nVHz V/mV V/µs LT1002 ELECTRICAL CHARACTERISTICS, DIVIDUAL PLIFIERS ±15V, 55°C 125°C, unless otherwise noted SYMBOL Temp AVOL CMRR PSRR VOUT PARAMETER Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Current Large Signal Voltage Gain Common Mode Rejection Ratio Power Supply Rejection Ratio Input Voltage Range Output Voltage Swing Power Dissipation amplifier load ±10V ±13V ±18V CONDITIONS Note LT1002AM ±1.0 ±6.0 ±12.5 ±13.5 ±15V, 70°C, unless otherwise noted SYMBOL Temp AVOL CMRR PSRR VOUT PARAMETER Input Offset Voltage Average Input Offset Voltage Drift Input Offset Current Input Bias Current Large Signal Voltage Gain Common Mode Rejection Ratio Power Supply Rejection Ratio Input Voltage Range Output Voltage Swing Power Dissipation amplifier Load ±10V ±13V ±18V CONDITIONS Note LT1002AC ±0.7 ±4.5 ±12.5 ±13.8 denotes specifications which apply over full operating temperature range. MIL-STD components, please refer 883C data sheet test listing parameters. Note Offset voltage measured with high speed test equipment, approximately 1second after power applied. Note This parameter tested sample basis only. Note Long Term Input Offset Voltage Stability refers averaged trend line versus Time over extended periods after first days operation. Excluding initial hour operation, changes during first operating days typically 2.5µV. Note Parameter guaranteed design. Note 10Hz noise voltage density sample tested every lot. Devices 100% tested 10Hz available request. Note supply terminals completely independent powered separate supplies desired (this approach, however, would sacrifice advantages power supply rejection ratio matching). supply terminals both connected common substrate must tied same voltage. Both pins should used. LT1002M ±1.5 ±9.0 UNITS µV/°C V/mV ±12.0 ±13.5 LT1002C ±1.0 ±6.0 UNITS µV/°C V/mV ±12.5 ±13.8 LT1002 ATCHI CHARACTERISTICS ±15V, 25°C, unless otherwise noted PARAMETER Input Offset Voltage Match Average Non-Inverting Bias Current Non-Inverting Offset Current Inverting Offset Current Common Mode Rejection Ratio Match Power Supply Rejection Ratio Match Channel Seperation ±13V ±18V 10Hz (Note CONDITIONS LT1002AM/AC ±0.6 ±3.5 LT1002M/C ±0.7 ±4.8 UNITS SYMBOL IOS+ IOS- CMRR PSRR ATCHI CHARACTERISTICS ±15V, 55°C 125°C, unless otherwise noted PARAMETER Input Offset Voltage Match Input Offset Voltage Tracking Average Non-Inverting Bias Current Non-Inverting Offset Current Inverting Offset Current Common Mode Rejection Ratio Match Power Supply Rejection Ratio Match ±13V ±18V CONDITIONS SYMBOL IOS+ IOS- CMRR PSRR ATCHI CHARACTERISTICS ±15V, 70°C, unless otherwise noted PARAMETER Input Offset Voltage Match Input Offset Voltage Tracking Average Non-Inverting Bias Current Non-Inverting Offset Current Inverting Offset Current Common Mode Rejection Ratio Match Power Supply Rejection Ratio Match ±13V ±18V CONDITIONS SYMBOL IOS+ IOS- CMRR PSRR LT1002AM ±1.5 ±6.0 LT1002M ±1.8 ±10.0 12.0 12.0 UNITS µV/°C LT1002AC ±1.0 ±4.5 LT1002C ±1.2 ±7.0 UNITS µV/°C LT1002 TYPICAL PERFORMANCE CHARACTERISTICS Distribution Offset Voltage Individual Amplifier100 ±15V 25°C UNITS TESTED NUMBER UNITS NUMBER UNITS NUMBER UNITS -100 INPUT OFFSET VOLTAGE (µV) 1002 Offset Voltage Drift with Temperature Representative UnitINDIVIDUAL AMPLIFIER OFFSET VOLTAGE (µV) OFFSET VOLTAGE MATCH (µV) ±15V LT1002M LT1002AM 1002 CHANGE OFFSET VOLTAGE (MICROVOLTS) -100 LT1002M 002AM LT1002M LT1002AM LT10 02AM LT1002M TEMPERATURE (°C) Long Term Stability Four Representative Unit10 OFFSET VOLTAGE CHANGE (µV) VOLTAGE NOISE nV/Hz CORNER VOLTAGE CORNER 70Hz CURRENT TIME (MONTHS) 1001 TIME (SECONDS) 1001 FREQUENCY (Hz) 1000 1002 CURRENT NOISE pA/Hz NOISE VOLTAGE 100nV/DIV 1002 Distribution Offset Voltage Drift with Temperature (Individual Amplifiers) UNITS TESTED ±15V Distribution Offset Voltage Match Drift with Temperature ±15V UNITS TESTED -1.2 +0.4 +0.8 +1.2 -0.8 -0.4 INPUT OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) 1002 -1.2 +0.4 +0.8 +1.2 -0.8 -0.4 OFFSET VOLTAGE MATCH DRIFT WITH TEMPERATURE (µV/°C) 1002 Offset Voltage Tracking with Temperature Representative Unit100 Warm-Up Drift ±15V 25°C PLASTIC PACKGE HERMETIC PACKGE T100 LT1002AM LT1002M -100 TIME AFTER POWER BOTH AMPLIFIERS (MINUTES) 1002 TEMPERATURE (°C) 1002 0.1Hz 10Hz Noise Noise Spectrum 25°C ±18V LT1002 TYPICAL PERFORMANCE CHARACTERISTICS Matching Individual Amplifier Bias Offset Currents Temperature ±15V INPUT BIAS CURRENT (nA) INPUT BIAS OFFSET CURRENTS (nA) INVERTING NON-INVERTING INPUT BIAS CURRENT (mA) MATCHING: INVERTING BIAS CURRENT OFFS ERING RRENT URRE RENT TEMPERATURE (°C) Open Loop Voltage Gain Temperature OPEN LOOP VOLTAGE GAIN (V/V) OPEN LOOP VOLTAGE GAIN (dB) 1200k 1000k 800k 600k 400k 200k ±15V, ±12V ±3V, VOLTAGE GAIN (dB) ±15V GAIN 125°C GAIN 25°C -55°C ±15V PHASE MARGIN -55°C 125°C FREQUENCY (MHz) 1002 25°C PHASE MARGIN TEMPERATURE (°C) 100k FREQUENCY (Hz) 1002 1002 Open Loop Gain Mismatch Frequency OPEN LOOP GAIN MISMATCH (PERCENT) Closed Loop Output Impedance POWER SUPPLY REJECTION (dB) Power Supply Rejection PSRR Match Frequency FREQUENCY (Hz) 100k NEGATIVE SUPPLY POSITIVE SUPPLY MATCH (POSITIVE SUPPLY) ±15V 25°C MATCH (NEGATIVE SUPPLY) ±15V 25°C OUTPUT IMPEDANCE 1000 ±1mA ±15V 25°C FREQUENCY (Hz) 100k 1002 PERCENT GAIN MISMATCH OUTPUT OUTPUT 100% (OUTPUT OUTPUT 0.01 FREQUENCY (Hz) 100k 1002 0.001 1002 PHASE SHIFT (DEGREES) 1001 Input Bias Current Over Common Mode Range Input Bias Current Differential Input Voltage ±15V 25°C DEVICE WITH POSITIVE INPUT CURRENT ±15V 25°C DEVICE WITH NEGATIVE INPUT CURRENT -1.0 -1.5 COMMON-MODE INPUT RESISTANCE 280G 0.1nA COMMON-MODE INPUT VOLTAGE DIFFERENTIAL INPUT (VOLTS) 1002 1002 Open Loop Voltage Gain Frequency Response 25°C Gain, Phase Shift Frequency PHASE 25°C LT1002 TYPICAL PERFORMANCE CHARACTERISTICS Channel Separation Frequency CHANNEL SEPARATION (dB) COMMON MODE REJECTION (dB) CMRR MATCH CMRR) COMMON MODE LIMIT (VOLTS) REFERRED POWER SUPPLY =100 100k FREQUENCY (Hz) 1002 Supply Churrent Supply Voltage Each Amplifier OUTPUT VOLTAGE, PEAK-TO-PEAK (VOLTS) SUPPLY CURRENT (mA) -55°C 125°C SUPPLY VOLTAGE 1002 Small Signal Transient Response PERCENT OVERSHOOT 50pF ±15V 25°C Common Mode Rejection CMRR Match Frequency ±15V 25°C -0.2 -0.4 -0.6 -0.8 -1.0 Common Mode Limit Temperature FREQUENCY (Hz) 100k +1.0 -18V -1.2 TEMPERATURE (°C) 1002 1002 Large Signal Transient Response 1002 Maximum Undistorted Output Frequency ±15V +25°C 25°C FREQUENCY (kHz) 1000 1002 Voltage Follower Overshoot Capacitive Load ±15V 25°C 100mV Small Signal Transient Response 1002 10,000 1000 CAPACITIVE LOAD (PICOFARADS) 100,000 1000pF 1002 1002 LT1002 TYPICAL PERFORMANCE CHARACTERISTICS Output Swing Load Resistance SHORT CIRCUIT CURRENT (mA) SINKING SOURCING NEGATIVE SWING OUTPUT SWING (VOLTS) ±15V 25°C 1000 LOAD RESISTANCE 1002 APPLICATIONS INFORMATION LT1002 dual amplifier inserted directly into OP-10, OP207, OP227 sockets with without removal external nulling potentiometers. Offset Voltage Adjustment input offset voltage LT1002, drift with temperature, permanently trimmed wafer testing level. However, further adjustment necessary, nulling with potentiometer will degrade drift with temperature. Trimming value other than zero creates drift (VOS/ 300)µV/°C, e.g. adjusted 300µV, change drift will 1µV/°C. adjustment range with approximately ±2.5mV. less adjustment range needed, sensitivity resolution nulling improved using smaller conjunction with fixed resistors. example approximate null range ±100µV. matching applications, both amplifiers trimmed zero, offset amplifier trimmed match offset other. Offset adjustment, however, slightly degrades gain, common-mode powersupply rejection match between amps. Fortunately, guaranteed offset voltage match LT1002 very low, most applications offset adjustment will unnecessary. Standard Adjustment (10) INPUT (11) Improved Sensitivity Adjustment (10) INPUT (11) Output Short Circuit Current Time TIME FROM OUTPUT SHORT (MINUTES) -55°C 25°C 125°C ±15V 125°C 25°C -55°C POSITIVE SWING 1002 +15V OUTPUT LT1002 -15V 1002 TA03 7.5k 7.5k +15V OUTPUT LT1002 -15V 1002 TA04 LT1002 APPLICATIONS INFORMATION Test Circuit Offset Voltage Drift with Temperature *50k +15V 0.1µF (10) (11) -15V *RESISTORS MUST HAVE THERMOELECTRIC POTENTIAL. 1002 TA05 1000 This circuit also used burn-in configuration LT1002, with supply voltages increased ±20V. Unless proper care exercised, thermocouple effects, caused temperature gradients across dissimilar metals contacts input terminals, exceed inherent drift amplifier. currents should minimized, package leads should short, input leads should close together possible maintained same temperature. Power supplies LT1002 specified over wide range power supply voltages from ±18V. Operation with lower supplies possible, down ±1.2V (two Ni-Cad batteries). However, with ±1.2V supplies, device stable only closed loop gains higher inverting gain higher). supply terminals completely independent powered separate supplies desired (this approach, however, would sacrifice advantages power supply rejection ratio matching). supply terminals both connected common substrate must tied same voltage. Both pins should used. Channel Separation This parameter defined ratio change input offset voltage amplifier change output voltage other amplifier causing offset change. frequencies LT1002's channel separation almost unmeasurable 148dB. frequency increases, capacitance package, between output amplifier inputs other, becomes dominant. Since these pins non-adjacent, capacitance only 0.02pF. maintain LT1002's excellent channel separation higher frequencies, socket board capacitances should minimized. 100k LT1002 0.1Hz 10Hz Noise Test Circuit device under test should warmed three minutes shielded from currents. Turn device 180° measure noise side VOLTAGE GAIN 50,000 LT1002 LT1002 4.3k 22µF SCOPE 110k DEVICE UNDER TEST 100k 2.2µF 24.3k 1002 TA06 (Peak Peak noise measured interval) LT1002 APPLICATIONS INFORMATION Advantages Matched Dual Amps many applications performance system depends matching between operational amplifiers rather than individual characteristics amps. three instrumentation amplifiers, tracking voltage references drift active filters some circuits requiring matching between amps. well-known triple configuration illustrates these concepts. Output offset function difference between offsets halves LT1002. This error cancellation principle holds considerable number input referred parameters addition offset voltage drift with temperature. Input bias current will average non-inverting input currents (IB+). difference between these currents (IOS+) offset current instrumentation amplifier. difference between inverting input currents (IOS-) will cause errors flowing through Commonmode power supply rejections will dependent only match between amplifiers (assuming perfect resistor matching). concepts common mode power supply rejection ratio match (CMRR PSRR) best demonstrated with numerical example: Assume CMRRA 1.0µV/V 120dB, CMRRB 0.75µV/V 122.5dB, then CMRR 0.25µV/V 132dB; CMRRB 0.75µV/V which still 122.5dB, then CMRR 1.75µV/V 115dB. Clearly, LT1002, specifying guaranteeing these matching parameters, significantly improve performance matching dependent circuits. Three Instrumentation Amplifier INPUT LT1002 2.1k 100k 100pF LT1037 OUTPUT INPUT 9.76k Gain 1000 LT1002 1002 TA07 Trim gain Trim common mode rejection Trim common mode rejection Typical performance instrumentation amplifier: Input offset voltage 25µV Input bias current 0.7nA Input resistance Input offset current 0.6nA Input noise 0.5µV Power bandwidth ±10V) 80kHz LT1002 APPLICATIONS INFORMATION Precision ±10V Reference +15V 130k LT1002 LM129A 8.2k LT1002 contributes less than total drift with temperature, noise long term drift reference. Dual Limit Microvolt Comparator +15V 39.2 FLV117 CA3118 UPPER LIMIT LT1002 -15V INPUT 430k LT1002 LOWER LIMIT -15V When upper lower limit exceeded lights Positive feedback nulling terminals creates 20µV hysteresis both amplifiers. 3.3k 0.1% 0.1% 3.3k -15V 10.000V -10.000V LT1002 1002 TA08 accuracy -10V output limited matching resistors. 430k CA3118 39.2 CA3118 CA3118 1002 TA09 feedback changes offset voltage LT1002 less than 5µV. Therefore, basic accuracy comparator limited only offset voltage LT1002. LT1002 APPLICATIONS INFORMATION Instrumentation Amplifier 2.2k+ 100k* 100k LT1002 INPUTS TRIM COMMON-MODE REJECTION TRIM GAIN Gain Precision Amplifier Drives Load ±10V 1.1Rf 0.1RS 110k LT1002 -15V 100k 0.2RL +15V OUTPUT LT1002 INPUT -15V 1002 TA11 LT1002 OUTPUT 1002 TA10 This application utilizes guaranteed 10mA load driving capability LT1002. offset voltage amplifier offset configuration. Amplifier provides additional 10mA load current. When load resistor removed, amplifier sinks this current without affecting accuracy. gain 1000 configuration shown, approximately 0.3% gain accuracy realized. LT1002 APPLICATIONS INFORMATION Dead Zone Generator INPUT 100k 100k 10k* 2N4393 30pF 4.7k 10k* VSET DEAD ZONE CONTROL INPUT BIPOLAR SYMMETRY EXCELLENT BECAUSE DEVICE, SETS BOTH LIMITS LM301A 100k IN914 +15V 100k 15pF 4.7k LM301A 4.7k -15V Precision Absolute Value Circuit INPUT 0.1% LT1002 IN4148 0.1% 47pF LT1002 10k** 10k** 2N4393 LT1002 15pF VOUT 3.3k IN914 VSET VOUT VSET FILM RATIO MATCH 0.05% 3096 TRANSISTOR ARRAY 1002 TA12 0.1% IN4148 0.1% 0.1% LT1002 OUTPUT 1002 TA13 LT1002 APPLICATIONS INFORMATION 8.2k TRIAD TY-90 VN-46 LM399 DIODES SEMTECH FF-15 74C74 +15V 1.8k CLAMP IN914 1002 TA14 43k* (select) +15V -15V KVD= ESI#DP311 JULIE RSCH. LABS #R-44 680pF LT301A 22k* IN914 2N2219 LT1002 Dual Precision Power Supply 100µV Steps 100V StepOUTPUT 0-10V 25mA 00000 99999 KELVIN-VARLEY DIVIDER ESI#DP311 VN-46 90k* OUTPUT 0-100V, 25mA 10k* (select) TRIM-100V 2N6533 IN914 2N2907 LT1002 22µf LT1002 SCHE ATIC DIAGRA NULL NULL 55pF 20pF LT1002 PACKAGE Package 14-Lead PDIP (Narrow 0.300) (LTC 05-08-1510) 0.770* (19.558) 0.255 0.015* (6.477 0.381) 0.300 0.325 (7.620 8.255) 0.130 0.005 (3.302 0.127) 0.015 (0.380) 0.009 0.015 (0.229 0.381) 0.045 0.065 (1.143 1.651) 0.005 (0.125) +0.635 8.255 -0.381 0.100 0.010 (2.540 0.254) *THESE DIMENSIONS INCLUDE MOLD FLASH PROTRUSIONS. MOLD FLASH PROTRUSIONS SHALL EXCEED 0.010 INCH (0.254mm) +0.025 0.325 -0.015 0.125 (3.175) TJMAX LT1002ACN LT1002CN 125°C 100°C/W Information furnished Linear Technology Corporation believed accurate reliable. However, responsibility assumed use. Linear Technology Corporation makes representation that interconnection circuits described herein will infringe existing patent rights. 1.5k 30pF 1002 Dimensions inches (millimeters) unless otherwise noted. Package 14-Lead CERDIP (Narrow 0.300, Hermetic) (LTC 05-08-1110) CORNER LEADS OPTION PLCS) 0.005 (0.127) 0.785 (19.939) 0.023 0.045 (0.584 1.143) HALF LEAD OPTION 0.045 0.068 (1.143 1.727) FULL LEAD OPTION 0.025 (0.635) 0.220 0.310 (5.588 7.874) 0.300 (0.762 BSC) 0.200 (5.080) 0.015 0.060 (0.381 1.524) 0.065 (1.651) 0.018 0.003 (0.457 0.076) 0695 0.008 0.018 (0.203 0.457) 0.385 0.025 (9.779 0.635) 0.045 0.068 (1.143 1.727) 0.014 0.026 (0.360 0.660) 0.100 0.010 (2.540 0.254) 0.125 (3.175) 0694 NOTE: LEAD DIMENSIONS APPLY SOLDER PLATE LEADS. TJMAX LT1002ACJ LT1002CJ LT1002AMJ LT1002MJ 125°C 125°C 100°C/W 100°C/W LT1002 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, 95035-7417 (408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977 LT/GP 0396 PRINTED LINEAR TECHNOLOGY CORPORATION 1985 Other recent searchesSN74HC163 - SN74HC163 SN74HC163 Datasheet SN54HC163 - SN54HC163 SN54HC163 Datasheet SKY73086 - SKY73086 SKY73086 Datasheet LTP-2057A - LTP-2057A LTP-2057A Datasheet 2157A - 2157A 2157A Datasheet F71883 - F71883 F71883 Datasheet B65945 - B65945 B65945 Datasheet B65946 - B65946 B65946 Datasheet 74AHC132 - 74AHC132 74AHC132 Datasheet 74AHCT132 - 74AHCT132 74AHCT132 Datasheet
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