SAM87RI PRODUCT FAMILY Samsung's SAM87RI family 8-bit single-chip
|
|
|
Top Searches for this datasheet
KS86C6404/C6408/P6408
SAM87RI PRODUCT FAMILY
Samsung's SAM87RI family 8-bit single-chip CMOS microcontrollers offers fast efficient CPU, wide range integrated peripherals, various mask-programmable sizes. dual address/data architecture large number bit- nibble-configurable ports provide flexible programming environment applications with varied memory requirements. Timer/counters with selectable operating modes included support real-time operations. Many SAM87RI microcontrollers have external interface that provides access external memory other peripheral devices.
KS86C6404/C6408/P6408 MICROCONTROLLER
KS86C6404/C6408/P6408 single-chip 8-bit microcontroller fabricated using advanced CMOS process. built around powerful SAM87RI core. Stop Idle power-down modes were implemented reduce power consumption. increase on-chip register space, size internal register file logically expanded. KS86C6404 bytes program memory on-chip KS86C6408 bytes. Using SAM87RI design approach, following peripherals were integrated with SAM87RI core: Five configurable ports pins) bit-programmable pins external interrupts 8-bit timer/counter with three operating modes speed function KS86C6404/C6408/P6408 versatile microcontroller that used wide range speed support general purpose applications. especially suitable keyboard controller available 42-pin SDIP 44-pin package.
KS86C6404/C6408 microcontroller also available (One Time Programmable) version, KS86P6408. KS86P6408 microcontroller on-chip 8-Kbyte one-time-programmable EPROM instead masked ROM. KS86P6408 comparable KS86C6404/C6408, both function configuration.
KS86C6404/C6408/P6408
FEATURES
SAM87RI core Timer/Counter 8-bit basic timer watchdog function programmable oscillation stabilization interval generation function 8-bit timer/counter with Compare/Overflow
Memory 4/8-Kbyte internal program memory (ROM) 208-byte
Instruction instructions IDLE STOP instructions added powerdown modes
Serial Compatible speed (1.5 Mbps) device specification. Control endpoint Data endpoint Serial interface engine (SIE) Packet decoding/generation generation checking NRZI encoding/decoding bit-stuffing bytes each receive/transmit buffer
Instruction Execution Time fOSC
Interrupts interrupt sources with vector, each source pending level, vector interrupt structure
Operating Temperature Range
Oscillation Circuit crystal/ceramic oscillator External clock source MHz) Operating Voltage Range 5.25
General programmable five ports pins total) (D+/PS2, D-/PS2 Included)
Package Types 42-pin SDIP 44-pin
KS86C6404/C6408/P6408
BLOCK DIAGRAM
P0.0-P0.7/INT2
P1.0-P1.7
P2.0-P2.7 INT0
Port
Port
Port
SAM87RI XOUT Port Interrupt Control Port P3.0 P3.1 P3.2 P3.3/CLO
Basic Timer
Port SAM87RI
P4.0 INT1 P4.1 INT1 P4.2 INT1 P4.3 INT1 D+/PS2 D-/PS2
TIMER 4/8-KB 208-Byte Register bytes Buffer
Figure 1-1. Block Diagram
KS86C6404/C6408/P6408
ASSIGNMENTS
P3.1 P3.0 INT0 P2.0 INT0 P2.1 INT0 P2.2 INT0 P2.3 INT0 P2.4 INT0 P2.5 INT0 P2.6 INT0 P2.7 XOUT TEST INT1 P4.0 INT1 P4.RESET
P3.2 P3.3/CLO D+/PS2 D-/PS2 P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6
KS86C6404 KS86C6408 42-SDIP
(Top View)
INT1 P4.2 INT1 P4.3 P1/7
Figure 1-2. Assignment Diagram (42-Pin SDIP Package)
KS86C6404/C6408/P6408
P0.4 /INT2
P0.0/INT2
P0.1/INT2
P0.2/INT2
P0.3/INT2
P0.5/INT2
P0.6/INT2
P0.7/INT2
D-/PS2 D+/PS2 P3.3/CLO P3.2 P3.1 P3.0 P2.0/INT0 P2.1/INT0 P2.2/INT0 P2.3/INT0
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P4.3/INT1 P4.2/INTRESET
KS86C6404 KS86C6408
(Top View)
TEST
XOUT
P4.0/INT
INT0 P2.4
INT0 P2.5
Figure 1-3. Assignment Diagram (44-Pin Package)
INT0 P2.6 INT0 P2.7
P4.1/INT
KS86C6404/C6408/P6408
DESCRIPTIONS
Table 1-1. KS86C6404/C6408/P6408 Descriptions Names P0.0-P0.7 Type Description Bit-programmable port Schmitt trigger input open-drain output. Port0 individually configured external interrupt inputs. Pull-up resistors assignable software. Bit-programmable port Schmitt trigger input open-drain output. Pull-up resistors assignable software. Bit-programmable port Schmitt trigger input open-drain output. Port2 individually configured external interrupt inputs. Pull-up resistors assignable software. Bit-programmable port Schmitt trigger input, open-drain push-pull output. P3.3 used system clock output(CLO) pin. Bit-programmable port Schmitt trigger input open-drain output push-pull output. Port4 individually configured external interrupt inputs. output mode, pull-up resistors assignable software. input mode, pull-up resistors fixed. Programmable port interface interface. output from internal voltage regulator System clock input output (crystal/ceramic oscillator, external clock source) External interrupt bit-programmable port0, port2 port4 pins when input mode. Circuit Number Numbers 36-29 (30-23) Share Pins INT2
P1.0-P1.7
28-21 (22-15) 3-10 (41-44, 1-4)
P2.0-P2.7
INT0
P3.0-P3.3
(40-37) (10,
P3.3/CLO
P4.0-P4.3
D+/PS2 D-/PS2 VOUT XIN, XOUT
40-39 (36-35) (34) 3-10, 16,17, 29-36 (30-23, 41-44, 1-4, (12) (31,32,
INT0 INT1 INT2
PORT2/ PORT4/ PORT0
RESET TEST
RESET signal input pin. Input with internal pullup resistor. Test signal input (for factory only; connected VSS) Power input Ground input connection
NOTE: numbers shown parenthesis 44-QFP package; others 42-SDIP package.
KS86C6404/C6408/P6408
CIRCUITS
Table 1-2. Circuit Assignments KS86C6404/C6408/P6408 Circuit Number Circuit Type KS86C6404/C6408/P6408 Assignments RESET signal input Ports Port Port
Pull-Up Resistor
Pull-Up Enable
PULL-UP RESISTOR
Output Disable Output Data Input Data
Noise Filter
Mode Output Input
Input Data
Figure 1-4. Circuit Type (RESET)
Figure 1-5. Circuit Type (Ports
KS86C6404/C6408/P6408
Output Data Open Drain Output Disable Input Data
Mode Output Input
Input Data
Figure 1-6. Circuit Type (Port
KS86C6404/C6408/P6408
Pull-Up Resistor Pull-Up Enable
Output Data Open Drain Output Disable Input Data
Mode Output Input
Input Data
Figure 1-7. Circuit Type (Port
KS86C6404/C6408/P6408
APPLICATION CIRCUIT
Port Port
Port
XOUT
KS86C6404 KS86C6408 KS86P6408
RESET Port
NOTE:
Port4 expend keyboard MATRIX. D+/PS2, D-/PS2 keyboard interface (see PS2CONINT, page 4-25). Port 4.2, mouse interface. Port direct drive.
Figure 1-8. Keyboard Application Circuit Diagram
1-10
Port
D+/PS2 D-/PS2
KEYBOARD MATRIX
KS86C6404/C6408/P6408
ELECTRICAL DATA
OVERVIEW
ELECTRICAL DATA
this section, following KS86C6404/C6408/P6408 electrical characteristics presented tables graphs: Absolute maximum ratings D.C. electrical characteristics Input/Output capacitance A.C. electrical characteristics Input timing external interrupt (Ports D+/PS2, D-/PS2 Mode Only Input timing RESET Oscillator characteristics Oscillation stabilization time Clock timing measurement points Data retention supply voltage Stop mode Stop mode release timing when initiated reset Stop mode release timing when initiated external interrupt Characteristic curves
ELECTRICAL DATA
KS86C6404/C6408/P6408
Table 12-1. Absolute Maximum Ratings 25°C) Parameter Supply Voltage Input Voltage Output Voltage Output Current High Output Current Symbol input ports output ports active pins active active Total current ports Total current ports Operating Temperature Storage Temperature TSTG Conditions Rating Unit
12-2
KS86C6404/C6408/P6408
ELECTRICAL DATA
Table 12-2. D.C. Electrical Characteristics 5.25 Parameter Operating Voltage Input High Voltage Symbol VIH1 VIH2 VIH3 Input Voltage VIL1 VIL2 VIL2 Output High Voltage Output Voltage Output Current Conditions (instruction clock MHz) input pins except VIH2 RESET input pins except VIL2 RESET output ports except ports output port except Port only Input High Leakage Current ILIH1 inputs except ILIH2 except XIN, XOUT, RESET inputs except ILIL2 except XIN, XOUT, RESET 0.5VDD 0.5VDD 5.25 Unit
ILIH2 Input Leakage Current ILIL1
ILIL2
12-3
ELECTRICAL DATA
KS86C6404/C6408/P6408
Table 12-2. D.C. Electrical Characteristics (continued) 5.25 Parameter Output High Leakage Current Output Leakage Current Pull-up Resistors Symbol ILOH Conditions VOUT pins output pins except VOUT pins output pins except Ports 4.2-3, Reset P4.0-1 Normal operation mode clock Idle mode; oscillator Stop mode
Unit
ILOL
Supply Current
IDD1 IDD2 IDD3
NOTES: Except XOUT. Supply current does include current drawn through internal pull-up resistors external output current loads. When Mode Only 5.25 satisfy spec 1.0.
12-4
KS86C6404/C6408/P6408
ELECTRICAL DATA
Table 12-3. Input/Output Capacitance Parameter Input Capacitance Output Capacitance Capacitance Symbol COUT Table 12-4. A.C. Electrical Characteristics 5.25 Parameter Interrupt Input High, Width RESET Input Width Symbol tINTH, tINTL tRSL Conditions RESET Unit Conditions MHz; Unmeasured pins connected Unit
INTL
INTH
Figure 12-1. Input timing external interrupt (Ports
RESET
0.5V
Figure 12-2. Input Timing RESET
12-5
ELECTRICAL DATA
KS86C6404/C6408/P6408
Table 12-5. Oscillator Characteristics 40°C 85°C, 5.25 Oscillator Main crystal Main ceramic (fOSC) Clock Circuit
Test Condition Oscillation frequency
Unit
XOUT
External clock
XOUT
Oscillation frequency
Table 12-6. Oscillation Stabilization Time 40°C 85°C, 5.25 Oscillator Main Crystal Main Ceramic Oscillator Stabilization Wait Time (Oscillation stabilization occurs when equal minimum oscillator voltage range.) tWAIT stop mode release time reset 216/
(note)
Test Condition
Unit
tWAIT stop mode release time interrupt
NOTE: oscillator stabilization wait time, tWAIT, determined setting basic timer control register, BTCON.
12-6
KS86C6404/C6408/P6408
ELECTRICAL DATA
Table 12-7. Data Retention Supply Voltage Stop Mode 40°C 85°C) Parameter Data Retention Supply Voltage Data Retention Supply Current Symbol VDDDR IDDDR Conditions Stop mode Stop mode; VDDDR Unit
0.5V 0.4V
Figure 12-3. Clock Timing Measurement Points
12-7
ELECTRICAL DATA
KS86C6404/C6408/P6408
Internal Reset Operation
Stop Mode Data Retention Mode
Idle Mode (Basic Timer Active)
DDDR
Execution Stop Instruction
RESET
Normal Operating Mode
WAIT
Figure 12-4. Stop Mode Release Timing When Initiated Reset
Stop Mode Data Retention Mode
Idle Mode (Basic Timer Active)
VDDDR
External Interrupt Execution Stop Instruction
Normal Operating Mode
tWAIT
Figure 12-5. Stop Mode Release Timing When Initiated External Interrupt
12-8
KS86C6404/C6408/P6408
ELECTRICAL DATA
Table 12-8. Speed Electrical Characteristics 40°C 85°C, Voltage Regulator Output V33out Parameter Transition Time: Rise Time Fall Time Rise/Fall Time Matching Output Signal Crossover Voltage Voltage Regulator Output Voltage Trfm Vcrs V33OUT (Tr/Tf) with V33OUT capacitor Symbol Conditions Unit
Test Point D.U.T
2.8V
Measurement Points
50pF-350pF
Figure 12-6. Data Signal Rise Fall Time
Vcrs
MAX: MIN:
Figure 12-7. Output Signal Crossover Point Voltage
12-9
ELECTRICAL DATA
KS86C6404/C6408/P6408
NOTES
12-10
KS86C6404/C6408/P6408
MECHANICAL DATA
OVERVIEW
14.00
MECHANICAL DATA
KS86C6404/C6408/P6408 available 42-pin SDIP package (Samsung: 42-SDIP-600) 44-pin package (44-QFP-1010B). Package dimensions shown Figures 13-1 13-2.
0-15
40-SDIP-600
15.24
3.50
39.10
0.50 (1.77) 1.00 1.778
Figure 13-1. 42-Pin SDIP Package Mechanical Data (42-SDIP-600
3.30
0.51MIN
5.08MAX
39.50
0.25
+0.1
MECHANICAL DATA
KS86C6404/C6408/P6408
13.20 10.00
0-8°
0.15 0.05
+0.10
13.20
10.00
44-QFP-1010B
0.10
0.05 2.05 0.10 0.80 0.35
+0.10 0.05
(1.00)
2.30
NOTE: Dimensions millimeters.
Figure 13-2. 44-Pin Package Mechanical Data (44-QFP-1010B)
13-2
0.80 ±0.20
KS86C6404/C6408/P6408
KS86P6408
OVERVIEW
KS86P6408
KS86P6408 single-chip CMOS microcontroller (One Time Programmable) version KS86C6404/C6408 microcontroller. on-chip instead masked ROM. EPROM accessed serial data format. KS86P6408 fully compatible with KS86C6404/C6408, both function configuration. Because simple programming requirements, KS86P6408 ideal evaluation chip KS86C6404/C6408.
P3.1 P3.0 INT0 P2.0 INT0 P2.1 INT0 P2.2 INT0 P2.3 INT0 P2.4 INT0 P2.5 SDAT/INT0 P2.6 SCLK /INT0 P2.7 VDD/VDD /VSS XOUT/XOUT /XIN TEST/TEST INT1 P4.0 INT1 P4.RESET RESET
P3.2 P3.3/CLO D3.3 P0.0 INT2 P0.1 INT2 P0.2 INT2 P0.3 INT2 P0.4 INT2 P0.5 INT2 P0.6 INT2 P0.7 INT2 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6
KS86P6408 42-SDIP
(Top View)
INT1 P4.2 INT1 P4.3 P1/7
Figure 14-1. KS86P6408 Assignments (42-SDIP Package)
KS86P6408
KS86C6404/C6408/P6408
P0.4 /INT2
P0.0/INT2
P0.1/INT2
P0.2/INT2
P0.3/INT2
P0.5/INT2
P0.6/INT2
P0.7/INT2
D-/PS2 D+/PS2 P3.3/CLO P3.2 P3.1 P3.0 P2.0/INT0 P2.1/INT0 P2.2/INT0 P2.3/INT0
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P4.3/INT1 P4.2/INTRESET/ RESET
KS86P6408
(Top View)
P2.6/INT0/ SDAT P2.7/INT0/ SCLK
TEST/TEST
XOUT/XOUT
VDD/VDD
P2.4/INT0
P2.5/INT0
VSS/
XIN/XIN
P4.0/INT
Figure 14-2. KS86P6408 Assignments (44-QFP Package)
14-2
P4.1/INT
KS86C6404/C6408/P6408
KS86P6408
Table 14-1. Descriptions Pins Used Read/Write EPROM Main Chip Name P2.6 Name SDAT During Programming Function Serial DATa (Output when reading, Input when writing) Input Push-pull Output Port assigned Serial CLocK (Input Only Pin) Chip Initialization EPROM Cell Writing Power Supply (Indicates Mode Entering) When writing 12.5 applied when reading. write test mode Operating mode Logic Power Supply Pin.
P2.7 TEST
SCLK TEST
RESET
RESET
(12) 11(5)/12(6)
NOTE: means package.
Table 14-2. Comparison KS86P6408 KS86C6404/C6408 Features Characteristic Program Memory Operating Voltage (VDD) Programming Mode Configuration EPROM Programmability KS86P6408 8-Kbyte EPROM 5.25 (RESET) 12.5 SDIP/44 User Program time SDIP/44 Programmed factory KS86C6404/C6408 8-Kbyte mask 5.25
OPERATING MODE CHARACTERISTICS When 12.5 supplied (RESET) KS86P6408, EPROM programming mode entered. operating mode (read, write, read protection) selected according input signals pins listed Table 14-3 below. Table 14-3. Operating Mode Selection Criteria
(RESET) 12.5 12.5 12.5
REG/
ADDRESS
EPROM read
MODE
(A15-A0) 0000H 0000H 0000H 0E3FH
EPROM program EPROM verify EPROM read protection
NOTE: means level; means High level.
14-3
KS86P6408
KS86C6404/C6408/P6408
START
Address= First Location
=5V, PP=12.5V
Program Pulse
Increment
FAIL
Verify Byte
Verify Byte
FAIL
Last Address
Increment Address
FAIL
Compare Byte
PASS
Device Failed
Device Passed
Figure 14-3. Programming Algorithm
14-4
KS86C6404/C6408/P6408
KS86P6408
Table 14-4. D.C. Electrical Characteristics 40_C 85_C, 5.25 Parameter Supply Current
(note)
Symbol IDD1 IDD2 IDD3
Conditions Normal mode; clock Idle mode; clock Stop mode
Unit
NOTE: Supply current does include current drawn through internal pull-up resistors external output current loads.
14-5
KS86P6408
KS86C6404/C6408/P6408
NOTES
14-6
Other recent searches
PLL701-14 - PLL701-14 PLL701-14 Datasheet
MAX4850 - MAX4850 MAX4850 Datasheet
MAX4850H - MAX4850H MAX4850H Datasheet
MAX4852 - MAX4852 MAX4852 Datasheet
MAX4850 - MAX4850 MAX4850 Datasheet
MAX4852 - MAX4852 MAX4852 Datasheet
MAX4850H - MAX4850H MAX4850H Datasheet
MAX4852H - MAX4852H MAX4852H Datasheet
MASWSS0102 - MASWSS0102 MASWSS0102 Datasheet
LH5316600 - LH5316600 LH5316600 Datasheet
HPR1XX - HPR1XX HPR1XX Datasheet
HCS74T - HCS74T HCS74T Datasheet
EE-235 - EE-235 EE-235 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
