OptiMOS®2 Power-Transistor Features Ideal high-frequency dc/dc co

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OptiMOS®2 Power-Transistor Features Ideal high-frequency dc/dc co

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IPB05N03LA IPI05N03LA, IPP05N03LA
OptiMOS®2 Power-Transistor
Features Ideal high-frequency dc/dc converters Qualified according JEDEC target application N-channel Logic level Excellent gate charge DS(on) product (FOM) Very on-resistance DS(on) Superior thermal resistance operating temperature rated P-TO263-3-2
Product Summary DS(on),max (SMD version)
P-TO262-3-1
P-TO220-3-1
Type IPB05N03LA IPI05N03LA IPP05N03LA
Package P-TO263-3-2 P-TO262-3-1 P-TO220-3-1
Ordering Code Q67042-S4141 Q67042-S4142 Q67042-S4143
Marking 05N03LA 05N03LA 05N03LA
Maximum ratings, j=25 unless otherwise specified Parameter Continuous drain current Symbol Conditions C=25 °C2) C=100 Pulsed drain current Avalanche energy, single pulse Reverse diode Gate source voltage4) Power dissipation Operating storage temperature climatic category; 68-1
Value
Unit
D,pulse
C=25 °C3) D=72 GS=25 D=80 DS=20 =200 A/µs, j,max=175
kV/µs
C=25
55/175/56
J-STD20 JESD22
Rev.
page
2004-03-23
IPB05N03LA IPI05N03LA, IPP05N03LA
Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction case version, device thJC thJA minimal footprint cooling area5) Electrical characteristics, j=25 unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current (BR)DSS GS=0 GS(th) DS=V D=50 DS=25 GS=0 j=25 DS=25 GS=0 j=125 Gate-source leakage current Drain-source on-state resistance DS(on) GS=20 DS=0 GS=4.5 D=55 GS=4.5 D=55 version GS=10 D=55 GS=10 D=55 version Gate resistance Transconductance DS|>2|I DS(on)max, D=55 Values typ. max. Unit
Current limited bondwire; with thJC=1.6 chip able carry figure j,max=150 duty cycle <0.25 GS<-5
Device epoxy with (one layer, thick) copper area drain connection. vertical still air.
Rev.
page
2004-03-23
IPB05N03LA IPI05N03LA, IPP05N03LA
Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics6) Gate source charge Gate charge threshold Gate drain charge Switching charge Gate charge total Gate plateau voltage Gate charge total, sync. Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage S,pulse C=25 GS=0 F=80 j=25 R=15 F/dt =400 A/µs 0.97 g(th) plateau g(sync) DS=0.1 GS=0 DD=15 GS=0 DD=15 D=40 GS=0 Crss d(on) d(off) DD=15 GS=10 D=20 G=2.7 GS=0 DS=15 2413 3110 1225 Values typ. max. Unit
Reverse recovery charge
figure gate charge parameter definition
Rev.
page
2004-03-23
IPB05N03LA IPI05N03LA, IPP05N03LA
Power dissipation tot=f(T Drain current D=f(T GS10
[°C]
[°C]
Safe operation area D=f(V DS); C=25 parameter:
1000
limited on-state resistance
Max. transient thermal impedance thJC=f(t parameter:
thJC [K/W]
0.05 0.02 0.01 single pulse
0.01
0.001 10-5 10-4
10-10
Rev.
page
2004-03-23
IPB05N03LA IPI05N03LA, IPP05N03LA
Typ. output characteristics D=f(V DS); j=25 parameter:
Typ. drain-source resistance DS(on)=f(I j=25 parameter:
DS(on)
Typ. transfer characteristics D=f(V GS); DS|>2|I DS(on)max parameter:
Typ. forward transconductance fs=f(I j=25
Rev.
page
2004-03-23
IPB05N03LA IPI05N03LA, IPP05N03LA
Drain-source on-state resistance DS(on)=f(T D=55 GS=10 Typ. gate threshold voltage GS(th)=f(T GS=V parameter:
DS(on)
GS(th)
[°C]
[°C]
Typ. Capacitances =f(V DS); GS=0
Forward characteristics reverse diode F=f(V parameter:
10000
1000
Ciss
1000
Coss
175°C
[pF]
Crss
25°C
Rev.
page
2004-03-23
IPB05N03LA IPI05N03LA, IPP05N03LA
Avalanche characteristics AS=f(t AV); GS=25 parameter: j(start)
Typ. gate charge GS=f(Q gate); D=40 pulsed parameter:
1000
[µs]
gate [nC]
Drain-source breakdown voltage BR(DSS)=f(T
Gate charge waveforms
BR(DSS)
s(th)
(th)
gate
[°C]
Rev.
page
2004-03-23
IPB05N03LA IPI05N03LA, IPP05N03LA
Package Outline P-TO263-3-2: Outline
Footprint
Packaging
Dimensions Rev. page 2004-03-23
IPB05N03LA IPI05N03LA, IPP05N03LA
P-TO262-3-1: Outline
P-TO220-3-1: Outline
Packaging
Dimensions Rev. page 2004-03-23
IPB05N03LA IPI05N03LA, IPP05N03LA
Published Infineon Technologies Bereich Kommunikation D-81541 Infineon Technologies 1999 Rights Reserved. Attention please! information herein given describe certain components shall considered warranted characteristics. Terms delivery rights technical change reserved. hereby disclaim warranties, including limited warranties non-infringement, regarding circuits, descriptions charts stated herein. Infineon Technologies approved CECC manufacturer. Information further information technology, delivery terms conditions prices, please contact your nearest Infineon Technologies office Germany Infineon Technologies representatives worldwide (see address list). Warnings technical requirements, components contain dangerous substances. information types question, please contact your nearest Infineon Technologies office. Infineon Technologies' components only used life-support devices systems with expressed written approval Infineon Technologies failure such components reasonably expected cause failure that life-support device system, affect safety effectiveness that device system. Life support devices systems intended implanted human body, support and/or maintain sustain and/or protect human life. they fail, reasonable assume that health user other persons endangered.
Rev.
page
2004-03-23

OptiMOS®2 Power-Transistor Features Ideal high-frequency dc/dc co

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