April 2001; ver. 1.00 Data Sheet Using industry standard complian
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Mercury Gigabit Transceiver MegaCore Function (M1GXCVR)
April 2001; ver. 1.00 Data Sheet
Using industry standard compliant look-up table (LUT) encoding scheme, Altera® MercuryGigabit Transceiver MegaCore Function (M1GXCVR) enables transfer data across high speed serial link. improves transmission quality serial link using 8b10b encoding ensure sufficient transition density limited length- more than five consecutive 0s-simplifying clock recovery error detection, eliminating direct current (DC) components from serial stream. M1GXCVR comprises customizable receiver (RXM1GXCVR) transmitter (TXM1GXCVR) variants that function independently half-duplex operation, combined full-duplex operation.
Features
1.25 Gigabit second (Gbps) serial high-speed differential interface (HSDI) Uses serializer/deserializer (SERDES) clock data recovery (CDR) circuits that built into Altera Mercury device architecture. Configurable channels Industry compatible special character coding Complies with applicable standards, including: Institute Electrical Electronics Engineers, IEEE 802.3z, Media Access Control (MAC) Parameters, Physical Layer, Repeater Management Parameters 1000 Mb/s Operation, 1998. American National Standards Institute, ANSI X3.230, Fiber Channel Physical Signaling Interface, Clauses 1994. Quartus® software, OpenCorefeature allow place-and-route, static timing analysis designs prior licensing Secure register transfer level (RTL) simulation models allow simulation with user design third-party simulators M1GXCVR optimized Mercury device architecture, dependent hardware features. EP1M350 support input output dedicated high-speed channels. EP1M120 support input output dedicated high-speed channels.
more information Altera Mercury device family, refer Mercury Programmable Logic Device Family Data Sheet.
Altera Corporation
A-DS-IPM1GXCVR-01
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
Typical Application
Figure Typical Application
Figure shows example system transmitting bits data across eight TXM1GXCVR channels, being received eight RXM1GXCVR channels, aggregated data rate Gbps.
Backplane
1.25 Gbps 64-bit datapath TXM1GXCVR RXM1GXCVR
1.25 Gbps
Figure illustrates system design, including separate local oscillators each card.
Figure System Design
Backplane Card Transmitter Card
Card
Card Transmitter Receiver
Card
Receiver
Local Oscillator
Transmitter Receiver
Receiver Transmitter
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
system level applications, transmitted data rate must less than equal receiver's data handling capacity. This accomplished inserting IDLE characters transmit stream. user must determine whether idle characters required, depending application. example, application uses star topology with multiple cards running different voltage controlled oscillators (VCOs) inserting IDLE characters guarantees that receiver's data capacity exceeds transmitted data rate. "Character Codes" page
Generating Variants
obtain customized M1GXCVR variant send request telecom@altera.com specifying required parameters, required local frequency (0-125). Your customized M1GXCVR will e-mailed encrypted gate level netlist secure simulation model, business day. Table shows optional features available generate variants. Table page estimate resources consumed each variant.
Table Optional Features
Options
Direction Channel(s)
Parameters Choices
NCHAN RX/TX 1-18
Functional Description
RXM1GXCVR decode 10-bit code into 8-bit byte data. TXM1GXCVR encode 8-bit byte data into 10-bit transmission code. Least Significant (LSB) always transmitted first, while Most Significant (MSB) always transmitted last.
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
Figure illustrates bidirectional conversion process.
Figure M1GXCVR Conversion
crxdat ctxdat byte
8b10b
Conversion
Note:
transmitted/received first; transmitted/received last.
Disparity
Disparity difference between number encoded word.
Neutral disparity indicates number equal. Positive disparity indicates more than Negative disparity indicates more than
M1GXCVR designed maintain neutral average disparity. Average disparity determines component serial line. Running disparity record cumulative disparity every encoded word. Running disparity tracked encoder. guarantee neutral average disparity, positive running disparity must followed neutral negative disparity; negative running disparity must followed neutral positive disparity. these conditions met, decoder flags error.
Character Codes
addition data characters, stream contains twelve out-ofband indicators, also called special control characters. Special characters indicate, example, whether data idle, test data, data delimiters. comma character (K28.5) used alignment purposes 10-bit code guaranteed occur elsewhere encoded stream.
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
Table lists special codes used M1GXCVR.
Table Character Codes
10-Bit Special Codes
K28.0 K28.1 K28.2 K28.3 K28.4 K28.5 K28.6 K28.7 K23.7 K27.7 K29.7 K30.7 Note:
K28.5 comma character used alignment purposes, represent IDLE code.
Equivalent 8-Bit Codes
8'b000_11100 8'b001_11100 8'b010_11100 8'b011_11100 8'b100_11100 8'b101_11100 8'b110_11100 8'b111_11100 8'b111_10111 8'b111_11011 8'b111_11101 8'b111_11110
Receiver Description
RXM1GXCVR takes serial stream performs serial parallel conversion. maximum core frequency MHz. Figure shows block diagram RXM1GXCVR. cases where more than channel used, RXM1GXCVR does align data received from adjacent channels compensate skew between channels.
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
Figure Receiver Block Diagram
Note
idle_del
cdet_en_c* cdet_lck_c*
RXM1GXCVR
hrxdat_c* High-Speed Differential Interface Align Decode 8b10b FIFO crxdat_c* [7:0] crxval_c* crxoob_c* crxooberr_c* crxrderr_c* Clock Generator crxclk crxreset_n
Notes:
equivalent number from 0-17, depending number channels chosen option, Table Each channel separate external signals. high-speed differential interface (HSDI) sub-block hard macro, other sub-blocks soft macros.
High-Speed Differential Interface (HSDI)
HSDI hard macro Mercury devices, handles serial data transfers 1.25 Gbps channel. instantiated ALTCDR megafunction. ALTCDR megafunction hard macro, preconfigured Quartus development tool, included part netlist. Each Mercury part allows only ALTCDR macro, therefore user cannot replicate multiple instances this function.
deserializer circuits embedded within HSDI macro.
Clock Data Recovery
recovers clock from incoming serial stream, uses resample data. This eliminates need carry separate clock signal with data, prevents potential skew problems.
Deserializer
deserializer circuit takes 10-bit serial input stream deserializes data into 10-bit word. received first.
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
more information these functions, refer Mercury Devices Application Note #130.
Clock Generator
clock generator circuit external HSDI. Using ondevice, general purpose, phase lock loops (PLLs) from Mercury device-independent from PLLs HSDI-the clock generator circuit multiplies core clock frequency 101.5% (PLL ratio 65/64). This generates slightly fast clock that runs majority receiver's internal logic, while core clock used read data first first (FIFO) buffer. avoid overflow condition where data could potentially lost, data extracted from HSDI's internal FIFO buffer frequency 101.5% core clock. This feature included part macro. general purpose PLLs hard macros included part netlist. PLLs preconfigured ALTCLKLOCK Quartus development tool. Each Mercury device only dedicated HSDI PLLs, M1GXCVR uses therefore only clock domain possible.
Alignment
achieve character alignment, function searches special IDLE character, comma character K28.5. Asserting cdet_en signal initiates search comma character. Once alignment circuit locked onto proper pattern, asserts cdet_lck signal. aligner locks onto first received comma character keeps same alignment until cdet_en cleared zero reasserted.
Decoder
Data identified 10-bit special codes converted from bits bits, Table list valid codes, Figure illustration conversion process.
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
When special 10-bit codes received, special codes translated 8-bit values, crxoob signal asserted. decoder also checks invalid 10-bit codes, asserts crxooberr signal when invalid codes detected. When idle_del signal asserted, deletes 10-bit words identified special IDLE character K28.5. When receiver detects disparity error, crxrderr signal asserted.
FIFO Buffer
Since phase relationship exists between core clock internally generated fast clock, FIFO buffer required data cross from fast clock domain core clock domain. valid signal, crxval, asserted when valid data available FIFO buffer. conditions cause FIFO buffer empty:
IDLE characters received deleted because idle_del asserted; serial high-speed clock frequency slower than times core clock frequency.
Transmitter Description
TXM1GXCVR takes stream 8-bit bytes, encodes them into 10-bit words, performs parallel serial conversion. converted 10-bit code output serial line. Figure shows block diagram TXM1GXCVR.
Figure Transmitter Block Diagram
TXM1GXCVR
htxdat_c*
Note
High-Speed Differential Interface
Encode 8b10b
ctxdat_c* [7:0] ctxval_c* ctxoob_c* ctxbal_c* [1:0] ctxooberr_c* ctxclk ctxreset_n
Notes:
equivalent number from 0-17, depending number channels chosen option, Table Each channel separate external signals. high-speed differential interface (HSDI) sub-block hard macro, encode sub-block soft macro.
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
High-Speed Differential Interface (HSDI)
HSDI hard macro Mercury devices, handles serial data transfers 1.25 Gbps channel. serializer clock multiplier circuits embedded within HSDI macro, along with seven word FIFO buffer. Each Mercury device only dedicated HSDI PLLs, M1GXCVR uses therefore only clock domain possible.
Serializer
serializer takes 10-bit input stream serializes core clock boosted factor used high-speed output clock. Thus, resulting serial data rate 1.25 Gbps. encoded word transmitted first. ALTCDR function hard macro, preconfigured Quartus development tool, included part netlist. Each Mercury part allows only ALTCDR macro, therefore user cannot replicate multiple instances this function.
Encoder
encoder uses non-partitioned memory-based implementation convert data identified out-of-band 8-bit codes from bits bits. Figure illustration conversion process. encode 8-bit word, 8-bit value must applied ctxdat inputs ctxval input must asserted (active high). When ctxval asserted, IDLE (K28.5) characters inserted. When special 10-bit code inserted, equivalent out-of-band 8bit code placed crxdat lines with crxoob asserted. Error checking performed ensure out-of-band 8-bit code valid, Table list codes.
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
Disparity
running disparity forced positive negative 8-bit word. This allows special resynchronization pattern inserted user. following codes asserted, inputs ctxbal_c*, conjunction with data force 10-bit code desired running disparity: 2'b10 negative disparity 2'b01 positive disparity 2'b11 don't care 2'b00 don't care
Signals
Table shows port list RXM1GXCVR function. signal direction indicated input, output.
Table RXM1GXCVR Signals
Port
Receive Interface Signals crxclk crxreset_n crxval_c*(1) [1/0:0] crxdat_c*(1) [15/7:0] crxoob_c*(1) [1/0:0] crxooberr_c*(1) crxrderr_c*(1) hrxdat_c*(1) Miscellaneous Signals cdet_en_c*(1) cdet_lck_c*(1) idle_del Note:
equivalent number from 0-17, depending number channels chosen option, Table Each channel separate external signals.
Direction
Input Input Output Output Output Output Output Input Input Output Input Clock
Description
Active synchronous reset Valid Data Out-of-band Out-of-band error Running disparity error Data line Comma detect enable Comma detect locked Idle character delete
High-Speed Receive Interface Signals
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
Table shows port list TXM1GXCVR function. signal direction indicated input, output.
Table Transmitter Function Signals
Port
Transmit Interface Signals ctxclk ctxreset_n ctxval_c*(1) [1/0:0] ctxdat_c*(1) [15/7:0] ctxoob_c*(1) [1/0:0] ctxbal_c*(1) [1:0] ctxooberr_c*(1) htxdat_c*(1) Note:
equivalent number from 0-17, depending number channels chosen option, Table Each channel separate external signals.
Direction
Input Input Input Input Input Input Output Output Clock
Description
Active synchronous reset Valid Data Out-of-band Balance Out-of-band error Data line
High-Speed Transmit Interface Signals
Resource Usage
Table shows estimated resources single channel M1GXCVR function consumes Mercury device.
Table Resources
Module
RXM1GXCVR TXM1GXCVR Notes:
Notes
ESBs
General Purpose PLLs
numbers logic elements (LEs) embedded system blocks (ESBs) approximate April 2001. linear relationship exists between resources number channels. Both counts multiplied number channels. shared between transmitters.
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
Performance
Table shows speed which M1GXCVR function operates Mercury device.
Table Performance
M1GXCVR Module
RXM1GXCVR TXM1GXCVR Notes:
measured crxclk pins. measured ctxclk pins. These inputs need comply with frequency range Mercury device.
HSDI fMAX (MHz)
1,250.00 1,250.00
Internal Frequency (MHz)
126.95 125.00
Local Frequency (MHz)
125.00(1) 125.00(2)
Licensing
license required perform following trial operations using your custom logic:
Instantiation Place-and-route Static timing analysis Simulation third-party simulator
Only when ready generate programming files, need obtain licenses through your local Altera sales representative. current M1GXCVR variants single license with ordering code: PLSM-M1GXCVR.
Deliverables
following elements provided with package:
Data Sheet Encrypted gate level netlist file Place-and-route constraints (where necessary) Secure simulation model Demo testbench (TBD)
Refer Readme file included within package installation instructions.
Altera Corporation
Mercury Gigabit Transceiver MegaCore Function (M1GXCVR) Data Sheet
obtain customized M1GXCVR variant send request telecom@altera.com specifying required local frequency (0-125), required parameters: NCHAN. Remember include your preferred return e-mail address your customized M1GXCVR will e-mailed encrypted gate level netlist secure simulation model, business day.
Innovation Drive Jose, 95134 (408) 544-7000 http://www.altera.com Applications Hotline: (800) 800-EPLD Customer Marketing: (408) 544-7104 Literature Services: lit_req@altera.com
Altera, MegaCore, Mercury, OpenCore, Quartus, Quartus trademarks and/or service marks Altera Corporation United States other countries. Altera acknowledges trademarks other organizations their respective products services mentioned this document. Altera products protected under numerous U.S. foreign patents pending applications, maskwork rights, copyrights. Altera warrants performance semiconductor products current specifications accordance with Altera's standard warranty, reserves right make changes products services time without notice. Altera assumes responsibility liability arising application information, product, service described herein except expressly agreed writing Altera Corporation. Altera customers advised obtain latest version device specifications before relying published information before placing orders products services. Copyright 2001 Altera Corporation. rights reserved.
Altera Corporation
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